diff --git a/lib/bsp/standalone/src/cortexa53/64bit/gcc/boot.S b/lib/bsp/standalone/src/cortexa53/64bit/gcc/boot.S
index 807f80c3..c7b966c3 100644
--- a/lib/bsp/standalone/src/cortexa53/64bit/gcc/boot.S
+++ b/lib/bsp/standalone/src/cortexa53/64bit/gcc/boot.S
@@ -198,6 +198,11 @@ OKToRun:
         msr     TCR_EL3, x1
         isb
 
+	/* Enable SError Exception for asynchronous abort */
+	mrs 	x1,DAIF
+        bic	x1,x1,#(0x1<<8)
+        msr	DAIF,x1
+
 	/* Configure SCTLR_EL3 */
 	mov      x1, #0                //Most of the SCTLR_EL3 bits are unknown at reset
 	orr      x1, x1, #(1 << 12)	//Enable I cache