diff --git a/XilinxProcessorIPLib/drivers/emacps/data/emacps.mdd b/XilinxProcessorIPLib/drivers/emacps/data/emacps.mdd
index a5c0bf78..31b85533 100755
--- a/XilinxProcessorIPLib/drivers/emacps/data/emacps.mdd
+++ b/XilinxProcessorIPLib/drivers/emacps/data/emacps.mdd
@@ -36,7 +36,7 @@ BEGIN driver emacps
   OPTION supported_peripherals = (ps7_ethernet psu_ethernet);
   OPTION driver_state = ACTIVE;
   OPTION copyfiles = all;
-  OPTION VERSION = 3.0;
+  OPTION VERSION = 3.1;
   OPTION NAME = emacps;
 
 END driver
diff --git a/XilinxProcessorIPLib/drivers/emacps/src/xemacps.h b/XilinxProcessorIPLib/drivers/emacps/src/xemacps.h
index eac66382..79f8ba84 100644
--- a/XilinxProcessorIPLib/drivers/emacps/src/xemacps.h
+++ b/XilinxProcessorIPLib/drivers/emacps/src/xemacps.h
@@ -312,6 +312,8 @@
  *                     Disable extended mode. Perform all 64 bit changes under
  *                     check for arch64.
  *                     Remove "used bit set" from TX error interrupt masks.
+ * 3.1   hk   07/27/15 Do not call error handler with '0' error code when
+ *                     there is no error. CR# 869403
  * </pre>
  *
  ****************************************************************************/
diff --git a/XilinxProcessorIPLib/drivers/emacps/src/xemacps_intr.c b/XilinxProcessorIPLib/drivers/emacps/src/xemacps_intr.c
index 201cfe37..379327c3 100644
--- a/XilinxProcessorIPLib/drivers/emacps/src/xemacps_intr.c
+++ b/XilinxProcessorIPLib/drivers/emacps/src/xemacps_intr.c
@@ -57,6 +57,8 @@
 * 2.1   srt  07/15/14 Add support for Zynq Ultrascale Mp GEM specification
 *		       and 64-bit changes.
 * 3.0   kvn  02/13/15 Modified code for MISRA-C:2012 compliance.
+* 3.1   hk   07/27/15 Do not call error handler with '0' error code when
+*                     there is no error. CR# 869403
 * </pre>
 ******************************************************************************/
 
@@ -228,8 +230,11 @@ void XEmacPs_IntrHandler(void *XEmacPsPtr)
 			XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,
 					XEMACPS_NWCTRL_OFFSET, RegCtrl);
 		}
-		InstancePtr->ErrorHandler(InstancePtr->ErrorRef, XEMACPS_RECV,
-					  RegSR);
+
+		if(RegSR != 0) {
+			InstancePtr->ErrorHandler(InstancePtr->ErrorRef,
+						XEMACPS_RECV, RegSR);
+		}
 	}
 
         /* When XEMACPS_IXR_TXCOMPL_MASK is flaged, XEMACPS_IXR_TXUSED_MASK