From 4d2c0a528e7da82e5dc32c14aba0482d21a743ad Mon Sep 17 00:00:00 2001 From: Harini Katakam Date: Thu, 10 Jul 2014 17:38:18 +0530 Subject: [PATCH] iicps: Slave monitor mode changes When enabling slave monitor, clear FIFO, enable read mode and clear the transfer size register. NACK interrupt should not be enabled as this will lead to the sw being interrupted everytime a retry fails. Signed-off-by: Harini Katakam --- .../drivers/iicps/src/xiicps_master.c | 19 ++++++++++++------- 1 file changed, 12 insertions(+), 7 deletions(-) diff --git a/XilinxProcessorIPLib/drivers/iicps/src/xiicps_master.c b/XilinxProcessorIPLib/drivers/iicps/src/xiicps_master.c index 383116c2..31dd16bb 100755 --- a/XilinxProcessorIPLib/drivers/iicps/src/xiicps_master.c +++ b/XilinxProcessorIPLib/drivers/iicps/src/xiicps_master.c @@ -500,25 +500,30 @@ int XIicPs_MasterRecvPolled(XIicPs *InstancePtr, u8 *MsgPtr, void XIicPs_EnableSlaveMonitor(XIicPs *InstancePtr, u16 SlaveAddr) { u32 BaseAddr; + u32 ConfigReg; Xil_AssertVoid(InstancePtr != NULL); BaseAddr = InstancePtr->Config.BaseAddress; + /* Clear transfer size register */ + XIicPs_WriteReg(BaseAddr, XIICPS_TRANS_SIZE_OFFSET, 0x0); + /* * Enable slave monitor mode in control register. */ - XIicPs_WriteReg(BaseAddr, XIICPS_CR_OFFSET, - XIicPs_ReadReg(BaseAddr, XIICPS_CR_OFFSET) | - XIICPS_CR_MS_MASK | - XIICPS_CR_NEA_MASK | - XIICPS_CR_SLVMON_MASK ); + ConfigReg = XIicPs_ReadReg(BaseAddr, XIICPS_CR_OFFSET); + ConfigReg |= XIICPS_CR_MS_MASK | XIICPS_CR_NEA_MASK | + XIICPS_CR_CLR_FIFO_MASK | XIICPS_CR_SLVMON_MASK); + ConfigReg &= ~XIICPS_CR_RD_WR_MASK; + + XIicPs_WriteReg(BaseAddr, XIICPS_CR_OFFSET, ConfigReg); /* * Set up interrupt flag for slave monitor interrupt. + * Dont enable NACK. */ - XIicPs_EnableInterrupts(BaseAddr, XIICPS_IXR_NACK_MASK | - XIICPS_IXR_SLV_RDY_MASK); + XIicPs_EnableInterrupts(BaseAddr, XIICPS_IXR_SLV_RDY_MASK); /* * Initialize the slave monitor register.