From 4f25fdb51f376bb8b0ce4352aa005df6d4f34ce7 Mon Sep 17 00:00:00 2001
From: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Date: Wed, 7 Jan 2015 12:58:51 -0800
Subject: [PATCH] dptx: Preserve main link enable status while link training.

Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
---
 XilinxProcessorIPLib/drivers/dptx/src/xdptx.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/XilinxProcessorIPLib/drivers/dptx/src/xdptx.c b/XilinxProcessorIPLib/drivers/dptx/src/xdptx.c
index 6f9a2d23..66244f38 100644
--- a/XilinxProcessorIPLib/drivers/dptx/src/xdptx.c
+++ b/XilinxProcessorIPLib/drivers/dptx/src/xdptx.c
@@ -414,6 +414,7 @@ u32 XDptx_CfgMainLinkMax(XDptx *InstancePtr)
 u32 XDptx_EstablishLink(XDptx *InstancePtr)
 {
 	u32 Status;
+	u32 ReenableMainLink;
 
 	/* Verify arguments. */
 	Xil_AssertNonvoid(InstancePtr != NULL);
@@ -433,6 +434,9 @@ u32 XDptx_EstablishLink(XDptx *InstancePtr)
 
 	XDptx_ResetPhy(InstancePtr, XDPTX_PHY_CONFIG_PHY_RESET_MASK);
 
+	ReenableMainLink = XDptx_ReadReg(InstancePtr->Config.BaseAddr,
+						XDPTX_ENABLE_MAIN_STREAM);
+
 	XDptx_DisableMainLink(InstancePtr);
 
 	/* Train main link. */
@@ -441,7 +445,9 @@ u32 XDptx_EstablishLink(XDptx *InstancePtr)
 		return XST_FAILURE;
 	}
 
-	XDptx_EnableMainLink(InstancePtr);
+	if (ReenableMainLink != 0) {
+		XDptx_EnableMainLink(InstancePtr);
+	}
 
 	return XST_SUCCESS;
 }