From 57fe691a623d1076ba5a81d56e90e67d15f5b410 Mon Sep 17 00:00:00 2001 From: VNSL Durga Date: Wed, 25 Feb 2015 14:48:58 +0530 Subject: [PATCH] vtc: Deprecated vtc_v6_1 and added active version vtc_7_0 Deprecated 6_1 and added 7_0 version for vtc driver. Signed-off-by: VNSL Durga --- XilinxProcessorIPLib/drivers/vtc/data/vtc.mdd | 46 + XilinxProcessorIPLib/drivers/vtc/data/vtc.tcl | 38 + .../drivers/vtc/examples/index.html | 17 + .../vtc/examples/vtc_selftest_example.c | 157 + XilinxProcessorIPLib/drivers/vtc/src/Makefile | 28 + XilinxProcessorIPLib/drivers/vtc/src/xvtc.c | 2596 +++++++++++++++++ XilinxProcessorIPLib/drivers/vtc/src/xvtc.h | 960 ++++++ XilinxProcessorIPLib/drivers/vtc/src/xvtc_g.c | 58 + .../drivers/vtc/src/xvtc_hw.h | 658 +++++ .../drivers/vtc/src/xvtc_intr.c | 295 ++ .../drivers/vtc/src/xvtc_selftest.c | 109 + .../drivers/vtc/src/xvtc_sinit.c | 115 + 12 files changed, 5077 insertions(+) create mode 100755 XilinxProcessorIPLib/drivers/vtc/data/vtc.mdd create mode 100755 XilinxProcessorIPLib/drivers/vtc/data/vtc.tcl create mode 100755 XilinxProcessorIPLib/drivers/vtc/examples/index.html create mode 100644 XilinxProcessorIPLib/drivers/vtc/examples/vtc_selftest_example.c create mode 100644 XilinxProcessorIPLib/drivers/vtc/src/Makefile create mode 100644 XilinxProcessorIPLib/drivers/vtc/src/xvtc.c create mode 100644 XilinxProcessorIPLib/drivers/vtc/src/xvtc.h create mode 100644 XilinxProcessorIPLib/drivers/vtc/src/xvtc_g.c create mode 100644 XilinxProcessorIPLib/drivers/vtc/src/xvtc_hw.h create mode 100644 XilinxProcessorIPLib/drivers/vtc/src/xvtc_intr.c create mode 100644 XilinxProcessorIPLib/drivers/vtc/src/xvtc_selftest.c create mode 100644 XilinxProcessorIPLib/drivers/vtc/src/xvtc_sinit.c diff --git a/XilinxProcessorIPLib/drivers/vtc/data/vtc.mdd b/XilinxProcessorIPLib/drivers/vtc/data/vtc.mdd new file mode 100755 index 00000000..b997cbfd --- /dev/null +++ b/XilinxProcessorIPLib/drivers/vtc/data/vtc.mdd @@ -0,0 +1,46 @@ +############################################################################## +# +# Copyright (C) 2008 - 2014 Xilinx, Inc. All rights reserved. +# +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"),to deal +# in the Software without restriction, including without limitation the rights +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +# copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# Use of the Software is limited solely to applications: +# (a) running on a Xilinx device, or +# (b) that interact with a Xilinx device through a bus or interconnect. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +# XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +# WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +# OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +# SOFTWARE. +# +# Except as contained in this notice, the name of the Xilinx shall not be used +# in advertising or otherwise to promote the sale, use or other dealings in +# this Software without prior written authorization from Xilinx. +# MODIFICATION HISTORY: +# +# Ver Who Date Changes +# -------- ------ -------- -------------------------------------------------- +# 6.0 adk 10/12/13 Removed interrupt handler entry +############################################################################### +OPTION psf_version = 2.1; + +BEGIN driver vtc + + OPTION supported_peripherals = (v_tc); + OPTION driver_state = ACTIVE; + OPTION copyfiles = all; + OPTION VERSION = 7.0; + OPTION NAME = vtc; + +END driver diff --git a/XilinxProcessorIPLib/drivers/vtc/data/vtc.tcl b/XilinxProcessorIPLib/drivers/vtc/data/vtc.tcl new file mode 100755 index 00000000..d2ed490f --- /dev/null +++ b/XilinxProcessorIPLib/drivers/vtc/data/vtc.tcl @@ -0,0 +1,38 @@ +############################################################################## +# +# Copyright (C) 2008 - 2014 Xilinx, Inc. All rights reserved. +# +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"),to deal +# in the Software without restriction, including without limitation the rights +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +# copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# Use of the Software is limited solely to applications: +# (a) running on a Xilinx device, or +# (b) that interact with a Xilinx device through a bus or interconnect. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +# XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +# WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +# OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +# SOFTWARE. +# +# Except as contained in this notice, the name of the Xilinx shall not be used +# in advertising or otherwise to promote the sale, use or other dealings in +# this Software without prior written authorization from Xilinx. +############################################################################### + +#uses "xillib.tcl" + +proc generate {drv_handle} { + ::hsi::utils::define_include_file $drv_handle "xparameters.h" "XVTC" "NUM_INSTANCES" "DEVICE_ID" "C_BASEADDR" "C_HIGHADDR" "C_GENERATE_EN" "C_DETECT_EN" "C_DET_HSYNC_EN" "C_DET_VSYNC_EN" "C_DET_HBLANK_EN" "C_DET_VBLANK_EN" "C_DET_AVIDEO_EN" "C_DET_ACHROMA_EN" + ::hsi::utils::define_config_file $drv_handle "xvtc_g.c" "XVtc" "DEVICE_ID" "C_BASEADDR" + ::hsi::utils::define_canonical_xpars $drv_handle "xparameters.h" "VTC" "DEVICE_ID" "C_BASEADDR" "C_HIGHADDR" "C_GENERATE_EN" "C_DETECT_EN" "C_DET_HSYNC_EN" "C_DET_VSYNC_EN" "C_DET_HBLANK_EN" "C_DET_VBLANK_EN" "C_DET_AVIDEO_EN" "C_DET_ACHROMA_EN" +} diff --git a/XilinxProcessorIPLib/drivers/vtc/examples/index.html b/XilinxProcessorIPLib/drivers/vtc/examples/index.html new file mode 100755 index 00000000..61b973d5 --- /dev/null +++ b/XilinxProcessorIPLib/drivers/vtc/examples/index.html @@ -0,0 +1,17 @@ + + + + + +Driver example applications + + + +

Example Applications for the driver vtc_v6_1

+
+ +

Copyright ? 1995-2014 Xilinx, Inc. All rights reserved.

+ + diff --git a/XilinxProcessorIPLib/drivers/vtc/examples/vtc_selftest_example.c b/XilinxProcessorIPLib/drivers/vtc/examples/vtc_selftest_example.c new file mode 100644 index 00000000..d1a74b84 --- /dev/null +++ b/XilinxProcessorIPLib/drivers/vtc/examples/vtc_selftest_example.c @@ -0,0 +1,157 @@ +/****************************************************************************** +* +* Copyright (C) 2014 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +* (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in +* this Software without prior written authorization from Xilinx. +* +******************************************************************************/ +/*****************************************************************************/ +/** +* +* @file vtc_selftest_example.c +* +* This file contains an example using the VTC driver to do self test +* on the core. +* +* @note None. +* +* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- ------ -------- ------------------------------------------------------
+* 6.1   adk    08/23/14  First Release.
+*
+* +******************************************************************************/ + +/***************************** Include Files *********************************/ + +#include "xparameters.h" +#include "xvtc.h" +#include "xil_printf.h" + +/************************** Constant Definitions *****************************/ + +/** The following constants map to the XPAR parameters created in the +* xparameters.h file. They are defined here such that a user can easily +* change all the needed parameters in one place. +*/ +#define XVTC_DEVICE_ID XPAR_VTC_0_DEVICE_ID + +/**************************** Type Definitions *******************************/ + + +/***************** Macros (Inline Functions) Definitions *********************/ + + +/************************** Function Prototypes ******************************/ + +int XVtcSelfTestExample(u16 DeviceId); + +/************************** Variable Definitions *****************************/ + +XVtc VtcInst; /**< Instance of the VTC core. */ + +/************************** Function Definitions *****************************/ + +/*****************************************************************************/ +/** +* +* Main/Entry function for self test example. +* +* @return +* - XST_SUCCESS if successful. +* - XST_FAILURE if unsuccessful. +* +* @note None. +* +******************************************************************************/ +int main(void) +{ + int Status; + + /* Run selftest example */ + Status = XVtcSelfTestExample((XVTC_DEVICE_ID)); + + /* Checking status */ + if (Status != (XST_SUCCESS)) { + xil_printf("VTC Selftest Example Failed.\r\n"); + return (XST_FAILURE); + } + + xil_printf("Successfully ran VTC driver Selftest Example.\r\n"); + + return (XST_SUCCESS); +} + +/*****************************************************************************/ +/** +* +* This function does a minimal test on the VTC driver. +* +* @param DeviceId is an ID of VTC core or device. +* +* @return +* - XST_SUCCESS if successful. +* - XST_FAILURE if unsuccessful. +* +* @note None. +* +******************************************************************************/ +int XVtcSelfTestExample(u16 DeviceId) +{ + int Status; + XVtc_Config *Config; + + /* Initialize the VTC driver so that it's ready to use look up + * configuration in the config table, then initialize it. + */ + Config = XVtc_LookupConfig(DeviceId); + + /* Checking Config variable */ + if (NULL == Config) { + return (XST_FAILURE); + } + + Status = XVtc_CfgInitialize(&VtcInst, Config, Config->BaseAddress); + + /* Checking status */ + if (Status != (XST_SUCCESS)) { + return (XST_FAILURE); + } + + /* Perform a self-test */ + Status = XVtc_SelfTest(&VtcInst); + + /* Checking status */ + if (Status != (XST_SUCCESS)) { + return (XST_FAILURE); + } + + return (XST_SUCCESS); +} diff --git a/XilinxProcessorIPLib/drivers/vtc/src/Makefile b/XilinxProcessorIPLib/drivers/vtc/src/Makefile new file mode 100644 index 00000000..ab4ef675 --- /dev/null +++ b/XilinxProcessorIPLib/drivers/vtc/src/Makefile @@ -0,0 +1,28 @@ +COMPILER= +ARCHIVER= +CP=cp +COMPILER_FLAGS= +EXTRA_COMPILER_FLAGS= +LIB=libxil.a +LEVEL=0 + +RELEASEDIR=../../../lib +INCLUDEDIR=../../../include +INCLUDES=-I./. -I${INCLUDEDIR} + +INCLUDEFILES=*.h +LIBSOURCES=*.c + +OUTS = *.o + +libs: + echo "Compiling video timing controller" + $(COMPILER) $(COMPILER_FLAGS) $(EXTRA_COMPILER_FLAGS) $(INCLUDES) $(LIBSOURCES) + $(ARCHIVER) -r ${RELEASEDIR}/${LIB} ${OUTS} + make clean + +include: + ${CP} $(INCLUDEFILES) $(INCLUDEDIR) + +clean: + rm -rf ${OUTS} diff --git a/XilinxProcessorIPLib/drivers/vtc/src/xvtc.c b/XilinxProcessorIPLib/drivers/vtc/src/xvtc.c new file mode 100644 index 00000000..712838ad --- /dev/null +++ b/XilinxProcessorIPLib/drivers/vtc/src/xvtc.c @@ -0,0 +1,2596 @@ +/****************************************************************************** +* +* Copyright (C) 2008 - 2014 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +* (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in +* this Software without prior written authorization from Xilinx. +* +******************************************************************************/ +/*****************************************************************************/ +/** +* +* @file xvtc.c +* +* This is main code of Xilinx MVI Video Timing Controller (VTC) device driver. +* The VTC device detects and generates video sync signals to Video IP cores +* like MVI Video Scaler. Please see xvtc.h for more details of the driver. +* +* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- ------ -------- --------------------------------------------------
+* 1.00a xd     08/05/08 First release.
+* 1.01a xd     07/23/10 Added GIER; Added more h/w generic info into
+*                       xparameters.h; Feed callbacks with pending
+*                       interrupt info. Added Doxygen & Version support.
+* 3.00a cjm    08/01/12 Converted from xio.h to xil_io.h, translating
+*                       basic types, MB cache functions, exceptions and
+*                       assertions to xil_io format.
+*                       Replaced the following:
+*                       "XExc_Init" -> "Xil_ExceptionInit"
+*                       "XExc_RegisterHandler" ->
+*                       "Xil_ExceptionRegisterHandler"
+*                       "XEXC_ID_NON_CRITICAL_INT" -> "XIL_EXCEPTION_ID_INT"
+*                       "XExceptionHandler" -> "Xil_ExceptionHandler"
+*                       "XExc_mEnableExceptions" -> "Xil_ExceptionEnable"
+*                       "XEXC_NON_CRITICAL" -> "XIL_EXCEPTION_NON_CRITICAL"
+*                       "XExc_DisableExceptions" -> "Xil_ExceptionDisable"
+*                       "XExc_RemoveHandler" -> "Xil_ExceptionRemoveHandler"
+*                       "microblaze_enable_interrupts" -> "Xil_ExceptionEnable"
+*                       "microblaze_disable_interrupts" ->
+*                       Xil_ExceptionDisable"
+*                       "XCOMPONENT_IS_STARTED" -> "XIL_COMPONENT_IS_STARTED"
+*                       "XCOMPONENT_IS_READY" -> "(XIL_COMPONENT_IS_READY)"
+*
+*                       "XASSERT_NONVOID" -> "Xil_AssertNonvoid"
+*                       "XASSERT_VOID_ALWAYS" -> "Xil_AssertVoidAlways"
+*                       "XASSERT_VOID" -> "Xil_AssertVoid"
+*                       "Xil_AssertVoid_ALWAYS" -> "Xil_AssertVoidAlways"
+*                       "XAssertStatus" -> "Xil_AssertStatus"
+*                       "XAssertSetCallback" -> "Xil_AssertCallback"
+*
+*                       "XASSERT_OCCURRED" -> "XIL_ASSERT_OCCURRED"
+*                       "XASSERT_NONE" -> "XIL_ASSERT_NONE"
+*
+*                       "microblaze_disable_dcache" -> "Xil_DCacheDisable"
+*                       "microblaze_enable_dcache" -> "Xil_DCacheEnable"
+*                       "microblaze_enable_icache" -> "Xil_ICacheEnable"
+*                       "microblaze_disable_icache" -> "Xil_ICacheDisable"
+*                       "microblaze_init_dcache_range" ->
+*                       "Xil_DCacheInvalidateRange"
+*                       "XCache_DisableDCache" -> "Xil_DCacheDisable"
+*                       "XCache_DisableICache" -> "Xil_ICacheDisable"
+*                       "XCache_EnableDCache" -> "Xil_DCacheEnableRegion"
+*                       "XCache_EnableICache" -> "Xil_ICacheEnableRegion"
+*                       "XCache_InvalidateDCacheLine" ->
+*                       "Xil_DCacheInvalidateRange"
+*
+*                       "XUtil_MemoryTest32" -> "Xil_TestMem32"
+*                       "XUtil_MemoryTest16" -> "Xil_TestMem16"
+*                       "XUtil_MemoryTest8" -> "Xil_TestMem8"
+*
+*                       "xutil.h" -> "xil_testmem.h"
+*
+*                       "xbasic_types.h" -> "xil_types.h"
+*                       "xio.h" -> "xil_io.h"
+*
+*                       "XIo_In32" -> "Xil_In32"
+*                       "XIo_Out32" -> "Xil_Out32"
+*
+*                       "XTRUE" -> "TRUE"
+*                       "XFALSE" -> "FALSE"
+*                       "XNULL" -> "NULL"
+*
+*                       "Xuint8" -> "u8"
+*                       "Xuint16" -> "u16"
+*                       "Xuint32" -> "u32"
+*                       "Xint8" -> "char"
+*                       "Xint16" -> "short"
+*                       "Xint32" -> "long"
+*                       "Xfloat32" -> "float"
+*                       "Xfloat64" -> "double"
+*                       "Xboolean" -> "int"
+*                       "XTEST_FAILED" -> "XST_FAILURE"
+*                       "XTEST_PASSED" -> "XST_SUCCESS"
+* 4.00a cjm    02/08/13 Removed XVTC_CTL_HASS_MASK
+* 5.00a cjm    08/07/13 Replaced CTL in Polarity and Encoding register
+*                       definition with "POL" and "ENC"
+* 5.00a cjm    10/30/13 Removed type parameter from XVtc_Enable which now
+*                       enables both generator and detector.
+*                       Added XVtc_EnableGenerator to enable only the Generator
+*                       Added XVtc_EnableDetector to enable only the Detector
+* 5.00a cjm    11/01/13 Added Timing, VideoMode and Signal Conversion Functions
+*                       XVtc_ConvVideoMode2Timing
+*                       XVtc_ConvTiming2Signal
+*                       XVtc_ConvSignal2Timing
+*                       XVtc_ConvTiming2VideoMode
+*                       Added Timing and Video Mode Set/Get Functions
+*                       XVtc_SetGeneratorTiming
+*                       XVtc_SetGeneratorVideoMode
+*                       XVtc_GetGeneratorTiming
+*                       XVtc_GetGeneratorVideoMode
+*                       XVtc_GetDetectorTiming
+*                       XVtc_GetDetectorVideoMode
+*                       Updated XVtc_GetGeneratorHoriOffset and
+*                       XVtc_SetGeneratorHoriOffset. For adding interlaced or
+*                       field-1 registers setting/getting updated
+*                       XVtc_SetGenerator to align vsync to hsync
+*                       horizontally by default.
+*                       Added Field 1 set/get to XVtc_SetGenerator,
+*                       XVtc_GetGenerator and XVtc_GetDetector.
+* 5.00a cjm    11/03/13 Added Chroma/field parity bit masks.
+*                       Replaced old timing bit masks/shifts with Start/End Bit
+*                       masks/shifts.
+* 6.1   adk    08/23/14 Modified HActiveVideo value to 1920 for
+*                       XVTC_VMODE_1080I mode.
+*                       Removed Major, Minor and Revision parameters from
+*                       XVtc_GetVersion.
+*                       Modified return type of XVtc_GetVersion from
+*                       void to u32.
+*
+* +******************************************************************************/ + +/***************************** Include Files *********************************/ + +#include "xvtc.h" +#include "xenv.h" + +/************************** Constant Definitions *****************************/ + + +/**************************** Type Definitions *******************************/ + + +/***************** Macros (Inline Functions) Definitions *********************/ + + +/************************** Function Prototypes ******************************/ + +/* +* Each of callback functions to be called on different types of interrupts. +* These stub functions are set during XVtc_CfgInitialize as default +* callback functions. If application is not registered any of the callback +* function, these functions will be called for doing nothing. +*/ +static void StubCallBack(void *CallBackRef); +static void StubErrCallBack(void *CallBackRef, u32 ErrorMask); + +/************************** Variable Definitions *****************************/ + + +/************************** Function Definitions *****************************/ + +/*****************************************************************************/ +/** +* +* This function initializes the VTC core. This function must be called +* prior to using the VTC core. Initialization of the VTC includes setting up +* the instance data, and ensuring the hardware is in a quiescent state. +* +* @param InstancePtr is a pointer to the VTC core instance to be +* worked on. +* @param CfgPtr points to the configuration structure associated with +* the VTC core. +* @param EffectiveAddr is the base address of the device. If address +* translation is being used, then this parameter must reflect the +* virtual base address. Otherwise, the physical address should be +* used. +* +* @return +* - XST_SUCCESS if XVtc_CfgInitialize was successful. +* +* @note None. +* +******************************************************************************/ +int XVtc_CfgInitialize(XVtc *InstancePtr, XVtc_Config *CfgPtr, + u32 EffectiveAddr) +{ + /* Verify arguments */ + Xil_AssertNonvoid(InstancePtr != NULL); + Xil_AssertNonvoid(CfgPtr != NULL); + Xil_AssertNonvoid((u32 *)EffectiveAddr != NULL); + + /* Setup the instance */ + memset((void *)InstancePtr, 0, sizeof(XVtc)); + + memcpy((void *)&(InstancePtr->Config), (const void *)CfgPtr, + sizeof(XVtc_Config)); + InstancePtr->Config.BaseAddress = EffectiveAddr; + + /* Set all handlers to stub values, let user configure this data later + */ + InstancePtr->FrameSyncCallBack = (XVtc_CallBack) StubCallBack; + InstancePtr->LockCallBack = (XVtc_CallBack) StubCallBack; + InstancePtr->DetectorCallBack = (XVtc_CallBack) StubCallBack; + InstancePtr->GeneratorCallBack = (XVtc_CallBack) StubCallBack; + InstancePtr->ErrCallBack = (XVtc_ErrorCallBack) StubErrCallBack; + + /* Reset the hardware and set the flag to indicate the driver is + * ready + */ + XVtc_Reset(InstancePtr); + InstancePtr->IsReady = (u32)(XIL_COMPONENT_IS_READY); + + return XST_SUCCESS; +} + +/*****************************************************************************/ +/** +* +* This function enables the VTC Generator core. +* +* @param InstancePtr is a pointer to the VTC instance to be +* worked on. +* +* @return None. +* +* @note None. +* +******************************************************************************/ +void XVtc_EnableGenerator(XVtc *InstancePtr) +{ + u32 CtrlRegValue; + + /* Verify arguments. */ + Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + + /* Read Control register value back */ + CtrlRegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, + (XVTC_CTL_OFFSET)); + + /* Change the value according to the enabling type and write it back */ + CtrlRegValue |= XVTC_CTL_GE_MASK; + + XVtc_WriteReg(InstancePtr->Config.BaseAddress, (XVTC_CTL_OFFSET), + CtrlRegValue); +} + +/*****************************************************************************/ +/** +* +* This function enables the VTC Detector core +* +* @param InstancePtr is a pointer to the VTC instance to be +* worked on. +* +* @return None. +* +* @note None. +* +******************************************************************************/ +void XVtc_EnableDetector(XVtc *InstancePtr) +{ + u32 CtrlRegValue; + + /* Verify arguments. */ + Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + + /* Read Control register value back */ + CtrlRegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, + (XVTC_CTL_OFFSET)); + + /* Change the value according to the enabling type and write it back */ + CtrlRegValue |= XVTC_CTL_DE_MASK; + + XVtc_WriteReg(InstancePtr->Config.BaseAddress, (XVTC_CTL_OFFSET), + CtrlRegValue); +} + +/*****************************************************************************/ +/** +* +* This function enables the Detector and Generator at same time of the +* VTC core. +* +* @param InstancePtr is a pointer to the VTC instance to be +* worked on. +* +* @return None. +* +* @note None. +* +******************************************************************************/ +void XVtc_Enable(XVtc *InstancePtr) +{ + u32 CtrlRegValue; + + /* Verify arguments. */ + Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + + /* Read Control register value back */ + CtrlRegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, + (XVTC_CTL_OFFSET)); + + /* Setup the SW Enable Bit and write it back */ + CtrlRegValue |= XVTC_CTL_SW_MASK; + + XVtc_WriteReg(InstancePtr->Config.BaseAddress, (XVTC_CTL_OFFSET), + CtrlRegValue); +} + +/*****************************************************************************/ +/** +* +* This function disables the VTC Generator core. +* +* @param InstancePtr is a pointer to the VTC instance to be +* worked on. +* +* @return None. +* +* @note None. +* +******************************************************************************/ +void XVtc_DisableGenerator(XVtc *InstancePtr) +{ + u32 CtrlRegValue; + + /* Verify arguments. */ + Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + + /* Read Control register value back */ + CtrlRegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, + (XVTC_CTL_OFFSET)); + + /* Change the value according to the disabling type and write it + * back + */ + CtrlRegValue &= (u32)(~(XVTC_CTL_GE_MASK)); + + XVtc_WriteReg(InstancePtr->Config.BaseAddress, (XVTC_CTL_OFFSET), + CtrlRegValue); +} + +/*****************************************************************************/ +/** +* +* This function disables the VTC Detector core. +* +* @param InstancePtr is a pointer to the VTC instance to be +* worked on. +* +* @return None. +* +* @note None. +* +******************************************************************************/ +void XVtc_DisableDetector(XVtc *InstancePtr) +{ + u32 CtrlRegValue; + + /* Verify arguments. */ + Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + + /* Read Control register value back */ + CtrlRegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, + (XVTC_CTL_OFFSET)); + + /* Change the value according to the disabling type and write it + * back + */ + CtrlRegValue &= (u32)(~(XVTC_CTL_DE_MASK)); + + XVtc_WriteReg(InstancePtr->Config.BaseAddress, (XVTC_CTL_OFFSET), + CtrlRegValue); +} + +/*****************************************************************************/ +/** +* +* This function disables the Detector and Generator at same time of the VTC +* core. +* +* @param InstancePtr is a pointer to the VTC instance to be +* worked on. +* +* @return None. +* +* @note None. +* +******************************************************************************/ +void XVtc_Disable(XVtc *InstancePtr) +{ + u32 CtrlRegValue; + + /* Verify arguments. */ + Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + + /* Read Control register value back */ + CtrlRegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, + (XVTC_CTL_OFFSET)); + + /* Change the value, clearing Core Enable, and write it back*/ + CtrlRegValue &= ~XVTC_CTL_SW_MASK; + + XVtc_WriteReg(InstancePtr->Config.BaseAddress, (XVTC_CTL_OFFSET), + CtrlRegValue); +} + +/*****************************************************************************/ +/** +* +* This function sets up the output polarity of the VTC core. +* +* @param InstancePtr is a pointer to the VTC instance to be +* worked on. +* @param PolarityPtr points to a Polarity configuration structure with +* the setting to use on the VTC core. +* +* @return None. +* +* @note None. +* +*****************************************************************************/ +void XVtc_SetPolarity(XVtc *InstancePtr, XVtc_Polarity *PolarityPtr) +{ + u32 PolRegValue; + + /* Verify arguments. */ + Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertVoid(PolarityPtr != NULL); + + /* Read Control register value back and clear all polarity + * bits first + */ + PolRegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, + (XVTC_GPOL_OFFSET)); + PolRegValue &= (u32)(~(XVTC_POL_ALLP_MASK)); + + /* Change the register value according to the setting in the Polarity + * configuration structure + */ + if (PolarityPtr->ActiveChromaPol) + PolRegValue |= XVTC_POL_ACP_MASK; + + if (PolarityPtr->ActiveVideoPol) + PolRegValue |= XVTC_POL_AVP_MASK; + + if (PolarityPtr->FieldIdPol) + PolRegValue |= XVTC_POL_FIP_MASK; + + if (PolarityPtr->VBlankPol) + PolRegValue |= XVTC_POL_VBP_MASK; + + if (PolarityPtr->VSyncPol) + PolRegValue |= XVTC_POL_VSP_MASK; + + if (PolarityPtr->HBlankPol) + PolRegValue |= XVTC_POL_HBP_MASK; + + if (PolarityPtr->HSyncPol) + PolRegValue |= XVTC_POL_HSP_MASK; + + XVtc_WriteReg(InstancePtr->Config.BaseAddress, (XVTC_GPOL_OFFSET), + PolRegValue); +} + +/*****************************************************************************/ +/** +* +* This function gets the output polarity setting used by the VTC core. +* +* @param InstancePtr is a pointer to the VTC instance to be +* worked on. +* @param PolarityPtr points to a Polarity configuration structure that +* will be populated with the setting used on the VTC core +* after this function returns. +* +* @return None. +* +* @note None. +* +******************************************************************************/ +void XVtc_GetPolarity(XVtc *InstancePtr, XVtc_Polarity *PolarityPtr) +{ + u32 PolRegValue; + + /* Verify arguments. */ + Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertVoid(PolarityPtr != NULL); + + /* Clear the Polarity configuration structure */ + memset((void *)PolarityPtr, 0, sizeof(XVtc_Polarity)); + + /* Read Control register value back */ + PolRegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, + (XVTC_GPOL_OFFSET)); + + /* Populate the Polarity configuration structure w/ the current setting + * used in the device + */ + if (PolRegValue & XVTC_POL_ACP_MASK) + PolarityPtr->ActiveChromaPol = 1; + + if (PolRegValue & XVTC_POL_AVP_MASK) + PolarityPtr->ActiveVideoPol = 1; + + if (PolRegValue & XVTC_POL_FIP_MASK) + PolarityPtr->FieldIdPol = 1; + + if (PolRegValue & XVTC_POL_VBP_MASK) + PolarityPtr->VBlankPol = 1; + + if (PolRegValue & XVTC_POL_VSP_MASK) + PolarityPtr->VSyncPol = 1; + + if (PolRegValue & XVTC_POL_HBP_MASK) + PolarityPtr->HBlankPol = 1; + + if (PolRegValue & XVTC_POL_HSP_MASK) + PolarityPtr->HSyncPol = 1; +} + +/*****************************************************************************/ +/** +* +* This function gets the input polarity setting used by the VTC core. +* +* @param InstancePtr is a pointer to the VTC instance to be +* worked on. +* @param PolarityPtr points to a Polarity configuration structure that +* will be populated with the setting used on the VTC core after +* this function returns. +* +* @return None. +* +* @note None. +* +******************************************************************************/ +void XVtc_GetDetectorPolarity(XVtc *InstancePtr, XVtc_Polarity *PolarityPtr) +{ + u32 PolRegValue; + + /* Verify arguments. */ + Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertVoid(PolarityPtr != NULL); + + /* Clear the Polarity configuration structure */ + memset((void *)PolarityPtr, 0, sizeof(XVtc_Polarity)); + + /* Read Control register value back */ + PolRegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, + (XVTC_DPOL_OFFSET)); + + /* Populate the Polarity configuration structure w/ the current setting + * used in the core. + */ + if (PolRegValue & XVTC_POL_ACP_MASK) + PolarityPtr->ActiveChromaPol = 1; + + if (PolRegValue & XVTC_POL_AVP_MASK) + PolarityPtr->ActiveVideoPol = 1; + + if (PolRegValue & XVTC_POL_FIP_MASK) + PolarityPtr->FieldIdPol = 1; + + if (PolRegValue & XVTC_POL_VBP_MASK) + PolarityPtr->VBlankPol = 1; + + if (PolRegValue & XVTC_POL_VSP_MASK) + PolarityPtr->VSyncPol = 1; + + if (PolRegValue & XVTC_POL_HBP_MASK) + PolarityPtr->HBlankPol = 1; + + if (PolRegValue & XVTC_POL_HSP_MASK) + PolarityPtr->HSyncPol = 1; +} + +/*****************************************************************************/ +/** +* +* This function sets up the source selecting of the VTC core. +* +* @param InstancePtr is a pointer to the VTC instance to be +* worked on +* @param SourcePtr points to a Source Selecting configuration structure +* with the setting to use on the VTC device. +* +* @return None. +* +* @note None. +* +******************************************************************************/ +void XVtc_SetSource(XVtc *InstancePtr, XVtc_SourceSelect *SourcePtr) +{ + u32 CtrlRegValue; + + /* Verify arguments. */ + Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertVoid(SourcePtr != NULL); + + /* Read Control register value back and clear all source selection bits + * first + */ + CtrlRegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, + (XVTC_CTL_OFFSET)); + CtrlRegValue &= ~XVTC_CTL_ALLSS_MASK; + + /* Change the register value according to the setting in the source + * selection configuration structure + */ + + if (SourcePtr->FieldIdPolSrc) + CtrlRegValue |= XVTC_CTL_FIPSS_MASK; + + if (SourcePtr->ActiveChromaPolSrc) + CtrlRegValue |= XVTC_CTL_ACPSS_MASK; + + if (SourcePtr->ActiveVideoPolSrc) + CtrlRegValue |= XVTC_CTL_AVPSS_MASK; + + if (SourcePtr->HSyncPolSrc) + CtrlRegValue |= XVTC_CTL_HSPSS_MASK; + + if (SourcePtr->VSyncPolSrc) + CtrlRegValue |= XVTC_CTL_VSPSS_MASK; + + if (SourcePtr->HBlankPolSrc) + CtrlRegValue |= XVTC_CTL_HBPSS_MASK; + + if (SourcePtr->VBlankPolSrc) + CtrlRegValue |= XVTC_CTL_VBPSS_MASK; + + + if (SourcePtr->VChromaSrc) + CtrlRegValue |= XVTC_CTL_VCSS_MASK; + + if (SourcePtr->VActiveSrc) + CtrlRegValue |= XVTC_CTL_VASS_MASK; + + if (SourcePtr->VBackPorchSrc) + CtrlRegValue |= XVTC_CTL_VBSS_MASK; + + if (SourcePtr->VSyncSrc) + CtrlRegValue |= XVTC_CTL_VSSS_MASK; + + if (SourcePtr->VFrontPorchSrc) + CtrlRegValue |= XVTC_CTL_VFSS_MASK; + + if (SourcePtr->VTotalSrc) + CtrlRegValue |= XVTC_CTL_VTSS_MASK; + + if (SourcePtr->HBackPorchSrc) + CtrlRegValue |= XVTC_CTL_HBSS_MASK; + + if (SourcePtr->HSyncSrc) + CtrlRegValue |= XVTC_CTL_HSSS_MASK; + + if (SourcePtr->HFrontPorchSrc) + CtrlRegValue |= XVTC_CTL_HFSS_MASK; + + if (SourcePtr->HTotalSrc) + CtrlRegValue |= XVTC_CTL_HTSS_MASK; + + XVtc_WriteReg(InstancePtr->Config.BaseAddress, (XVTC_CTL_OFFSET), + CtrlRegValue); +} + +/*****************************************************************************/ +/** +* +* This function gets the source select setting used by the VTC core. +* +* @param InstancePtr is a pointer to the VTC instance to be +* worked on. +* @param SourcePtr points to a source select configuration structure +* that will be populated with the setting used on the VTC core +* after this function returns. +* +* @return None. +* +* @note None. +* +*****************************************************************************/ +void XVtc_GetSource(XVtc *InstancePtr, XVtc_SourceSelect *SourcePtr) +{ + u32 CtrlRegValue; + + /* Verify arguments. */ + Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertVoid(SourcePtr != NULL); + + /* Clear the source selection configuration structure */ + memset((void *)SourcePtr, 0, sizeof(XVtc_SourceSelect)); + + /* Read Control register value back */ + CtrlRegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, + (XVTC_CTL_OFFSET)); + + /* Populate the source select configuration structure with the current + * setting used in the core + */ + if (CtrlRegValue & XVTC_CTL_FIPSS_MASK) + SourcePtr->FieldIdPolSrc = 1; + if (CtrlRegValue & XVTC_CTL_ACPSS_MASK) + SourcePtr->ActiveChromaPolSrc = 1; + if (CtrlRegValue & XVTC_CTL_AVPSS_MASK) + SourcePtr->ActiveVideoPolSrc= 1; + if (CtrlRegValue & XVTC_CTL_HSPSS_MASK) + SourcePtr->HSyncPolSrc = 1; + if (CtrlRegValue & XVTC_CTL_VSPSS_MASK) + SourcePtr->VSyncPolSrc = 1; + if (CtrlRegValue & XVTC_CTL_HBPSS_MASK) + SourcePtr->HBlankPolSrc = 1; + if (CtrlRegValue & XVTC_CTL_VBPSS_MASK) + SourcePtr->VBlankPolSrc = 1; + + if (CtrlRegValue & XVTC_CTL_VCSS_MASK) + SourcePtr->VChromaSrc = 1; + if (CtrlRegValue & XVTC_CTL_VASS_MASK) + SourcePtr->VActiveSrc = 1; + if (CtrlRegValue & XVTC_CTL_VBSS_MASK) + SourcePtr->VBackPorchSrc = 1; + if (CtrlRegValue & XVTC_CTL_VSSS_MASK) + SourcePtr->VSyncSrc = 1; + if (CtrlRegValue & XVTC_CTL_VFSS_MASK) + SourcePtr->VFrontPorchSrc = 1; + if (CtrlRegValue & XVTC_CTL_VTSS_MASK) + SourcePtr->VTotalSrc = 1; + if (CtrlRegValue & XVTC_CTL_HBSS_MASK) + SourcePtr->HBackPorchSrc = 1; + if (CtrlRegValue & XVTC_CTL_HSSS_MASK) + SourcePtr->HSyncSrc = 1; + if (CtrlRegValue & XVTC_CTL_HFSS_MASK) + SourcePtr->HFrontPorchSrc = 1; + if (CtrlRegValue & XVTC_CTL_HTSS_MASK) + SourcePtr->HTotalSrc = 1; +} + +/*****************************************************************************/ +/** +* +* This function sets up the line skip setting of the Generator in the VTC +* core. +* +* @param InstancePtr is a pointer to the VTC instance to be +* worked on. +* @param GeneratorChromaSkip indicates whether to skip 1 line between +* active chroma for the Generator module. Use Non-0 value for +* this parameter to skip 1 line, and 0 to not skip lines. +* +* @return None. +* +* @note None. +* +******************************************************************************/ +void XVtc_SetSkipLine(XVtc *InstancePtr, int GeneratorChromaSkip) +{ + u32 FrameEncodeRegValue; + + /* Verify arguments. */ + Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + + /* Read Control register value back and clear all skip bits first */ + FrameEncodeRegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, + (XVTC_GFENC_OFFSET)); + FrameEncodeRegValue &= (u32)(~(XVTC_ENC_GACLS_MASK)); + + /* Change the register value according to the skip setting passed + * into this function. + */ + if (GeneratorChromaSkip) + FrameEncodeRegValue |= XVTC_ENC_GACLS_MASK; + + XVtc_WriteReg(InstancePtr->Config.BaseAddress, (XVTC_GFENC_OFFSET), + FrameEncodeRegValue); +} + +/*****************************************************************************/ +/** +* +* This function gets the line skip setting used by the Generator in the VTC +* core. +* +* @param InstancePtr is a pointer to the VTC instance to be +* worked on. +* @param GeneratorChromaSkipPtr will point to the value indicating +* whether one line is skipped between active chroma for the +* Generator module after this function returns. Value 1 means +* that 1 line is skipped and zero means that no lines are +* skipped. +* +* @return None. +* +* @note None. +* +******************************************************************************/ +void XVtc_GetSkipLine(XVtc *InstancePtr, int *GeneratorChromaSkipPtr) +{ + u32 FrameEncodeRegValue; + + /* Verify arguments. */ + Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertVoid(GeneratorChromaSkipPtr != NULL); + + /* Read Control register value back */ + FrameEncodeRegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, + (XVTC_GFENC_OFFSET)); + + /* Populate the skip variable values according to the skip setting + * used by the core. + */ + if (FrameEncodeRegValue & XVTC_ENC_GACLS_MASK) + *GeneratorChromaSkipPtr = 1; + else + *GeneratorChromaSkipPtr = 0; +} + +/*****************************************************************************/ +/** +* +* This function sets up the pixel skip setting of the Generator in the VTC +* core. +* +* @param InstancePtr is a pointer to the VTC instance to be +* worked on. +* @param GeneratorChromaSkip indicates whether to skip 1 pixel between +* active chroma for the Generator module. Use Non-0 value for +* this parameter to skip 1 pixel, and 0 to not skip pixels +* +* @return None. +* +* @note None. +* +******************************************************************************/ +void XVtc_SetSkipPixel(XVtc *InstancePtr, int GeneratorChromaSkip) +{ + u32 FrameEncodeRegValue; + + /* Verify arguments. */ + Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(InstancePtr->IsReady == (u32)(XIL_COMPONENT_IS_READY)); + + /* Read Control register value back and clear all skip bits first */ + FrameEncodeRegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, + (XVTC_GFENC_OFFSET)); + FrameEncodeRegValue &= (u32)(~(XVTC_ENC_GACPS_MASK)); + + /* Change the register value according to the skip setting passed + * into this function. + */ + if (GeneratorChromaSkip) + FrameEncodeRegValue |= XVTC_ENC_GACPS_MASK; + + XVtc_WriteReg(InstancePtr->Config.BaseAddress, (XVTC_GFENC_OFFSET), + FrameEncodeRegValue); +} + +/*****************************************************************************/ +/** +* +* This function gets the pixel skip setting used by the Generator in the VTC +* core. +* +* @param InstancePtr is a pointer to the VTC instance to be +* worked on. +* @param GeneratorChromaSkipPtr will point to the value indicating +* whether one pixel is skipped between active chroma for the +* Generator module after this function returns. Value 1 means +* that 1 pixel is skipped and zero means that no pixels are +* skipped. +* +* @return None. +* +* @note None. +* +******************************************************************************/ +void XVtc_GetSkipPixel(XVtc *InstancePtr, int *GeneratorChromaSkipPtr) +{ + u32 FrameEncodeRegValue; + + /* Verify arguments. */ + Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertVoid(GeneratorChromaSkipPtr != NULL); + + /* Read Control register value back */ + FrameEncodeRegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, + (XVTC_GFENC_OFFSET)); + + /* Populate the skip variable values according to the skip setting + * used by the core. + */ + if (FrameEncodeRegValue & XVTC_ENC_GACPS_MASK) + *GeneratorChromaSkipPtr = 1; + else + *GeneratorChromaSkipPtr = 0; +} + +/*****************************************************************************/ +/** +* +* This function sets up the Generator delay setting of the VTC core. +* +* @param InstancePtr is a pointer to the VTC instance to be +* worked on. +* @param VertDelay indicates the number of total lines per frame to +* delay the generator output. The valid range is from 0 to 4095. +* @param HoriDelay indicates the number of total clock cycles per line +* to delay the generator output. The valid range is from 0 to +* 4095. +* +* @return None. +* +* @note None. +* +******************************************************************************/ +void XVtc_SetDelay(XVtc *InstancePtr, int VertDelay, int HoriDelay) +{ + u32 RegValue; + + /* Verify arguments. */ + Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertVoid(VertDelay >= 0); + Xil_AssertVoid(HoriDelay >= 0); + Xil_AssertVoid(VertDelay <= 4095); + Xil_AssertVoid(HoriDelay <= 4095); + + /* Calculate the delay value */ + RegValue = HoriDelay & XVTC_GGD_HDELAY_MASK; + RegValue |= (VertDelay << XVTC_GGD_VDELAY_SHIFT) & + XVTC_GGD_VDELAY_MASK; + + /* Update the Generator Global Delay register w/ the value */ + XVtc_WriteReg(InstancePtr->Config.BaseAddress, (XVTC_GGD_OFFSET), + RegValue); +} + +/*****************************************************************************/ +/** +* +* This function gets the Generator delay setting used by the VTC core. +* +* @param InstancePtr is a pointer to the VTC instance to be +* worked on. +* @param VertDelayPtr will point to a value indicating the number of +* total lines per frame to delay the generator output after +* this function returns. +* @param HoriDelayPtr will point to a value indicating the number of +* total clock cycles per line to delay the generator output +* after this function returns. +* +* @return None. +* +* @note None. +* +******************************************************************************/ +void XVtc_GetDelay(XVtc *InstancePtr, int *VertDelayPtr, int *HoriDelayPtr) +{ + u32 RegValue; + + /* Verify arguments. */ + Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertVoid(VertDelayPtr != NULL); + Xil_AssertVoid(HoriDelayPtr != NULL); + + /* Read the Generator Global Delay register value */ + RegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, + (XVTC_GGD_OFFSET)); + + /* Calculate the delay values */ + *HoriDelayPtr = RegValue & XVTC_GGD_HDELAY_MASK; + *VertDelayPtr = (RegValue & XVTC_GGD_VDELAY_MASK) >> + XVTC_GGD_VDELAY_SHIFT; +} + +/*****************************************************************************/ +/** +* +* This function sets up the SYNC setting of a frame sync used by the VTC +* core. +* +* @param InstancePtr is a pointer to the VTC instance to be +* worked on. +* @param FrameSyncIndex indicates the index number of the frame sync. +* The valid range is from 0 to 15. +* @param VertStart indicates the vertical line count during which the +* frame sync is active. The valid range is from 0 to 4095. +* @param HoriStart indicates the horizontal cycle count during which the +* frame sync is active. The valid range is from 0 to 4095. +* +* @return None. +* +* @note None. +* +******************************************************************************/ +void XVtc_SetFSync(XVtc *InstancePtr, u16 FrameSyncIndex, u16 VertStart, + u16 HoriStart) +{ + u32 RegValue; + u32 RegAddress; + + /* Verify arguments. */ + Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertVoid(FrameSyncIndex <= 15); + Xil_AssertVoid(VertStart <= 4095); + Xil_AssertVoid(HoriStart <= 4095); + + /* Calculate the sync value */ + RegValue = HoriStart & XVTC_FSXX_HSTART_MASK; + RegValue |= (VertStart << XVTC_FSXX_VSTART_SHIFT) & + XVTC_FSXX_VSTART_MASK; + + /* Calculate the frame sync register address to write to */ + RegAddress = XVTC_FS00_OFFSET + FrameSyncIndex * XVTC_REG_ADDRGAP; + + /* Update the Generator Global Delay register w/ the value */ + XVtc_WriteReg(InstancePtr->Config.BaseAddress, RegAddress, RegValue); +} + +/*****************************************************************************/ +/** +* +* This function gets the SYNC setting of a frame sync used by the VTC core. +* +* @param InstancePtr is a pointer to the VTC instance to be +* worked on. +* @param FrameSyncIndex indicates the index number of the frame sync. +* The valid range is from 0 to 15. +* @param VertStartPtr will point to the value that indicates the +* vertical line count during which the frame sync is active once +* this function returns. +* @param HoriStartPtr will point to the value that indicates the +* horizontal cycle count during which the frame sync is active +* once this function returns. +* +* @return None. +* +******************************************************************************/ +void XVtc_GetFSync(XVtc *InstancePtr, u16 FrameSyncIndex, + u16 *VertStartPtr, u16 *HoriStartPtr) +{ + u32 RegValue; + u32 RegAddress; + + /* Assert bad arguments and conditions */ + Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertVoid(FrameSyncIndex <= 15); + Xil_AssertVoid(VertStartPtr != NULL); + Xil_AssertVoid(VertStartPtr != NULL); + + /* Calculate the frame sync register address to read from */ + RegAddress = XVTC_FS00_OFFSET + FrameSyncIndex * XVTC_REG_ADDRGAP; + + /* Read the frame sync register value */ + RegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, RegAddress); + + /* Calculate the frame sync values */ + *HoriStartPtr = RegValue & XVTC_FSXX_HSTART_MASK; + *VertStartPtr = (RegValue & XVTC_FSXX_VSTART_MASK) >> + XVTC_FSXX_VSTART_SHIFT; +} + +/*****************************************************************************/ +/** + * This function sets the VBlank/VSync Horizontal Offsets for the Generator + * in a VTC device. + * + * @param InstancePtr is a pointer to the VTC device instance to be worked on. + * @param HoriOffsets points to a VBlank/VSync Horizontal Offset configuration + * with the setting to use on the VTC device. + * @return NONE. + * + *****************************************************************************/ +void XVtc_SetGeneratorHoriOffset(XVtc *InstancePtr, + XVtc_HoriOffsets *HoriOffsets) +{ + u32 RegValue; + + /* Assert bad arguments and conditions */ + Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertVoid(HoriOffsets != NULL); + + /* Calculate and update Generator VBlank Hori. Offset 0 register value + */ + RegValue = (HoriOffsets->V0BlankHoriStart) & XVTC_XVXHOX_HSTART_MASK; + RegValue |= (HoriOffsets->V0BlankHoriEnd << XVTC_XVXHOX_HEND_SHIFT) & + XVTC_XVXHOX_HEND_MASK; + XVtc_WriteReg(InstancePtr->Config.BaseAddress, XVTC_GVBHOFF_OFFSET, + RegValue); + + /* Calculate and update Generator VSync Hori. Offset 0 register + * value + */ + RegValue = (HoriOffsets->V0SyncHoriStart) & XVTC_XVXHOX_HSTART_MASK; + RegValue |= (HoriOffsets->V0SyncHoriEnd << XVTC_XVXHOX_HEND_SHIFT) & + XVTC_XVXHOX_HEND_MASK; + XVtc_WriteReg(InstancePtr->Config.BaseAddress, XVTC_GVSHOFF_OFFSET, + RegValue); + + /* Calculate and update Generator VBlank Hori. Offset 1 register + * value + */ + RegValue = (HoriOffsets->V1BlankHoriStart) & XVTC_XVXHOX_HSTART_MASK; + RegValue |= (HoriOffsets->V1BlankHoriEnd << XVTC_XVXHOX_HEND_SHIFT) & + XVTC_XVXHOX_HEND_MASK; + XVtc_WriteReg(InstancePtr->Config.BaseAddress, XVTC_GVBHOFF_F1_OFFSET, + RegValue); + + /* Calculate and update Generator VSync Hori. Offset 1 register + * value + */ + RegValue = (HoriOffsets->V1SyncHoriStart) & XVTC_XVXHOX_HSTART_MASK; + RegValue |= (HoriOffsets->V1SyncHoriEnd << XVTC_XVXHOX_HEND_SHIFT) & + XVTC_XVXHOX_HEND_MASK; + XVtc_WriteReg(InstancePtr->Config.BaseAddress, + XVTC_GVSHOFF_F1_OFFSET, + RegValue); +} + +/*****************************************************************************/ +/** +* +* This function gets the VBlank/VSync Horizontal Offsets currently used by +* the Generator in the VTC core. +* +* @param InstancePtr is a pointer to the VTC instance to be +* worked on. +* @param HoriOffsets points to a VBlank/VSync Horizontal Offset +* configuration structure that will be populated with the setting +* currently used on the Generator in the given VTC device after +* this function returns. +* +* @return None. +* +* @note None. +* +******************************************************************************/ +void XVtc_GetGeneratorHoriOffset(XVtc *InstancePtr, + XVtc_HoriOffsets *HoriOffsets) +{ + u32 RegValue; + + /* Verify arguments. */ + Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertVoid(HoriOffsets != NULL); + + /* Parse Generator VBlank Hori. Offset 0 register value */ + RegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, + XVTC_GVBHOFF_OFFSET); + HoriOffsets->V0BlankHoriStart = RegValue & XVTC_XVXHOX_HSTART_MASK; + HoriOffsets->V0BlankHoriEnd = (RegValue & XVTC_XVXHOX_HEND_MASK) + >> XVTC_XVXHOX_HEND_SHIFT; + + /* Parse Generator VSync Hori. Offset 0 register value */ + RegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, + XVTC_GVSHOFF_OFFSET); + HoriOffsets->V0SyncHoriStart = RegValue & XVTC_XVXHOX_HSTART_MASK; + HoriOffsets->V0SyncHoriEnd = (RegValue & XVTC_XVXHOX_HEND_MASK) + >> XVTC_XVXHOX_HEND_SHIFT; + + /* Parse Generator VBlank Hori. Offset 1 register value */ + RegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, + XVTC_GVBHOFF_F1_OFFSET); + HoriOffsets->V1BlankHoriStart = RegValue & XVTC_XVXHOX_HSTART_MASK; + HoriOffsets->V1BlankHoriEnd = (RegValue & XVTC_XVXHOX_HEND_MASK) + >> XVTC_XVXHOX_HEND_SHIFT; + + /* Parse Generator VSync Hori. Offset 1 register value */ + RegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, + XVTC_GVSHOFF_F1_OFFSET); + HoriOffsets->V1SyncHoriStart = RegValue & XVTC_XVXHOX_HSTART_MASK; + HoriOffsets->V1SyncHoriEnd = (RegValue & XVTC_XVXHOX_HEND_MASK) + >> XVTC_XVXHOX_HEND_SHIFT; +} + +/*****************************************************************************/ +/** +* +* This function gets the VBlank/VSync Horizontal Offsets detected by +* the Detector in the VTC core. +* +* @param InstancePtr is a pointer to the VTC instance to be +* worked on. +* @param HoriOffsets points to a VBlank/VSync Horizontal Offset +* configuration structure that will be populated with the setting +* detected on the Detector in the given VTC device after this +* function returns. +* +* @return None. +* +* @note None. +* +******************************************************************************/ +void XVtc_GetDetectorHoriOffset(XVtc *InstancePtr, + XVtc_HoriOffsets *HoriOffsets) +{ + u32 RegValue; + + /* Verify arguments. */ + Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertVoid(HoriOffsets != NULL); + + /* Parse Detector VBlank Hori. Offset 0 register value */ + RegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, + XVTC_DVBHOFF_OFFSET); + HoriOffsets->V0BlankHoriStart = RegValue & XVTC_XVXHOX_HSTART_MASK; + HoriOffsets->V0BlankHoriEnd = (RegValue & XVTC_XVXHOX_HEND_MASK) + >> XVTC_XVXHOX_HEND_SHIFT; + + /* Parse Detector VSync Hori. Offset 0 register value */ + RegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, + XVTC_DVSHOFF_OFFSET); + HoriOffsets->V0SyncHoriStart = RegValue & XVTC_XVXHOX_HSTART_MASK; + HoriOffsets->V0SyncHoriEnd = (RegValue & XVTC_XVXHOX_HEND_MASK) + >> XVTC_XVXHOX_HEND_SHIFT; + + /* Parse Detector VBlank Hori. Offset 1 register value */ + RegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, + XVTC_DVBHOFF_F1_OFFSET); + HoriOffsets->V1BlankHoriStart = RegValue & XVTC_XVXHOX_HSTART_MASK; + HoriOffsets->V1BlankHoriEnd = (RegValue & XVTC_XVXHOX_HEND_MASK) + >> XVTC_XVXHOX_HEND_SHIFT; + + /* Parse Detector VSync Hori. Offset 1 register value */ + RegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, + XVTC_DVSHOFF_F1_OFFSET); + HoriOffsets->V1SyncHoriStart = RegValue & XVTC_XVXHOX_HSTART_MASK; + HoriOffsets->V1SyncHoriEnd = (RegValue & XVTC_XVXHOX_HEND_MASK) + >> XVTC_XVXHOX_HEND_SHIFT; +} + +/*****************************************************************************/ +/** +* +* This function sets up VTC signal to be used by the Generator module +* in the VTC core. +* +* @param InstancePtr is a pointer to the VTC instance to be +* worked on. +* @param SignalCfgPtr is a pointer to the VTC signal configuration +* to be used by the Generator module in the VTC core. +* +* @return None. +* +* @note None. +* +*****************************************************************************/ +void XVtc_SetGenerator(XVtc *InstancePtr, XVtc_Signal *SignalCfgPtr) +{ + u32 RegValue; + u32 r_htotal, r_vtotal, r_hactive, r_vactive; + XVtc_Signal *SCPtr; + XVtc_HoriOffsets horiOffsets; + + /* Verify arguments. */ + Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertVoid(SignalCfgPtr != NULL); + + SCPtr = SignalCfgPtr; + if(SCPtr->OriginMode == 0) + { + r_htotal = SCPtr->HTotal+1; + r_vtotal = SCPtr->V0Total+1; + + r_hactive = r_htotal - SCPtr->HActiveStart; + r_vactive = r_vtotal - SCPtr->V0ActiveStart; + + RegValue = (r_htotal) & XVTC_SB_START_MASK; + XVtc_WriteReg(InstancePtr->Config.BaseAddress, + XVTC_GHSIZE_OFFSET, RegValue); + + RegValue = (r_vtotal) & XVTC_VSIZE_F0_MASK; + RegValue |= ((SCPtr->V1Total+1) << XVTC_VSIZE_F1_SHIFT) & + XVTC_VSIZE_F1_MASK; + XVtc_WriteReg(InstancePtr->Config.BaseAddress, + XVTC_GVSIZE_OFFSET, RegValue); + + + RegValue = (r_hactive) & XVTC_ASIZE_HORI_MASK; + RegValue |= ((r_vactive) << XVTC_ASIZE_VERT_SHIFT ) & + XVTC_ASIZE_VERT_MASK; + XVtc_WriteReg(InstancePtr->Config.BaseAddress, + XVTC_GASIZE_OFFSET, RegValue); + + /* Update the Generator Horizontal 1 Register */ + RegValue = (SCPtr->HSyncStart + r_hactive) & + XVTC_SB_START_MASK; + RegValue |= ((SCPtr->HBackPorchStart + r_hactive) << + XVTC_SB_END_SHIFT) & XVTC_SB_END_MASK; + XVtc_WriteReg(InstancePtr->Config.BaseAddress, + XVTC_GHSYNC_OFFSET, RegValue); + + /* Update the Generator Vertical 1 Register (field 0) */ + RegValue = (SCPtr->V0SyncStart + r_vactive -1) & + XVTC_SB_START_MASK; + RegValue |= ((SCPtr->V0BackPorchStart + r_vactive -1) << + XVTC_SB_END_SHIFT) & XVTC_SB_END_MASK; + XVtc_WriteReg(InstancePtr->Config.BaseAddress, + XVTC_GVSYNC_OFFSET, RegValue); + + /* Update the Generator Vertical Sync Register (field 1) */ + RegValue = (SCPtr->V1SyncStart + r_vactive -1) & + XVTC_SB_START_MASK; + RegValue |= ((SCPtr->V1BackPorchStart + r_vactive -1) << + XVTC_SB_END_SHIFT) & XVTC_SB_END_MASK; + XVtc_WriteReg(InstancePtr->Config.BaseAddress, + XVTC_GVSYNC_F1_OFFSET, RegValue); + + /* Chroma Start */ + RegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, + XVTC_GFENC_OFFSET); + RegValue &= ~XVTC_ENC_CPARITY_MASK; + RegValue = (((SCPtr->V0ChromaStart - SCPtr->V0ActiveStart) << + XVTC_ENC_CPARITY_SHIFT) & + XVTC_ENC_CPARITY_MASK) | RegValue; + XVtc_WriteReg(InstancePtr->Config.BaseAddress, + XVTC_GFENC_OFFSET, RegValue); + + /* Setup default Horizontal Offsets - can override later with + * XVtc_SetGeneratorHoriOffset() + */ + horiOffsets.V0BlankHoriStart = r_hactive; + horiOffsets.V0BlankHoriEnd = r_hactive; + horiOffsets.V0SyncHoriStart = SCPtr->HSyncStart + r_hactive; + horiOffsets.V0SyncHoriEnd = SCPtr->HSyncStart + r_hactive; + + horiOffsets.V1BlankHoriStart = r_hactive; + horiOffsets.V1BlankHoriEnd = r_hactive; + horiOffsets.V1SyncHoriStart = SCPtr->HSyncStart + r_hactive; + horiOffsets.V1SyncHoriEnd = SCPtr->HSyncStart + r_hactive; + + } + else + { + /* Total in mode=1 is the line width */ + r_htotal = SCPtr->HTotal; + /* Total in mode=1 is the frame height */ + r_vtotal = SCPtr->V0Total; + r_hactive = SCPtr->HFrontPorchStart; + r_vactive = SCPtr->V0FrontPorchStart; + + RegValue = (r_htotal) & XVTC_SB_START_MASK; + XVtc_WriteReg(InstancePtr->Config.BaseAddress, + XVTC_GHSIZE_OFFSET, RegValue); + + RegValue = (r_vtotal) & XVTC_VSIZE_F0_MASK; + RegValue |= ((SCPtr->V1Total) << XVTC_VSIZE_F1_SHIFT) & + XVTC_VSIZE_F1_MASK; + XVtc_WriteReg(InstancePtr->Config.BaseAddress, + XVTC_GVSIZE_OFFSET, RegValue); + + + RegValue = (r_hactive) & XVTC_ASIZE_HORI_MASK; + RegValue |= ((r_vactive) << XVTC_ASIZE_VERT_SHIFT) & + XVTC_ASIZE_VERT_MASK; + XVtc_WriteReg(InstancePtr->Config.BaseAddress, + XVTC_GASIZE_OFFSET, RegValue); + + /* Update the Generator Horizontal 1 Register */ + RegValue = (SCPtr->HSyncStart) & XVTC_SB_START_MASK; + RegValue |= ((SCPtr->HBackPorchStart) << XVTC_SB_END_SHIFT) & + XVTC_SB_END_MASK; + XVtc_WriteReg(InstancePtr->Config.BaseAddress, + XVTC_GHSYNC_OFFSET, RegValue); + + + /* Update the Generator Vertical Sync Register (field 0) */ + RegValue = (SCPtr->V0SyncStart) & XVTC_SB_START_MASK; + RegValue |= ((SCPtr->V0BackPorchStart) << XVTC_SB_END_SHIFT) & + XVTC_SB_END_MASK; + XVtc_WriteReg(InstancePtr->Config.BaseAddress, + XVTC_GVSYNC_OFFSET, RegValue); + + /* Update the Generator Vertical Sync Register (field 1) */ + RegValue = (SCPtr->V1SyncStart) & XVTC_SB_START_MASK; + RegValue |= ((SCPtr->V1BackPorchStart) << XVTC_SB_END_SHIFT) & + XVTC_SB_END_MASK; + XVtc_WriteReg(InstancePtr->Config.BaseAddress, + XVTC_GVSYNC_F1_OFFSET, RegValue); + + /* Chroma Start */ + RegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, + XVTC_GFENC_OFFSET); + RegValue &= ~XVTC_ENC_CPARITY_MASK; + RegValue = (((SCPtr->V0ChromaStart - SCPtr->V0ActiveStart) << + XVTC_ENC_CPARITY_SHIFT) + & XVTC_ENC_CPARITY_MASK) | RegValue; + XVtc_WriteReg(InstancePtr->Config.BaseAddress, + XVTC_GFENC_OFFSET, RegValue); + + /* Setup default Horizontal Offsets - can override later with + * XVtc_SetGeneratorHoriOffset() + */ + horiOffsets.V0BlankHoriStart = r_hactive; + horiOffsets.V0BlankHoriEnd = r_hactive; + horiOffsets.V0SyncHoriStart = SCPtr->HSyncStart; + horiOffsets.V0SyncHoriEnd = SCPtr->HSyncStart; + horiOffsets.V1BlankHoriStart = r_hactive; + horiOffsets.V1BlankHoriEnd = r_hactive; + horiOffsets.V1SyncHoriStart = SCPtr->HSyncStart; + horiOffsets.V1SyncHoriEnd = SCPtr->HSyncStart; + + } + XVtc_SetGeneratorHoriOffset(InstancePtr, &horiOffsets); + +} + +/*****************************************************************************/ +/** +* +* This function gets the VTC signal setting used by the Generator module +* in the VTC core. +* +* @param InstancePtr is a pointer to the VTC instance to be +* worked on. +* @param SignalCfgPtr is a pointer to a VTC signal configuration +* which will be populated with the setting used by the Generator +* module in the VTC core once this function returns. +* +* @return None. +* +* @note None. +* +******************************************************************************/ +void XVtc_GetGenerator(XVtc *InstancePtr, XVtc_Signal *SignalCfgPtr) +{ + u32 RegValue; + u32 r_htotal, r_vtotal, r_hactive, r_vactive; + XVtc_Signal *SCPtr; + + /* Verify arguments. */ + Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertVoid(SignalCfgPtr != NULL); + + SCPtr = SignalCfgPtr; + if(SCPtr->OriginMode == 0) + { + + RegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, XVTC_GHSIZE_OFFSET); + r_htotal = (RegValue) & XVTC_SB_START_MASK; + SCPtr->HTotal = (r_htotal-1) & XVTC_SB_START_MASK; + + RegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, XVTC_GVSIZE_OFFSET); + r_vtotal = (RegValue) & XVTC_VSIZE_F0_MASK; + SCPtr->V0Total = (r_vtotal-1) & XVTC_VSIZE_F0_MASK; + SCPtr->V1Total = (RegValue & XVTC_VSIZE_F1_MASK) >> XVTC_VSIZE_F1_SHIFT; + if(SCPtr->V1Total != 0) + { + SCPtr->V1Total = SCPtr->V1Total - 1; + } + + RegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, XVTC_GASIZE_OFFSET); + r_hactive = (RegValue) & XVTC_ASIZE_HORI_MASK; + SCPtr->HActiveStart = (r_htotal - r_hactive) & XVTC_ASIZE_HORI_MASK; + r_vactive = (RegValue & XVTC_ASIZE_VERT_MASK) >> XVTC_ASIZE_VERT_SHIFT; + + SCPtr->V0ActiveStart = (r_vtotal - r_vactive) & XVTC_VSIZE_F0_MASK; + SCPtr->V1ActiveStart = (SCPtr->V1Total - r_vactive - 1) & XVTC_VSIZE_F0_MASK; + + RegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, XVTC_GHSYNC_OFFSET); + SCPtr->HSyncStart = ((RegValue - r_hactive) & XVTC_SB_START_MASK); + SCPtr->HBackPorchStart = (((RegValue>>16) - r_hactive) & XVTC_SB_START_MASK); + + RegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, XVTC_GVSYNC_OFFSET); + SCPtr->V0SyncStart = ((RegValue-r_vactive+1) & XVTC_SB_START_MASK); + SCPtr->V0BackPorchStart = (((RegValue>>16) - r_vactive+1) & XVTC_SB_START_MASK); + + RegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, XVTC_GVSYNC_F1_OFFSET); + SCPtr->V1SyncStart = ((RegValue-r_vactive+1) & XVTC_SB_START_MASK); + SCPtr->V1BackPorchStart = (((RegValue>>16) - r_vactive+1) & XVTC_SB_START_MASK); + + + /* Get signal values from the Generator Vertical 2 Register (field 0)*/ + RegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, XVTC_GFENC_OFFSET); + SCPtr->V0ChromaStart = (((RegValue & XVTC_ENC_CPARITY_MASK) >> + XVTC_ENC_CPARITY_SHIFT) + (r_vtotal - r_vactive)) & XVTC_SB_START_MASK; + + SCPtr->V1ChromaStart = (((RegValue & XVTC_ENC_CPARITY_MASK) >> + XVTC_ENC_CPARITY_SHIFT) + (SCPtr->V1Total - r_vactive - 1)) & XVTC_SB_START_MASK; + + + SCPtr->HFrontPorchStart = 0; + SCPtr->V0FrontPorchStart = 0; + } + else + { + RegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, + XVTC_GHSIZE_OFFSET); + r_htotal = (RegValue) & XVTC_SB_START_MASK; + SCPtr->HTotal = (r_htotal) & XVTC_SB_START_MASK; + + RegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, + XVTC_GVSIZE_OFFSET); + r_vtotal = (RegValue) & XVTC_SB_START_MASK; + SCPtr->V0Total = (r_vtotal) & XVTC_SB_START_MASK; + SCPtr->V1Total = (RegValue>>XVTC_SB_END_SHIFT) & + XVTC_SB_START_MASK; + + RegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, + XVTC_GASIZE_OFFSET); + r_hactive = (RegValue) & XVTC_SB_START_MASK; + SCPtr->HFrontPorchStart = (r_hactive) & XVTC_SB_START_MASK; + r_vactive = (RegValue>>XVTC_SB_END_SHIFT) & XVTC_SB_START_MASK; + SCPtr->V0FrontPorchStart = (r_vactive) & XVTC_SB_START_MASK; + SCPtr->V1FrontPorchStart = SCPtr->V0FrontPorchStart; + + RegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, + XVTC_GHSYNC_OFFSET); + SCPtr->HSyncStart = ((RegValue) & XVTC_SB_START_MASK); + SCPtr->HBackPorchStart = (((RegValue>>XVTC_SB_END_SHIFT)) & + XVTC_SB_START_MASK); + + RegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, + XVTC_GVSYNC_OFFSET); + SCPtr->V0SyncStart = ((RegValue) & XVTC_SB_START_MASK); + SCPtr->V0BackPorchStart = (((RegValue>>XVTC_SB_END_SHIFT)) & + XVTC_SB_START_MASK); + + RegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, + XVTC_GVSYNC_F1_OFFSET); + SCPtr->V1SyncStart = ((RegValue) & XVTC_SB_START_MASK); + SCPtr->V1BackPorchStart = (((RegValue>>XVTC_SB_END_SHIFT)) & + XVTC_SB_START_MASK); + + /* Get signal values from the Generator Vertical 2 Register (field 0)*/ + RegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, + XVTC_GFENC_OFFSET); + SCPtr->V0ChromaStart = (((RegValue & XVTC_ENC_CPARITY_MASK) >> + XVTC_ENC_CPARITY_SHIFT)) & XVTC_SB_START_MASK; + SCPtr->V1ChromaStart = (((RegValue & XVTC_ENC_CPARITY_MASK) >> + XVTC_ENC_CPARITY_SHIFT)) & XVTC_SB_START_MASK; + + + SCPtr->HActiveStart = 0; + SCPtr->V0ActiveStart = 0; + SCPtr->V1ActiveStart = 0; + } +} + +/*****************************************************************************/ +/** +* +* This function gets the VTC signal setting used by the Detector module +* in the VTC core. +* +* @param InstancePtr is a pointer to the VTC instance to be +* worked on. +* @param SignalCfgPtr is a pointer to a VTC signal configuration +* which will be populated with the setting used by the Detector +* module in the VTC core once this function returns. +* +* @return None. +* +* @note None. +* +******************************************************************************/ +void XVtc_GetDetector(XVtc *InstancePtr, XVtc_Signal *SignalCfgPtr) +{ + u32 RegValue; + u32 r_htotal, r_vtotal, r_hactive, r_vactive; + XVtc_Signal *SCPtr; + + /* Verify arguments. */ + Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertVoid(SignalCfgPtr != NULL); + + SCPtr = SignalCfgPtr; + + if(SCPtr->OriginMode == 0) + { + RegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, + XVTC_DHSIZE_OFFSET); + r_htotal = (RegValue) & XVTC_SB_START_MASK; + SCPtr->HTotal = (r_htotal-1) & XVTC_SB_START_MASK; + + RegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, + XVTC_DVSIZE_OFFSET); + r_vtotal = (RegValue) & XVTC_SB_START_MASK; + SCPtr->V0Total = (r_vtotal-1) & XVTC_SB_START_MASK; + SCPtr->V1Total = (RegValue>>XVTC_SB_END_SHIFT) & + XVTC_SB_START_MASK; + if(SCPtr->V1Total != 0) { + SCPtr->V1Total = SCPtr->V1Total - 1; + } + + RegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, + XVTC_DASIZE_OFFSET); + r_hactive = (RegValue) & XVTC_SB_START_MASK; + SCPtr->HActiveStart = (r_htotal - r_hactive) & + XVTC_SB_START_MASK; + r_vactive = (RegValue>>XVTC_SB_END_SHIFT) & + XVTC_SB_START_MASK; + SCPtr->V0ActiveStart = (r_vtotal - r_vactive) & + XVTC_SB_START_MASK; + SCPtr->V1ActiveStart = (SCPtr->V1Total - r_vactive - 1) & + XVTC_SB_START_MASK; + + RegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, + XVTC_DHSYNC_OFFSET); + SCPtr->HSyncStart = ((RegValue - r_hactive) & + XVTC_SB_START_MASK); + SCPtr->HBackPorchStart = (((RegValue>>XVTC_SB_END_SHIFT) - + r_hactive) + & XVTC_SB_START_MASK); + + RegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, + XVTC_DVSYNC_OFFSET); + SCPtr->V0SyncStart = ((RegValue-r_vactive+1) & + XVTC_SB_START_MASK); + SCPtr->V0BackPorchStart = (((RegValue>>XVTC_SB_END_SHIFT) - + r_vactive+1) & XVTC_SB_START_MASK); + + RegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, + XVTC_GVSYNC_F1_OFFSET); + SCPtr->V1SyncStart = ((RegValue-r_vactive+1) & + XVTC_SB_START_MASK); + SCPtr->V1BackPorchStart = (((RegValue>>XVTC_SB_END_SHIFT) - + r_vactive+1) + & XVTC_SB_START_MASK); + + /* Get signal values from the Generator Vertical 2 Register + * (field 0) + */ + RegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, + XVTC_DFENC_OFFSET); + SCPtr->V0ChromaStart = (((RegValue & XVTC_ENC_CPARITY_MASK) >> + XVTC_ENC_CPARITY_SHIFT) + + (r_vtotal - r_vactive)) & XVTC_SB_START_MASK; + + SCPtr->V1ChromaStart = (((RegValue & XVTC_ENC_CPARITY_MASK) >> + XVTC_ENC_CPARITY_SHIFT) + + (SCPtr->V1Total - r_vactive - 1)) & XVTC_SB_START_MASK; + + SCPtr->HFrontPorchStart = 0; + SCPtr->V0FrontPorchStart = 0; + } + else + { + RegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, + XVTC_DHSIZE_OFFSET); + r_htotal = (RegValue) & XVTC_SB_START_MASK; + SCPtr->HTotal = (r_htotal) & XVTC_SB_START_MASK; + + RegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, + XVTC_DVSIZE_OFFSET); + r_vtotal = (RegValue) & XVTC_SB_START_MASK; + SCPtr->V0Total = (r_vtotal) & XVTC_SB_START_MASK; + SCPtr->V1Total = (RegValue>>XVTC_SB_END_SHIFT) & + XVTC_SB_START_MASK; + + RegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, + XVTC_DASIZE_OFFSET); + r_hactive = (RegValue) & XVTC_SB_START_MASK; + SCPtr->HFrontPorchStart = (r_hactive) & XVTC_SB_START_MASK; + r_vactive = (RegValue>>XVTC_SB_END_SHIFT) & XVTC_SB_START_MASK; + SCPtr->V0FrontPorchStart = (r_vactive) & XVTC_SB_START_MASK; + SCPtr->V1FrontPorchStart = SCPtr->V0FrontPorchStart; + + RegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, + XVTC_DHSYNC_OFFSET); + SCPtr->HSyncStart = ((RegValue) & XVTC_SB_START_MASK); + SCPtr->HBackPorchStart = (((RegValue>>XVTC_SB_END_SHIFT)) & + XVTC_SB_START_MASK); + + RegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, + XVTC_DVSYNC_OFFSET); + SCPtr->V0SyncStart = ((RegValue) & XVTC_SB_START_MASK); + SCPtr->V0BackPorchStart = (((RegValue>>XVTC_SB_END_SHIFT)) & + XVTC_SB_START_MASK); + + RegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, + XVTC_GVSYNC_F1_OFFSET); + SCPtr->V1SyncStart = ((RegValue) & XVTC_SB_START_MASK); + SCPtr->V1BackPorchStart = (((RegValue>>XVTC_SB_END_SHIFT)) & + XVTC_SB_START_MASK); + + + /* Get signal values from the Generator Vertical 2 Register + * (field 0) + */ + RegValue = XVtc_ReadReg(InstancePtr->Config.BaseAddress, + XVTC_DFENC_OFFSET); + SCPtr->V0ChromaStart = (((RegValue & XVTC_ENC_CPARITY_MASK) >> + XVTC_ENC_CPARITY_SHIFT)) & XVTC_SB_START_MASK; + + SCPtr->V1ChromaStart = (((RegValue & XVTC_ENC_CPARITY_MASK) >> + XVTC_ENC_CPARITY_SHIFT)) & XVTC_SB_START_MASK; + + + SCPtr->HActiveStart = 0; + SCPtr->V0ActiveStart = 0; + SCPtr->V1ActiveStart = 0; + } + + +} + +/*****************************************************************************/ +/** +* +* This function facilitates software identification of exact version of the +* VTC hardware (h/w). +* +* @param InstancePtr is a pointer to the XVtc instance. +* +* @return Version, contents of a Version register. +* +* @note None. +* +******************************************************************************/ +u32 XVtc_GetVersion(XVtc *InstancePtr) +{ + u32 Version; + + /* Verify argument */ + Xil_AssertNonvoid(InstancePtr != NULL); + + /* Read Version register */ + Version = XVtc_ReadReg(InstancePtr->Config.BaseAddress, + XVTC_VER_OFFSET); + + return Version; +} + +/*****************************************************************************/ +/** +* +* This function converts the video mode integer into the video timing +* information stored within the XVtc_Timing pointer. +* +* @param InstancePtr is a pointer to the VTC instance to be +* worked on. +* @param Mode is a u16 int defined as macro to one of the predefined +* Video Modes. +* @param TimingPtr is a pointer to a VTC Video Timing Structure. +* +* @return None. +* +* @note None. +* +******************************************************************************/ +void XVtc_ConvVideoMode2Timing(XVtc *InstancePtr, u16 Mode, + XVtc_Timing *TimingPtr) +{ + /* Verify arguments. */ + Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertVoid(TimingPtr != NULL); + + /* clear timing structure. Set Interlaced to 0 by default */ + memset((void *)TimingPtr, 0, sizeof(XVtc_Timing)); + + switch(Mode) + { + case XVTC_VMODE_720P: // 720p@60 (1280x720 HD 720) + { + + // Horizontal Timing + TimingPtr->HActiveVideo = 1280; + TimingPtr->HFrontPorch = 110; + TimingPtr->HSyncWidth = 40; + TimingPtr->HBackPorch = 220; + TimingPtr->HSyncPolarity = 1; + + // Vertical Timing + TimingPtr->VActiveVideo = 720; + TimingPtr->V0FrontPorch = 5; + TimingPtr->V0SyncWidth = 5; + TimingPtr->V0BackPorch = 20; + TimingPtr->VSyncPolarity = 1; + + break; + } + case XVTC_VMODE_1080P: // 1080p@60 (1920x1080 HD 1080) + { + // Horizontal Timing + TimingPtr->HActiveVideo = 1920; + TimingPtr->HFrontPorch = 88; + TimingPtr->HSyncWidth = 44; + TimingPtr->HBackPorch = 148; + TimingPtr->HSyncPolarity = 1; + + // Vertical Timing + TimingPtr->VActiveVideo = 1080; + TimingPtr->V0FrontPorch = 4; + TimingPtr->V0SyncWidth = 5; + TimingPtr->V0BackPorch = 36; + TimingPtr->VSyncPolarity = 1; + + break; + } + case XVTC_VMODE_480P: // 480p@60 + { + // Horizontal Timing + TimingPtr->HActiveVideo = 720; + TimingPtr->HFrontPorch = 16; + TimingPtr->HSyncWidth = 62; + TimingPtr->HBackPorch = 60; + TimingPtr->HSyncPolarity = 0; + + // Vertical Timing + TimingPtr->VActiveVideo = 480; + TimingPtr->V0FrontPorch = 9; + TimingPtr->V0SyncWidth = 6; + TimingPtr->V0BackPorch = 30; + TimingPtr->VSyncPolarity = 0; + + break; + } + case XVTC_VMODE_576P: // 576p@50 + { + // Horizontal Timing + TimingPtr->HActiveVideo = 720; + TimingPtr->HFrontPorch = 12; + TimingPtr->HSyncWidth = 64; + TimingPtr->HBackPorch = 68; + TimingPtr->HSyncPolarity = 0; + + // Vertical Timing + TimingPtr->VActiveVideo = 576; + TimingPtr->V0FrontPorch = 5; + TimingPtr->V0SyncWidth = 5; + TimingPtr->V0BackPorch = 39; + TimingPtr->VSyncPolarity = 0; + + break; + } + case XVTC_VMODE_VGA: // 640x480 (VGA) + { + // Horizontal Timing + TimingPtr->HActiveVideo = 656; + TimingPtr->HFrontPorch = 8; + TimingPtr->HSyncWidth = 96; + TimingPtr->HBackPorch = 40; + TimingPtr->HSyncPolarity = 0; + + // Vertical Timing + TimingPtr->VActiveVideo = 496; + TimingPtr->V0FrontPorch = 2; + TimingPtr->V0SyncWidth = 2; + TimingPtr->V0BackPorch = 25; + TimingPtr->VSyncPolarity = 0; + + break; + } + case XVTC_VMODE_SVGA: // 800x600@60 (SVGA) + { + // Horizontal Timing + TimingPtr->HActiveVideo = 800; + TimingPtr->HFrontPorch = 40; + TimingPtr->HSyncWidth = 128; + TimingPtr->HBackPorch = 88; + TimingPtr->HSyncPolarity = 1; + + // Vertical Timing + TimingPtr->VActiveVideo = 600; + TimingPtr->V0FrontPorch = 1; + TimingPtr->V0SyncWidth = 4; + TimingPtr->V0BackPorch = 23; + TimingPtr->VSyncPolarity = 1; + + break; + } + case XVTC_VMODE_XGA: // 1024x768@60 (XGA) + { + // Horizontal Timing + TimingPtr->HActiveVideo = 1024; + TimingPtr->HFrontPorch = 24; + TimingPtr->HSyncWidth = 136; + TimingPtr->HBackPorch = 160; + TimingPtr->HSyncPolarity = 0; + + // Vertical Timing + TimingPtr->VActiveVideo = 768; + TimingPtr->V0FrontPorch = 3; + TimingPtr->V0SyncWidth = 6; + TimingPtr->V0BackPorch = 29; + TimingPtr->VSyncPolarity = 0; + + break; + } + case XVTC_VMODE_SXGA: // 1280x1024@60 (SXGA) + { + // Horizontal Timing + TimingPtr->HActiveVideo = 1280; + TimingPtr->HFrontPorch = 48; + TimingPtr->HSyncWidth = 112; + TimingPtr->HBackPorch = 248; + TimingPtr->HSyncPolarity = 1; + + // Vertical Timing + TimingPtr->VActiveVideo = 1024; + TimingPtr->V0FrontPorch = 1; + TimingPtr->V0SyncWidth = 3; + TimingPtr->V0BackPorch = 38; + TimingPtr->VSyncPolarity = 1; + + break; + } + + case XVTC_VMODE_WXGAPLUS: // 1440x900@60 (WXGA+) + { + // Horizontal Timing + TimingPtr->HActiveVideo = 1440; + TimingPtr->HFrontPorch = 80; + TimingPtr->HSyncWidth = 152; + TimingPtr->HBackPorch = 232; + TimingPtr->HSyncPolarity = 0; + + // Vertical Timing + TimingPtr->VActiveVideo = 900; + TimingPtr->V0FrontPorch = 3; + TimingPtr->V0SyncWidth = 6; + TimingPtr->V0BackPorch = 25; + TimingPtr->VSyncPolarity = 1; + + break; + } + case XVTC_VMODE_WSXGAPLUS: // 1680x1050@60 (WSXGA+) + { + // Horizontal Timing + TimingPtr->HActiveVideo = 1680; + TimingPtr->HFrontPorch = 104; + TimingPtr->HSyncWidth = 176; + TimingPtr->HBackPorch = 280; + TimingPtr->HSyncPolarity = 0; + + // Vertical Timing + TimingPtr->VActiveVideo = 1050; + TimingPtr->V0FrontPorch = 3; + TimingPtr->V0SyncWidth = 6; + TimingPtr->V0BackPorch = 30; + TimingPtr->VSyncPolarity = 1; + + break; + } + case XVTC_VMODE_1080I: // 1080i@60 + { + TimingPtr->Interlaced = 1; + + // Horizontal Timing + TimingPtr->HActiveVideo = 1920; + TimingPtr->HFrontPorch = 88; + TimingPtr->HSyncWidth = 44; + TimingPtr->HBackPorch = 148; + TimingPtr->HSyncPolarity = 1; + + // Vertical Timing + TimingPtr->VActiveVideo = 540; + TimingPtr->V0FrontPorch = 2; + TimingPtr->V0SyncWidth = 5; + TimingPtr->V0BackPorch = 15; + + TimingPtr->V1FrontPorch = 2; + TimingPtr->V1SyncWidth = 5; + TimingPtr->V1BackPorch = 16; + + TimingPtr->VSyncPolarity = 1; + + break; + } + case XVTC_VMODE_NTSC: //480i@60 + { + TimingPtr->Interlaced = 1; + // Horizontal Timing + TimingPtr->HActiveVideo = 720; + TimingPtr->HFrontPorch = 19; + TimingPtr->HSyncWidth = 62; + TimingPtr->HBackPorch = 57; + TimingPtr->HSyncPolarity = 0; + + // Vertical Timing + TimingPtr->VActiveVideo = 240; + TimingPtr->V0FrontPorch = 4; + TimingPtr->V0SyncWidth = 3; + TimingPtr->V0BackPorch = 15; + + TimingPtr->V1FrontPorch = 4; + TimingPtr->V1SyncWidth = 3; + TimingPtr->V1BackPorch = 16; + + TimingPtr->VSyncPolarity = 0; + + break; + } + case XVTC_VMODE_PAL: //576i@50 + { + TimingPtr->Interlaced = 1; + // Horizontal Timing + TimingPtr->HActiveVideo = 720; + TimingPtr->HFrontPorch = 12; + TimingPtr->HSyncWidth = 63; + TimingPtr->HBackPorch = 69; + TimingPtr->HSyncPolarity = 0; + + // Vertical Timing + TimingPtr->VActiveVideo = 288; + TimingPtr->V0FrontPorch = 2; + TimingPtr->V0SyncWidth = 3; + TimingPtr->V0BackPorch = 19; + + TimingPtr->V1FrontPorch = 2; + TimingPtr->V1SyncWidth = 3; + TimingPtr->V1BackPorch = 20; + + TimingPtr->VSyncPolarity = 0; + + break; + } + + // add other video formats here + } +} + +/*****************************************************************************/ +/** +* +* This function converts the video timing structure into the VTC signal +* configuration structure, horizontal offsets structure and the +* polarity structure. +* +* @param InstancePtr is a pointer to the VTC instance to be +* worked on. +* @param TimingPtr is a pointer to a Video Timing structure to be read. +* @param SignalCfgPtr is a pointer to a VTC signal configuration to be +* set. +* @param HOffPtr is a pointer to a VTC horizontal offsets structure to +* be set. +* @param PolarityPtr is a pointer to a VTC polarity structure to be set. +* +* @return None. +* +* @note None. +* +******************************************************************************/ +void XVtc_ConvTiming2Signal(XVtc *InstancePtr, XVtc_Timing *TimingPtr, + XVtc_Signal *SignalCfgPtr, XVtc_HoriOffsets *HOffPtr, + XVtc_Polarity *PolarityPtr) +{ + /* Verify arguments. */ + Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertVoid(TimingPtr != NULL); + Xil_AssertVoid(SignalCfgPtr != NULL); + Xil_AssertVoid(HOffPtr != NULL); + Xil_AssertVoid(PolarityPtr != NULL); + + + /* Setting up VTC Polarity. */ + memset((void *)PolarityPtr, 0, sizeof(XVtc_Polarity)); + PolarityPtr->ActiveChromaPol = 1; + PolarityPtr->ActiveVideoPol = 1; + PolarityPtr->FieldIdPol = 1; + /* Vblank matches Vsync Polarity */ + PolarityPtr->VBlankPol = TimingPtr->VSyncPolarity; + PolarityPtr->VSyncPol = TimingPtr->VSyncPolarity; + /* hblank matches hsync Polarity */ + PolarityPtr->HBlankPol = TimingPtr->HSyncPolarity; + PolarityPtr->HSyncPol = TimingPtr->HSyncPolarity; + + + memset((void *)SignalCfgPtr, 0, sizeof(XVtc_Signal)); + memset((void *)HOffPtr, 0, sizeof(XVtc_HoriOffsets)); + + /* Populate the VTC Signal config structure. */ + /* Active Video starts at 0 */ + SignalCfgPtr->OriginMode = 1; + SignalCfgPtr->HActiveStart = 0; + SignalCfgPtr->HFrontPorchStart = TimingPtr->HActiveVideo; + SignalCfgPtr->HSyncStart = SignalCfgPtr->HFrontPorchStart + + TimingPtr->HFrontPorch; + SignalCfgPtr->HBackPorchStart = SignalCfgPtr->HSyncStart + + TimingPtr->HSyncWidth; + SignalCfgPtr->HTotal = SignalCfgPtr->HBackPorchStart + + TimingPtr->HBackPorch; + + SignalCfgPtr->V0ChromaStart = 0; + SignalCfgPtr->V0ActiveStart = 0; + SignalCfgPtr->V0FrontPorchStart = TimingPtr->VActiveVideo; + SignalCfgPtr->V0SyncStart = SignalCfgPtr->V0FrontPorchStart + + TimingPtr->V0FrontPorch; + SignalCfgPtr->V0BackPorchStart = SignalCfgPtr->V0SyncStart + + TimingPtr->V0SyncWidth; + SignalCfgPtr->V0Total = SignalCfgPtr->V0BackPorchStart + + TimingPtr->V0BackPorch; + + HOffPtr->V0BlankHoriStart = SignalCfgPtr->HFrontPorchStart; + HOffPtr->V0BlankHoriEnd = SignalCfgPtr->HFrontPorchStart; + HOffPtr->V0SyncHoriStart = SignalCfgPtr->HSyncStart; + HOffPtr->V0SyncHoriEnd = SignalCfgPtr->HSyncStart; + + if(TimingPtr->Interlaced == 1) { + SignalCfgPtr->V1ChromaStart = 0; + SignalCfgPtr->V1ActiveStart = 0; + SignalCfgPtr->V1FrontPorchStart = TimingPtr->VActiveVideo; + SignalCfgPtr->V1SyncStart = + SignalCfgPtr->V1FrontPorchStart + + TimingPtr->V1FrontPorch; + SignalCfgPtr->V1BackPorchStart = + SignalCfgPtr->V1SyncStart + + TimingPtr->V1SyncWidth; + SignalCfgPtr->V1Total = + SignalCfgPtr->V1BackPorchStart + + TimingPtr->V1BackPorch; + + /* Align to H blank */ + HOffPtr->V1BlankHoriStart = SignalCfgPtr->HFrontPorchStart; + /* Align to H Blank */ + HOffPtr->V1BlankHoriEnd = SignalCfgPtr->HFrontPorchStart; + + /* Align to half line */ + HOffPtr->V1SyncHoriStart = SignalCfgPtr->HSyncStart - + (SignalCfgPtr->HTotal / 2); + HOffPtr->V1SyncHoriEnd = SignalCfgPtr->HSyncStart - + (SignalCfgPtr->HTotal / 2); + } + /* Progressive formats */ + else { + /* Set Field 1 same as Field 0 */ + SignalCfgPtr->V1ChromaStart = SignalCfgPtr->V0ChromaStart; + SignalCfgPtr->V1ActiveStart = SignalCfgPtr->V0ActiveStart; + SignalCfgPtr->V1FrontPorchStart = + SignalCfgPtr->V0FrontPorchStart; + SignalCfgPtr->V1SyncStart = SignalCfgPtr->V0SyncStart; + SignalCfgPtr->V1BackPorchStart = + SignalCfgPtr->V0BackPorchStart; + SignalCfgPtr->V1Total = SignalCfgPtr->V0Total; + + HOffPtr->V1BlankHoriStart = HOffPtr->V0BlankHoriStart; + HOffPtr->V1BlankHoriEnd = HOffPtr->V0BlankHoriEnd; + HOffPtr->V1SyncHoriStart = HOffPtr->V0SyncHoriStart; + HOffPtr->V1SyncHoriEnd = HOffPtr->V0SyncHoriEnd; + } + +} + +/*****************************************************************************/ +/** +* +* This function converts the VTC signal structure, horizontal offsets +* structure and the polarity structure into the Video Timing structure. +* +* @param InstancePtr is a pointer to the VTC instance to be +* worked on. +* @param SignalCfgPtr is a pointer to a VTC signal configuration to +* be read +* @param HOffPtr is a pointer to a VTC horizontal offsets structure +* to be read +* @param PolarityPtr is a pointer to a VTC polarity structure to be +* read. +* @param TimingPtr is a pointer to a Video Timing structure to be set. +* +* @return None. +* +* @note None. +* +******************************************************************************/ +void XVtc_ConvSignal2Timing(XVtc *InstancePtr, XVtc_Signal *SignalCfgPtr, + XVtc_HoriOffsets *HOffPtr, + XVtc_Polarity *PolarityPtr, + XVtc_Timing *TimingPtr) +{ + /* Verify arguments. */ + Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertVoid(SignalCfgPtr != NULL); + Xil_AssertVoid(HOffPtr != NULL); + Xil_AssertVoid(PolarityPtr != NULL); + Xil_AssertVoid(TimingPtr != NULL); + Xil_AssertVoid(SignalCfgPtr->OriginMode == 1); + + memset((void *)TimingPtr, 0, sizeof(XVtc_Timing)); + + /* Set Polarity */ + TimingPtr->VSyncPolarity = PolarityPtr->VSyncPol; + TimingPtr->HSyncPolarity = PolarityPtr->HSyncPol; + + /* Horizontal Timing */ + TimingPtr->HActiveVideo = SignalCfgPtr->HFrontPorchStart; + + + TimingPtr->HFrontPorch = SignalCfgPtr->HSyncStart - + SignalCfgPtr->HFrontPorchStart; + TimingPtr->HSyncWidth = SignalCfgPtr->HBackPorchStart - + SignalCfgPtr->HSyncStart; + TimingPtr->HBackPorch = SignalCfgPtr->HTotal - + SignalCfgPtr->HBackPorchStart; + + /* Vertical Timing */ + TimingPtr->VActiveVideo = SignalCfgPtr->V0FrontPorchStart; + + + TimingPtr->V0FrontPorch = SignalCfgPtr->V0SyncStart - + SignalCfgPtr->V0FrontPorchStart; + TimingPtr->V0SyncWidth = SignalCfgPtr->V0BackPorchStart - + SignalCfgPtr->V0SyncStart; + TimingPtr->V0BackPorch = SignalCfgPtr->V0Total - + SignalCfgPtr->V0BackPorchStart; + + TimingPtr->V1FrontPorch = SignalCfgPtr->V1SyncStart - + SignalCfgPtr->V1FrontPorchStart; + TimingPtr->V1SyncWidth = SignalCfgPtr->V1BackPorchStart - + SignalCfgPtr->V1SyncStart; + TimingPtr->V1BackPorch = SignalCfgPtr->V1Total - + SignalCfgPtr->V1BackPorchStart; + + /* Interlaced */ + if ((SignalCfgPtr->V1Total != 0x0) && + (SignalCfgPtr->V1Total != SignalCfgPtr->V0Total)) { + TimingPtr->Interlaced = 1; + } +} + +/*****************************************************************************/ +/** +* +* This function converts the video timing structure into predefined video +* mode values returned as a short integer. +* +* @param InstancePtr is a pointer to the VTC instance to be +* worked on. +* @param TimingPtr is a pointer to a Video Timing structure to be read. +* +* @return VideoMode is the video mode of the VTC core. +* +* @note None. +* +******************************************************************************/ +u16 XVtc_ConvTiming2VideoMode(XVtc *InstancePtr, XVtc_Timing *TimingPtr) +{ + /* Verify arguments. */ + Xil_AssertNonvoid(InstancePtr != NULL); + Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertNonvoid(TimingPtr != NULL); + + /* Checking for Interlaced value */ + if(TimingPtr->Interlaced == 0) { + if(TimingPtr->HActiveVideo == 1280) { + if (TimingPtr->VActiveVideo == 720) { + return XVTC_VMODE_720P; + } + else if (TimingPtr->VActiveVideo == 1024) { + return XVTC_VMODE_SXGA; + } + + } + else if((TimingPtr->HActiveVideo == 1920) && + (TimingPtr->VActiveVideo == 1080)) { + return XVTC_VMODE_1080P; + } + else if(TimingPtr->HActiveVideo == 720) { + if (TimingPtr->VActiveVideo == 480) { + return XVTC_VMODE_480P; + } + else if (TimingPtr->VActiveVideo == 576) { + return XVTC_VMODE_576P; + } + } + else if((TimingPtr->HActiveVideo == 656) && + (TimingPtr->VActiveVideo == 496)) { + return XVTC_VMODE_VGA; + } + else if((TimingPtr->HActiveVideo == 800) && + (TimingPtr->VActiveVideo == 600)) { + return XVTC_VMODE_SVGA; + } + else if((TimingPtr->HActiveVideo == 1024) && + (TimingPtr->VActiveVideo == 768)) { + return XVTC_VMODE_XGA; + } + else if((TimingPtr->HActiveVideo == 1440) && + (TimingPtr->VActiveVideo == 900)) { + return XVTC_VMODE_WXGAPLUS; + } + else if((TimingPtr->HActiveVideo == 1680) && + (TimingPtr->VActiveVideo == 1050)) { + return XVTC_VMODE_WSXGAPLUS; + } + + } + /* Interlaced */ + else { + if((TimingPtr->HActiveVideo == 720) && + (TimingPtr->VActiveVideo == 240)) { + return XVTC_VMODE_NTSC; + } + else if((TimingPtr->HActiveVideo == 1920) && + (TimingPtr->VActiveVideo == 540)) { + return XVTC_VMODE_1080I; + } + else if((TimingPtr->HActiveVideo == 720) && + (TimingPtr->VActiveVideo == 288)) { + return XVTC_VMODE_PAL; + } + + } + + /* Not found - read from Timing to discover format */ + return 0; +} + +/*****************************************************************************/ +/** +* +* This function sets up the generator (Polarity, H/V values and horizontal +* offsets) by reading the configuration from a video timing structure. +* +* @param InstancePtr is a pointer to the VTC instance to be +* worked on. +* @param TimingPtr is a pointer to a Video Timing Structure to be read. +* +* @return None. +* +* @note None. +* +******************************************************************************/ +void XVtc_SetGeneratorTiming(XVtc *InstancePtr, XVtc_Timing * TimingPtr) +{ + XVtc_Polarity Polarity; + XVtc_Signal Signal; + XVtc_HoriOffsets Hoff; + + /* Verify arguments. */ + Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertVoid(TimingPtr != NULL); + + XVtc_ConvTiming2Signal(InstancePtr, TimingPtr, &Signal, &Hoff, + &Polarity); + XVtc_SetPolarity(InstancePtr, &Polarity); + XVtc_SetGenerator(InstancePtr, &Signal); + XVtc_SetGeneratorHoriOffset(InstancePtr, &Hoff); +} + +/*****************************************************************************/ +/** +* +* This function sets up the generator (Polarity, H/V values and horizontal +* offsets) by reading the configuration from a video mode short integer. +* +* @param InstancePtr is a pointer to the VTC instance to be +* worked on. +* @param Mode is a short integer predefined video mode. +* +* @return None. +* +* @note None. +* +******************************************************************************/ +void XVtc_SetGeneratorVideoMode(XVtc *InstancePtr, u16 Mode) +{ + XVtc_Timing Timing; + + /* Verify arguments */ + Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + + XVtc_ConvVideoMode2Timing(InstancePtr, Mode, &Timing); + + XVtc_SetGeneratorTiming(InstancePtr, &Timing); + +} + +/*****************************************************************************/ +/** +* +* This function gets the video timing structure settings currently used by +* generator in the VTC core. +* +* @param InstancePtr is a pointer to the VTC instance to be +* worked on. +* @param TimingPtr is a pointer to a Video Timing Structure to be set. +* +* @return None. +* +* @note None. +* +******************************************************************************/ +void XVtc_GetGeneratorTiming(XVtc *InstancePtr, XVtc_Timing *TimingPtr) +{ + + XVtc_Polarity Polarity; + XVtc_Signal Signal; + XVtc_HoriOffsets Hoff; + + /* Verify arguments. */ + Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertVoid(TimingPtr != NULL); + + + Signal.OriginMode = 1; + XVtc_GetPolarity(InstancePtr, &Polarity); + XVtc_GetGeneratorHoriOffset(InstancePtr, &Hoff); + XVtc_GetGenerator(InstancePtr, &Signal); + + XVtc_ConvSignal2Timing(InstancePtr, &Signal, &Hoff, &Polarity, + TimingPtr); +} + +/*****************************************************************************/ +/** +* +* This function gets the video mode currently used by the generator +* in the VTC core. If the video mode is unknown or not recognized, then 0 +* will be returned. +* +* @param InstancePtr is a pointer to the VTC instance to be +* worked on. +* +* @return VideoMode is the video mode of the VTC core. +* +* @note Note. +* +******************************************************************************/ +u16 XVtc_GetGeneratorVideoMode(XVtc *InstancePtr) +{ + + u16 mode; + XVtc_Timing Timing; + + /* Verify arguments */ + Xil_AssertNonvoid(InstancePtr != NULL); + Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + + XVtc_GetGeneratorTiming(InstancePtr, &Timing); + mode = XVtc_ConvTiming2VideoMode(InstancePtr, &Timing); + + return mode; +} + +/*****************************************************************************/ +/** +* +* This function gets the video timing structure settings currently reported by +* the detector in the VTC core. +* +* @param InstancePtr is a pointer to the VTC instance to be +* worked on. +* @param TimingPtr is a pointer to a Video Timing structure to be set. +* +* @return None. +* +* @note None. +* +******************************************************************************/ +void XVtc_GetDetectorTiming(XVtc *InstancePtr, XVtc_Timing *TimingPtr) +{ + XVtc_Polarity Polarity; + XVtc_Signal Signal; + XVtc_HoriOffsets Hoff; + + /* Verify arguments */ + Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertVoid(TimingPtr != NULL); + + + Signal.OriginMode = 1; + XVtc_GetDetector(InstancePtr, &Signal); + XVtc_GetDetectorPolarity(InstancePtr, &Polarity); + XVtc_GetDetectorHoriOffset(InstancePtr, &Hoff); + + XVtc_ConvSignal2Timing(InstancePtr, &Signal, &Hoff, &Polarity, + TimingPtr); +} + +/*****************************************************************************/ +/** +* +* This function gets the video mode currently reported by the detector +* in the VTC core. If the video mode is unknown or not recognized, then 0 +* will be returned. +* +* @param InstancePtr is a pointer to the VTC instance to be +* worked on. +* +* @return VideoMode is the video mode of the VTC core. +* +* @note None. +* +******************************************************************************/ +u16 XVtc_GetDetectorVideoMode(XVtc *InstancePtr) +{ + u16 mode; + XVtc_Timing Timing; + + /* Verify arguments */ + Xil_AssertNonvoid(InstancePtr != NULL); + Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + + + XVtc_GetDetectorTiming(InstancePtr, &Timing); + mode = XVtc_ConvTiming2VideoMode(InstancePtr, &Timing); + + return mode; +} + +/*****************************************************************************/ +/** +* +* This routine is a stub for the asynchronous callbacks. The stub is here in +* case the upper layer forgot to set the handlers. On initialization, all +* handlers except error handler are set to this callback. It is considered an +* error for this handler to be invoked. +* +* @param CallBackRef is a callback reference passed in by the upper +* layer when setting the callback functions, and passed back +* to the upper layer when the callback is invoked. +* +* @return None. +* +* @note None. +* +******************************************************************************/ +static void StubCallBack(void *CallBackRef) +{ + (void)CallBackRef; + Xil_AssertVoidAlways(); +} + +/*****************************************************************************/ +/** +* +* This routine is a stub for the asynchronous error interrupt callback. The +* stub is here in case the upper layer forgot to set the handler. On +* initialization, Error interrupt handler is set to this callback. It is +* considered an error for this handler to be invoked. +* +* @param CallBackRef is a callback reference passed in by the upper +* layer when setting the callback functions, and passed back to +* the upper layer when the callback is invoked. +* @param ErrorMask is a bit mask indicating the cause of the error. Its +* value equals 'OR'ing one or more XVTC_IXR_*_MASK values defined +* in xvtc_hw.h. +* +* @return None. +* +* @note None. +* +******************************************************************************/ +static void StubErrCallBack(void *CallBackRef, u32 ErrorMask) +{ + (void)CallBackRef; + (void)ErrorMask; + Xil_AssertVoidAlways(); +} diff --git a/XilinxProcessorIPLib/drivers/vtc/src/xvtc.h b/XilinxProcessorIPLib/drivers/vtc/src/xvtc.h new file mode 100644 index 00000000..13912a70 --- /dev/null +++ b/XilinxProcessorIPLib/drivers/vtc/src/xvtc.h @@ -0,0 +1,960 @@ +/****************************************************************************** +* +* Copyright (C) 2008 - 2014 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +* (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in +* this Software without prior written authorization from Xilinx. +* +******************************************************************************/ +/*****************************************************************************/ +/** +* +* @file xvtc.h +* +* This is the main header file of Xilinx MVI Video Timing Controller (VTC) +* device driver. The VTC device detects video signals, independently +* overrides any one of them, re-generates video signals with +/- delay and +* with polarity inversion, and generates up to 16 one cycle Frame Sync outputs. +* +* The device has the following main features: +* - Detect video signals: +* - horizontal sync +* - horizontal blank +* - vertical sync +* - vertical blank +* - active video +* - field id +* - Independently override any one signal. +* - Re-generate video signals with +/- delay and with polarity inversion. +* - Generate up to 16 one cycle Frame Sync outputs. +* +* For a full description of VTC features, please see the hardware +* specification. +* +* Software Initialization & Configuration +* +* The application needs to do following steps in order for preparing the +* VTC to be ready to process video signal handling. +* +* - Call XVtc_LookupConfig using a device ID to find the core +* configuration. +* - Call XVtc_CfgInitialize to initialize the device and the driver +* instance associated with it. +* - Call XVtc_SetGenerator to set up the video signals to generate, +* if desired. +* - Call XVtc_SetPolarity to set up the video signal polarity. +* - Call XVtc_SetSource for source selection +* - Call XVtc_SetGeneratorHoriOffset to set up the Generator +* VBlank/VSync horizontal offsets, if values other than the default are +* needed +* - Call XVtc_EnableSync, if generator needs to be synced to the detector +* - Call XVtc_Enable to enable/start the VTC device. +* +* Interrupts +* +* The interrupt types supported are: +* - Frame Sync Interrupts 0 - 15 +* - Generator interrupt: +* - Generator Active Video Interrupt +* - Generator VBLANK Interrupt +* - Detector interrupt: +* - Detector Active Video Interrupt +* - Detector VBLANK Interrupt +* - Signal Lock interrupt: +* - Active Chroma signal lock +* - Active Video Signal Lock +* - Field ID Signal Lock +* - Vertical Blank Signal Lock +* - Vertical Sync Signal Lock +* - Horizontal Blank Signal Lock +* - Horizontal Sync Signal Lock +* +* Virtual Memory +* +* This driver supports Virtual Memory. The RTOS is responsible for calculating +* the correct device base address in Virtual Memory space. +* +* Threads +* +* This driver is not thread safe. Any needs for threads or thread mutual +* exclusion must be satisfied by the layer above this driver. +* +* Asserts +* +* Asserts are used within all Xilinx drivers to enforce constraints on argument +* values. Asserts can be turned off on a system-wide basis by defining, at +* compile time, the NDEBUG identifier. By default, asserts are turned on and it +* is recommended that users leave asserts on during development. +* +* Building the driver +* +* The Vtc driver is composed of several source files. This allows the user +* to build and link only those parts of the driver that are necessary. +* +* Examples +* +* An example is provided with this driver to demonstrate the driver usage. +* +* Cache Coherency +* +* Alignment +* +* Limitations +* +* BUS Interface +* +* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- ------ -------- -----------------------------------------------
+* 1.00a xd     08/05/08 First release
+* 1.01a xd     07/23/10 Added GIER Added more h/w generic info into
+*                       xparameters.h Feed callbacks with pending
+*                       interrupt info. Added Doxygen & Version support
+* 2.00a xd     05/13/11 1. Renamed to "Video Timing Controller"
+*                       2. Added Generator/Detector VBlank/VSync
+*                          Horizontal offset setup/fetch support
+*                       3. Renamed the IP to support to be axi_vtc
+*                       4. Supported sync between generator and detector
+*                          with addition of new XVtc_EnableSync and
+*                          XVtc_DisableSync functions
+*                       5. Renamed XVtc_SetSync to XVtc_SetFSync
+*                       6. Renamed XVtc_GetSync to XVtc_GetFSync
+*                       7. Removed unnecessary register write in
+*                          XVtc_Reset
+*                       8. Corrected driver name in .mdd file
+*                       9. Updated register bit definition (a few fields grow
+*                          from 12 to 13 bit wide)
+* 2.00a cm     05/25/11 1. Renamed XVtc_SetSkip to XVtc_SetSkipLine
+*                       2. Renamed XVtc_GetSkip to XVtc_GetSkipLine
+*                       3. Added XVtc_SetSkipPixel
+*                       4. Added XVtc_GetSkipPixel
+* 2.00a cm     06/16/12 1. Added missing xil_assert.h include
+* 2.00a cm     07/25/12 1. Removed unused XVtc_IntrSetLockPolarity function
+* 3.00a cm     08/02/12 1. Added the XVtc_Sync_Reset frame sync'ed SW
+*                       reset function.
+* 3.00a cjm    08/02/12 Converted from xio.h to xil_io.h, translating
+*                       basic types, MB cache functions, exceptions and
+*                       assertions to xil_io format.
+*                       Replaced the following
+*                       "XExc_Init" -> "Xil_ExceptionInit"
+*                       "XExc_RegisterHandler" -> "Xil_ExceptionRegister
+*                                                                 Handler"
+*                       "XEXC_ID_NON_CRITICAL_INT" -> "XIL_EXCEPTION_ID_INT"
+*                       "XExceptionHandler" -> "Xil_ExceptionHandler"
+*                       "XExc_mEnableExceptions" -> "Xil_ExceptionEnable"
+*                       "XEXC_NON_CRITICAL" -> "XIL_EXCEPTION_NON_CRITICAL"
+*                       "XExc_DisableExceptions" -> "Xil_ExceptionDisable"
+*                       "XExc_RemoveHandler" -> "Xil_ExceptionRemoveHandler"
+*                       "microblaze_enable_interrupts" -> "Xil_ExceptionEnable"
+*                       "microblaze_disable_interrupts" -> "Xil_Exception
+*                                                               Disable"
+*
+*                       "XCOMPONENT_IS_STARTED" -> "XIL_COMPONENT_IS_STARTED"
+*                       "XCOMPONENT_IS_READY" -> "XIL_COMPONENT_IS_READY"
+*
+*                       "XASSERT_NONVOID" -> "Xil_AssertNonvoid"
+*                       "XASSERT_VOID_ALWAYS" -> "Xil_AssertVoidAlways"
+*                       "XASSERT_VOID" -> "Xil_AssertVoid"
+*                       "Xil_AssertVoid_ALWAYS" -> "Xil_AssertVoidAlways"
+*                       "XAssertStatus" -> "Xil_AssertStatus"
+*                       "XAssertSetCallback" -> "Xil_AssertCallback"
+*
+*                       "XASSERT_OCCURRED" -> "XIL_ASSERT_OCCURRED"
+*                       "XASSERT_NONE" -> "XIL_ASSERT_NONE"
+*
+*                       "microblaze_disable_dcache" -> "Xil_DCacheDisable"
+*                       "microblaze_enable_dcache" -> "Xil_DCacheEnable"
+*                       "microblaze_enable_icache" -> "Xil_ICacheEnable"
+*                       "microblaze_disable_icache" -> "Xil_ICacheDisable"
+*                       "microblaze_init_dcache_range" -> "Xil_DCacheInvalidate
+*                                                                       Range"
+*
+*                       "XCache_DisableDCache" -> "Xil_DCacheDisable"
+*                       "XCache_DisableICache" -> "Xil_ICacheDisable"
+*                       "XCache_EnableDCache" -> "Xil_DCacheEnableRegion"
+*                       "XCache_EnableICache" -> "Xil_ICacheEnableRegion"
+*                       "XCache_InvalidateDCacheLine" -> "Xil_DCacheInvalidate
+*                                                                       Range"
+*
+*                       "XUtil_MemoryTest32" -> "Xil_TestMem32"
+*                       "XUtil_MemoryTest16" -> "Xil_TestMem16"
+*                       "XUtil_MemoryTest8" -> "Xil_TestMem8"
+*
+*                       "xutil.h" -> "xil_testmem.h"
+*
+*                       "xbasic_types.h" -> "xil_types.h"
+*                       "xio.h" -> "xil_io.h"
+*
+*                       "XIo_In32" -> "Xil_In32"
+*                       "XIo_Out32" -> "Xil_Out32"
+*
+*                       "XTRUE" -> "TRUE"
+*                       "XFALSE" -> "FALSE"
+*                       "XNULL" -> "NULL"
+*
+*                       "Xuint8" -> "u8"
+*                       "Xuint16" -> "u16"
+*                       "Xuint32" -> "u32"
+*                       "Xint8" -> "char"
+*                       "Xint16" -> "short"
+*                       "Xint32" -> "long"
+*                       "Xfloat32" -> "float"
+*                       "Xfloat64" -> "double"
+*                       "Xboolean" -> "int"
+*                       "XTEST_FAILED" -> "XST_FAILURE"
+*                       "XTEST_PASSED" -> "XST_SUCCESS"
+* 4.00a cjm    02/07/13 Removed Unused Functions
+*                       XVtc_IntrEnableGlobal
+*                       XVtc_IntrDisableGlobal
+* 5.00a cjm    08/07/13 Replaced XVTC_RESET with (XVTC_CTL)
+*                       Replaced XVTC_RESET_RESET_MASK with
+*                       (XVTC_CTL_RESET_MASK)
+*                       Replaced XVTC_SYNC_RESET_MASK with (XVTC_CTL_SRST_MASK)
+* 5.00a cjm    10/30/13 Replaced XVtc_RegUpdate with XVtc_RegUpdateEnable
+*                       Added XVtc_RegUpdateDisable
+*                       Removed type parameter from XVtc_Enable
+*                       Added XVtc_EnableGenerator to enable only the Generator
+*                       Added XVtc_EnableDetector to enable only the Detector
+* 5.00a cjm    11/01/13 Added Timing, VideoMode and Signal Conversion
+*                       Functions:
+*                       XVtc_ConvVideoMode2Timing
+*                       XVtc_ConvTiming2Signal
+*                       XVtc_ConvSignal2Timing
+*                       XVtc_ConvTiming2VideoMode
+*                       Added Timing and Video Mode Set/Get Functions:
+*                       XVtc_SetGeneratorTiming
+*                       XVtc_SetGeneratorVideoMode
+*                       XVtc_GetGeneratorTiming
+*                       XVtc_GetGeneratorVideoMode
+*                       XVtc_GetDetectorTiming
+*                       XVtc_GetDetectorVideoMode
+* 6.0   adk    19/12/13 Updated as per the New Tcl API's.
+* 6.1   adk    23/08/14 Implemented XVtc_SelfTest in
+*                       xvtc_selftest.c.
+*                       Modified prototype of XVtc_GetVersion API.
+*
+*                       Modifications from xvtc.c file are:
+*                       Modified HActiveVideo value to 1920 for
+*                       XVTC_VMODE_1080I mode.
+*                       Removed Major, Minor and Revision parameters from
+*                       XVtc_GetVersion.
+*                       Modified return type of XVtc_GetVersion from
+*                       void to u32.
+*
+*                       Modifications from xvtc_hw.h file are:
+*                       Removed XVTC_ERR_FIL_MASK macro because it is  not
+*                       present in latest product guide.
+*                       Modified register offsets from XVTC_* to XVTC_*_OFFSET
+*                       for consistency.
+*                       Added backward compatibility macros.
+*
+*                       Modifications from xvtc_intr.c and xvtc_sinit.c files
+*                       are:
+*                       updated doxygen tags.
+*
+*                       Modifications from xvtc_selftest.c file are:
+*                       First Release.
+*                       Implemented following function:
+*                       XVtc_SelfTest.
+*
+* +******************************************************************************/ + +#ifndef XVTC_H_ +#define XVTC_H_ /**< Prevent circular inclusions + * by using protection macros */ + +#ifdef __cplusplus +extern "C" { +#endif + +/***************************** Include Files *********************************/ + +#include "xvtc_hw.h" +#include "xil_assert.h" +#include "xstatus.h" + +/************************** Constant Definitions *****************************/ + +/** @name Interrupt Types for setting up Callbacks +* @{ +*/ +#define XVTC_HANDLER_FRAMESYNC 1 /**< A frame sync event + * interrupt type */ +#define XVTC_HANDLER_LOCK 2 /**< A signal lock event + * interrupt type */ +#define XVTC_HANDLER_DETECTOR 3 /**< A detector event + * interrupt type */ +#define XVTC_HANDLER_GENERATOR 4 /**< A generator event + * interrupt type */ +#define XVTC_HANDLER_ERROR 5 /**< An error condition + * interrupt type */ +/*@}*/ + +/** @name Options for enabling VTC modules + * @{ + */ +#define XVTC_EN_GENERATOR 1 /**< To enable generator */ +#define XVTC_EN_DETECTOR 2 /**< To enable detector */ +/*@}*/ + +/** @name Address gap between two register next to each other + * @{ + */ +#define XVTC_REG_ADDRGAP 4 /**< Register address gap */ + + +#define XVTC_VMODE_720P 1 /**< Video mode 720P */ +#define XVTC_VMODE_1080P 2 /**< Video mode 1080P */ +#define XVTC_VMODE_480P 3 /**< Video mode 480P */ +#define XVTC_VMODE_576P 4 /**< Video mode 576P */ +#define XVTC_VMODE_VGA 5 /**< Video mode VGA */ +#define XVTC_VMODE_SVGA 6 /**< Video mode SVGA */ +#define XVTC_VMODE_XGA 7 /**< Video mode XGA */ +#define XVTC_VMODE_SXGA 8 /**< Video mode SXGA */ +#define XVTC_VMODE_WXGAPLUS 9 /**< Video mode WXGAPlus */ +#define XVTC_VMODE_WSXGAPLUS 10 /**< Video mode WSXGAPlus */ +#define XVTC_VMODE_1080I 100 /**< Video mode 1080I */ +#define XVTC_VMODE_NTSC 101 /**< Video mode NTSC */ +#define XVTC_VMODE_PAL 102 /**< Video mode PAL */ +/*@}*/ + +/**************************** Type Definitions *******************************/ + +/** + * This typedef contains configuration information for a VTC core. + * Each VTC device should have a configuration structure associated + */ +typedef struct { + u16 DeviceId; /**< DeviceId is the unique ID of the VTC + * core */ + u32 BaseAddress; /**< BaseAddress is the physical base address + * of the core's registers */ +} XVtc_Config; + +/** + * This typedef contains Polarity configuration information for a VTC core. + */ +typedef struct { + u8 ActiveChromaPol; /**< Active Chroma Output Polarity */ + u8 ActiveVideoPol; /**< Active Video Output Polarity */ + u8 FieldIdPol; /**< Field ID Output Polarity */ + u8 VBlankPol; /**< Vertical Blank Output Polarity */ + u8 VSyncPol; /**< Vertical Sync Output Polarity */ + u8 HBlankPol; /**< Horizontal Blank Output + * Polarity */ + u8 HSyncPol; /**< Horizontal Sync Output Polarity */ +} XVtc_Polarity; + +/** + * This typedef contains Source Selection configuration information for a + * VTC core. + */ +typedef struct { + u8 FieldIdPolSrc; /**< Field ID Output Polarity Source */ + u8 ActiveChromaPolSrc; /**< Active Chroma Output Polarity Source */ + u8 ActiveVideoPolSrc; /**< Active Video Output Polarity Source */ + u8 HSyncPolSrc; /**< Horizontal Sync Output Polarity Source */ + u8 VSyncPolSrc; /**< Vertical Sync Output Polarity Source */ + u8 HBlankPolSrc; /**< Horizontal Blank Output Polarity Source */ + u8 VBlankPolSrc; /**< Vertical Blank Output Polarity Source */ + + u8 VChromaSrc; /**< Start of Active Chroma Register + * Source Select */ + u8 VActiveSrc; /**< Vertical Active Video Start Register + * Source Select */ + u8 VBackPorchSrc; /**< Vertical Back Porch Start Register + * Source Select */ + u8 VSyncSrc; /**< Vertical Sync Start Register Source + * Select */ + u8 VFrontPorchSrc; /**< Vertical Front Porch Start Register Source + * Select */ + u8 VTotalSrc; /**< Vertical Total Register Source Select */ + u8 HActiveSrc; /**< Horizontal Active Video Start Register + * Source Select */ + u8 HBackPorchSrc; /**< Horizontal Back Porch Start Register + * Source Select */ + u8 HSyncSrc; /**< Horizontal Sync Start Register + * Source Select */ + u8 HFrontPorchSrc; /**< Horizontal Front Porch Start Register + * Source Select */ + u8 HTotalSrc; /**< Horizontal Total Register Source Select */ + +} XVtc_SourceSelect; + +/** + * This typedef contains the VTC signal configuration used by the + * Generator/Detector modules in a VTC device. + */ +typedef struct { + u16 OriginMode; /**< Origin Mode */ + u16 HTotal; /**< Horizontal total clock cycles per Line */ + u16 HFrontPorchStart; /**< Horizontal Front Porch Start Cycle + * Count */ + u16 HSyncStart; /**< Horizontal Sync Start Cycle Count */ + u16 HBackPorchStart; /**< Horizontal Back Porch Start Cycle Count */ + u16 HActiveStart; /**< Horizontal Active Video Start Cycle + * Count */ + + u16 V0Total; /**< Total lines per Frame (Field 0) */ + u16 V0FrontPorchStart; /**< Vertical Front Porch Start Line + * Count * (Field 0) */ + u16 V0SyncStart; /**< Vertical Sync Start Line Count + * (Field 0) */ + u16 V0BackPorchStart; /**< Vertical Back Porch Start Line + * Count * (Field 0) */ + u16 V0ActiveStart; /**< Vertical Active Video Start Line + * Count * (Field 0) */ + u16 V0ChromaStart; /**< Active Chroma Start Line Count + * (Field 0) */ + + u16 V1Total; /**< Total lines per Frame (Field 1) */ + u16 V1FrontPorchStart; /**< Vertical Front Porch Start Line + * Count * (Field 1) */ + u16 V1SyncStart; /**< Vertical Sync Start Line Count + * (Field 1) */ + u16 V1BackPorchStart; /**< Vertical Back Porch Start Line Count * + * (Field 1) */ + u16 V1ActiveStart; /**< Vertical Active Video Start Line + * Count (Field 1) */ + u16 V1ChromaStart; /**< Active Chroma Start Line Count + * (Field 1) */ +} XVtc_Signal; + +/** + * This typedef contains Detector/Generator VBlank/VSync Horizontal Offset + * configuration information for a VTC device. + */ +typedef struct { + u16 V0BlankHoriStart; /**< Vertical Blank Hori Offset Start + * (field 0) */ + u16 V0BlankHoriEnd; /**< Vertical Blank Hori Offset End + * (field 0) */ + u16 V0SyncHoriStart; /**< Vertical Sync Hori Offset Start + * (field 0) */ + u16 V0SyncHoriEnd; /**< Vertical Sync Hori Offset End + * (field 0) */ + u16 V1BlankHoriStart; /**< Vertical Blank Hori Offset Start + * (field 1) */ + u16 V1BlankHoriEnd; /**< Vertical Blank Hori Offset End + * (field 1) */ + u16 V1SyncHoriStart; /**< Vertical Sync Hori Offset Start + * (field 1) */ + u16 V1SyncHoriEnd; /**< Vertical Sync Hori Offset End + * (field 1) */ +} XVtc_HoriOffsets; + +/** +* This typedef contains Timing (typically in Display Timing) format +* configuration information for the VTC core. +*/ +typedef struct { + /* Horizontal Timing */ + u16 HActiveVideo; /**< Horizontal Active Video Size */ + u16 HFrontPorch; /**< Horizontal Front Porch Size */ + u16 HSyncWidth; /**< Horizontal Sync Width */ + u16 HBackPorch; /**< Horizontal Back Porch Size */ + u16 HSyncPolarity; /**< Horizontal Sync Polarity */ + + /* Vertical Timing */ + u16 VActiveVideo; /**< Vertical Active Video Size */ + u16 V0FrontPorch; /**< Vertical Front Porch Size */ + u16 V0SyncWidth; /**< Vertical Sync Width */ + u16 V0BackPorch; /**< Horizontal Back Porch Size */ + + u16 V1FrontPorch; /**< Vertical Front Porch Size */ + u16 V1SyncWidth; /**< Vertical Sync Width */ + u16 V1BackPorch; /**< Vertical Back Porch Size */ + + u16 VSyncPolarity; /**< Vertical Sync Polarity */ + + u8 Interlaced; /**< Interlaced / Progressive video */ +} XVtc_Timing; + +/** +* +* Callback type for all interrupts except error interrupt. +* +* @param CallBackRef is a callback reference passed in by the upper +* layer when setting the callback functions, and passed back to +* the upper layer when the callback is invoked. +* @param Mask is a bit mask indicating the cause of the event. For +* current core version, this parameter is "OR" of 0 or more +* XVTC_IXR_*_MASK constants defined in xvtc_hw.h. +* +* @return None. +* +* @note None. +* + *****************************************************************************/ +typedef void (*XVtc_CallBack)(void *CallBackRef, u32 Mask); + +/** +* +* Callback type for Error interrupt. +* +* @param CallBackRef is a callback reference passed in by the upper +* layer when setting the callback functions, and passed back to +* the upper layer when the callback is invoked. +* @param ErrorMask is a bit mask indicating the cause of the error. For +* current core version, this parameter always have value 0 and +* could be ignored. +* +* @return None. +* +* @note None. +* +*****************************************************************************/ +typedef void (*XVtc_ErrorCallBack)(void *CallBackRef, u32 ErrorMask); + +/** + * The XVtc driver instance data. An instance must be allocated for each + * VTC core in use. + */ +typedef struct { + XVtc_Config Config; /**< Hardware Configuration */ + u32 IsReady; /**< Core and the driver instance are + * initialized */ + + /* Interrupt callbacks*/ + XVtc_CallBack FrameSyncCallBack; /**< Callback for Frame Sync + * interrupt */ + void *FrameSyncRef; /**< To be passed to the Frame Sync + * interrupt callback */ + + XVtc_CallBack LockCallBack; /**< Callback for Signal Lock + * interrupt */ + void *LockRef; /**< To be passed to the Signal Lock + * interrupt callback */ + + XVtc_CallBack DetectorCallBack; /**< Callback for Detector interrupt */ + void *DetectorRef; /**< To be passed to the Detector + * interrupt callback */ + + XVtc_CallBack GeneratorCallBack; /**< Callback for Generator + * interrupt */ + void *GeneratorRef; /**< To be passed to the Generator + * interrupt callback */ + + XVtc_ErrorCallBack ErrCallBack; /**< Callback for Error interrupt */ + void *ErrRef; /**< To be passed to the Error + * interrupt callback */ +} XVtc; + +/***************** Macros (Inline Functions) Definitions *********************/ + +/*****************************************************************************/ +/** +* +* This function macro resets the VTC core. +* +* @param InstancePtr is a pointer to the VTC instance to be +* worked on. +* +* @return None. +* +* @note C-style signature: +* void XVtc_Reset(XVtc *InstancePtr) +* +******************************************************************************/ +#define XVtc_Reset(InstancePtr) \ + XVtc_WriteReg((InstancePtr)->Config.BaseAddress, (XVTC_CTL_OFFSET), \ + (XVTC_CTL_RESET_MASK)) + +/*****************************************************************************/ +/** +* +* This function macro resets the VTC core after the next input frame is +* complete. +* +* @param InstancePtr is a pointer to the VTC core instance to be +* worked on. +* +* @return None. +* +* @note C-style signature: +* void XVtc_SyncReset(XVtc *InstancePtr) +* +******************************************************************************/ +#define XVtc_SyncReset(InstancePtr) \ + XVtc_WriteReg((InstancePtr)->Config.BaseAddress, (XVTC_CTL_OFFSET), \ + (XVTC_CTL_SRST_MASK)) + +/*****************************************************************************/ +/** +* +* This function macro enables synchronization of the Generator with the +* Detector on the given VTC core. +* +* @param InstancePtr is a pointer to the VTC core instance to be +* worked on. +* +* @return None. +* +* @note C-style signature: +* void XVtc_EnableSync(XVtc *InstancePtr) +* +******************************************************************************/ +#define XVtc_EnableSync(InstancePtr) \ + XVtc_WriteReg((InstancePtr)->Config.BaseAddress, (XVTC_CTL_OFFSET), \ + XVtc_ReadReg((InstancePtr)->Config.BaseAddress, \ + (XVTC_CTL_OFFSET)) | (XVTC_CTL_SE_MASK)) + +/*****************************************************************************/ +/** +* +* This function macro enables updating timing registers at the end of each +* Generator frame. (DEPRECATED - replaced with XVtc_RegUpdateEnable). +* +* @param InstancePtr is a pointer to the VTC core instance to be +* worked on. +* +* @return None. +* +* @note C-style signature: +* void XVtc_RegUpdate(XVtc *InstancePtr) +* +******************************************************************************/ +#define XVtc_RegUpdate(InstancePtr) \ + XVtc_WriteReg((InstancePtr)->Config.BaseAddress, (XVTC_CTL_OFFSET), \ + XVtc_ReadReg((InstancePtr)->Config.BaseAddress, \ + (XVTC_CTL_OFFSET)) | (XVTC_CTL_RU_MASK)) + +/*****************************************************************************/ +/** +* +* This function macro enables updating timing registers at the end of each +* Generator frame. +* +* @param InstancePtr is a pointer to the VTC core instance to be +* worked on. +* +* @return None. +* +* @note C-style signature: +* void XVtc_RegUpdateEnable(XVtc *InstancePtr) +* +******************************************************************************/ +#define XVtc_RegUpdateEnable(InstancePtr) \ + XVtc_WriteReg((InstancePtr)->Config.BaseAddress, (XVTC_CTL_OFFSET), \ + XVtc_ReadReg((InstancePtr)->Config.BaseAddress, \ + (XVTC_CTL_OFFSET)) | (XVTC_CTL_RU_MASK)) + +/*****************************************************************************/ +/** +* +* This function macro disables updating timing registers at the end of each +* Generator frame. +* +* @param InstancePtr is a pointer to the VTC core instance to be +* worked on. +* +* @return None. +* +* @note C-style signature: +* void XVtc_RegUpdateDisable(XVtc *InstancePtr) +* +******************************************************************************/ +#define XVtc_RegUpdateDisable(InstancePtr) \ + XVtc_WriteReg((InstancePtr)->Config.BaseAddress, (XVTC_CTL_OFFSET), \ + XVtc_ReadReg((InstancePtr)->Config.BaseAddress, \ + (XVTC_CTL_OFFSET)) & (~(XVTC_CTL_RU_MASK))) + +/*****************************************************************************/ +/** +* +* This function macro disables synchronization of the Generator with the +* Detector on the given VTC core. +* +* @param InstancePtr is a pointer to the VTC core instance to be +* worked on. +* +* @return None. +* +* @note C-style signature: +* void XVtc_DisableSync(XVtc *InstancePtr) +* +******************************************************************************/ +#define XVtc_DisableSync(InstancePtr) \ + XVtc_WriteReg((InstancePtr)->Config.BaseAddress, (XVTC_CTL_OFFSET), \ + (XVtc_ReadReg((InstancePtr)->Config.BaseAddress, \ + (XVTC_CTL_OFFSET)) & ~(XVTC_CTL_SE_MASK))) + +/*****************************************************************************/ +/** +* +* This function macro gets the status of the Detector in the VTC core. +* +* @param InstancePtr is a pointer to the VTC core instance to be +* worked on. +* +* @return The Detector status. Use XVTC_DS_* in xvtc_hw.h to interpret +* the returned value. +* +* @note C-style signature: +* u32 XVtc_GetDetectionStatus(XVtc *InstancePtr) +* +******************************************************************************/ +#define XVtc_GetDetectionStatus(InstancePtr) \ + XVtc_ReadReg((InstancePtr)->Config.BaseAddress, (XVTC_DTSTAT_OFFSET)) + +/*****************************************************************************/ +/** +* +* This function macro enables individual interrupts of the VTC core by +* updating the IRQ_ENABLE register. +* +* @param InstancePtr is a pointer to the VTC core instance to be +* worked on. +* +* @param IntrType is the bit-mask of the interrupts to be enabled. +* Bit positions of 1 will be enabled. Bit positions of 0 will +* keep the previous setting. This mask is formed by OR'ing +* XVTC_IXR_*_MASK bits defined in xvtc_hw.h. +* +* @return None. +* +* @note The existing enabled interrupt(s) will remain enabled. +* C-style signature: +* void XVtc_IntrEnable(XVtc *InstancePtr, u32 IntrType) +* +******************************************************************************/ +#define XVtc_IntrEnable(InstancePtr, IntrType) \ + XVtc_WriteReg((InstancePtr)->Config.BaseAddress, (XVTC_IER_OFFSET), \ + (((IntrType) & (XVTC_IXR_ALLINTR_MASK)) | \ + (XVtc_ReadReg((InstancePtr)->Config.BaseAddress, \ + (XVTC_IER_OFFSET))))) + +/*****************************************************************************/ +/** +* +* This function macro disables individual interrupts of the VTC core by +* updating the IRQ_ENABLE register. +* +* @param InstancePtr is a pointer to the VTC core instance to be +* worked on. +* +* @param IntrType is the bit-mask of the interrupts to be disabled. +* Bit positions of 1 will be disabled. Bit positions of 0 will +* keep the previous setting. This mask is formed by OR'ing +* XVTC_IXR_*_MASK bits defined in xvtc_hw.h. +* +* @return None. +* +* @note Any other interrupt not covered by parameter IntrType, +* if enabled before this macro is called, will remain enabled. +* C-style signature: +* void XVtc_IntrDisable(XVtc *InstancePtr, u32 IntrType) +* +******************************************************************************/ +#define XVtc_IntrDisable(InstancePtr, IntrType) \ + XVtc_WriteReg((InstancePtr)->Config.BaseAddress, (XVTC_IER_OFFSET), \ + XVtc_ReadReg((InstancePtr)->Config.BaseAddress, \ + (XVTC_IER_OFFSET)) & ((~(IntrType)) & (XVTC_IXR_ALLINTR_MASK))) + +/*****************************************************************************/ +/** +* +* This function macro returns the pending interrupt status of the VTC core +* read from the Status register. +* +* @param InstancePtr is a pointer to the VTC core instance to be +* worked on. +* +* @return The status of pending interrupts of the VTC core. +* Use XVTC_IXR_*_MASK constants defined in xvtc_hw.h to +* interpret this value. +* +* @note C-style signature: +* u32 XVtc_StatusGePending(XVtc *InstancePtr) +* +******************************************************************************/ +#define XVtc_StatusGetPending(InstancePtr) \ + XVtc_ReadReg((InstancePtr)->Config.BaseAddress, (XVTC_ISR_OFFSET)) & \ + (XVTC_IXR_ALLINTR_MASK) + +/*****************************************************************************/ +/** +* +* This function macro returns the pending interrupts of the VTC core for +* the interrupts that have been enabled. +* +* @param InstancePtr is a pointer to the VTC core instance to be +* worked on. +* +* @return The pending interrupts of the VTC core. Use +* XVTC_IXR_*_MASK constants defined in xvtc_hw.h to +* interpret this value. The returned value is a logical AND of +* the contents of the STATUS Register and the IRQ_ENABLE +* Register. +* +* @note C-style signature: +* u32 XVtc_IntrGetPending(XVtc *InstancePtr) +* +******************************************************************************/ +#define XVtc_IntrGetPending(InstancePtr) \ + (XVtc_ReadReg((InstancePtr)->Config.BaseAddress, XVTC_IER_OFFSET) & \ + XVtc_ReadReg((InstancePtr)->Config.BaseAddress, XVTC_ISR_OFFSET) & \ + XVTC_IXR_ALLINTR_MASK) + +/*****************************************************************************/ +/** +* +* This function macro clears/acknowledges pending interrupts of the VTC +* core in the Status register. Bit positions of 1 will be cleared. +* +* @param InstancePtr is a pointer to the VTC core instance to be +* worked on. +* @param IntrType is the pending interrupts to clear/acknowledge. +* Use OR'ing of XVTC_IXR_*_MASK constants defined in +* xvtc_hw.h to create this parameter value. +* +* @return None. +* +* @note C-style signature: +* void XVtc_IntrClear(XVtc *InstancePtr, u32 IntrType) +* +******************************************************************************/ +#define XVtc_IntrClear(InstancePtr, IntrType) \ + XVtc_WriteReg((InstancePtr)->Config.BaseAddress, (XVTC_ISR_OFFSET), \ + ((IntrType) & (XVTC_IXR_ALLINTR_MASK))) + +/*****************************************************************************/ +/** +* +* This function macro resets the VTC core after the next input frame is +* complete. +* +* @param InstancePtr is a pointer to the VTC core instance to be +* worked on. +* +* @return None. +* +* @note C-style signature: +* void XVtc_Sync_Reset(XVtc *InstancePtr) +* +******************************************************************************/ +#define XVtc_Sync_Reset XVtc_SyncReset + +/************************** Function Prototypes ******************************/ + +/* Initialization and control functions in xvtc.c */ + +/* Initialization */ +int XVtc_CfgInitialize(XVtc *InstancePtr, XVtc_Config *CfgPtr, + u32 EffectiveAddr); + +/* Enabling and Disabling the VTC core */ +void XVtc_EnableGenerator(XVtc *InstancePtr); +void XVtc_EnableDetector(XVtc *InstancePtr); +void XVtc_Enable(XVtc *InstancePtr); +void XVtc_DisableGenerator(XVtc *InstancePtr); +void XVtc_DisableDetector(XVtc *InstancePtr); +void XVtc_Disable(XVtc *InstancePtr); + +/* Video Mode, Timing and Signal/HoriOffsets/Polarity Conversions */ +void XVtc_ConvVideoMode2Timing(XVtc *InstancePtr, u16 Mode, + XVtc_Timing *TimingPtr); +void XVtc_ConvTiming2Signal(XVtc *InstancePtr, XVtc_Timing *TimingPtr, + XVtc_Signal *SignalCfgPtr, XVtc_HoriOffsets *HOffPtr, + XVtc_Polarity *PolarityPtr); +void XVtc_ConvSignal2Timing(XVtc *InstancePtr, XVtc_Signal *SignalCfgPtr, + XVtc_HoriOffsets *HOffPtr, XVtc_Polarity *PolarityPtr, + XVtc_Timing *TimingPtr); +u16 XVtc_ConvTiming2VideoMode(XVtc *InstancePtr, XVtc_Timing *TimingPtr); + +/* Timing/Video Mode Setting/Fetching */ +void XVtc_SetGeneratorTiming(XVtc *InstancePtr, XVtc_Timing * TimingPtr); +void XVtc_SetGeneratorVideoMode(XVtc *InstancePtr, u16 Mode); +void XVtc_GetGeneratorTiming(XVtc *InstancePtr, XVtc_Timing *TimingPtr); +u16 XVtc_GetGeneratorVideoMode(XVtc *InstancePtr); +void XVtc_GetDetectorTiming(XVtc *InstancePtr, XVtc_Timing *TimingPtr); +u16 XVtc_GetDetectorVideoMode(XVtc *InstancePtr); + +/* Polarity setting */ +void XVtc_SetPolarity(XVtc *InstancePtr, XVtc_Polarity *PolarityPtr); +void XVtc_GetPolarity(XVtc *InstancePtr, XVtc_Polarity *PolarityPtr); +void XVtc_GetDetectorPolarity(XVtc *InstancePtr, XVtc_Polarity *PolarityPtr); + +/* Source selection */ +void XVtc_SetSource(XVtc *InstancePtr, XVtc_SourceSelect *SourcePtr); +void XVtc_GetSource(XVtc *InstancePtr, XVtc_SourceSelect *SourcePtr); + +/* Skipping setting */ +void XVtc_SetSkipLine(XVtc *InstancePtr, int GeneratorChromaSkip); +void XVtc_GetSkipLine(XVtc *InstancePtr, int *GeneratorChromaSkipPtr); +void XVtc_SetSkipPixel(XVtc *InstancePtr, int GeneratorChromaSkip); +void XVtc_GetSkipPixel(XVtc *InstancePtr, int *GeneratorChromaSkipPtr); + +/* VTC generator/detector setting/fetching */ +void XVtc_SetGenerator(XVtc *InstancePtr, XVtc_Signal *SignalCfgPtr); +void XVtc_GetGenerator(XVtc *InstancePtr, XVtc_Signal *SignalCfgPtr); +void XVtc_GetDetector(XVtc *InstancePtr, XVtc_Signal *SignalCfgPtr); + +/* Delay setting */ +void XVtc_SetDelay(XVtc *InstancePtr, int VertDelay, int HoriDelay); +void XVtc_GetDelay(XVtc *InstancePtr, int *VertDelayPtr, int *HoriDelayPtr); + +/* Frame Sync setting */ +void XVtc_SetFSync(XVtc *InstancePtr, u16 FrameSyncIndex, + u16 VertStart, u16 HoriStart); +void XVtc_GetFSync(XVtc *InstancePtr, u16 FrameSyncIndex, + u16 *VertStartPtr, u16 *HoriStartPtr); + +/* Horizontal Offset Setting */ +void XVtc_SetGeneratorHoriOffset(XVtc *InstancePtr, + XVtc_HoriOffsets *HoriOffset); +void XVtc_GetGeneratorHoriOffset(XVtc *InstancePtr, + XVtc_HoriOffsets *HoriOffset); +void XVtc_GetDetectorHoriOffset(XVtc *InstancePtr, + XVtc_HoriOffsets *HoriOffset); + +/* Version function */ +u32 XVtc_GetVersion(XVtc *InstancePtr); + +/* Initialization functions in xvtc_sinit.c */ +XVtc_Config *XVtc_LookupConfig(u16 DeviceId); + +/* + * Interrupt related function(s) in xvtc_intr.c + */ +void XVtc_IntrHandler(void *InstancePtr); +int XVtc_SetCallBack(XVtc *InstancePtr, u32 IntrType, + void *CallBackFunc, void *CallBackRef); + +/* SelfTest related function in xvtc_selftest.c */ +int XVtc_SelfTest(XVtc *InstancePtr); + +/************************** Variable Declarations ****************************/ + + +#ifdef __cplusplus +} +#endif + +#endif /* end of protection macro */ diff --git a/XilinxProcessorIPLib/drivers/vtc/src/xvtc_g.c b/XilinxProcessorIPLib/drivers/vtc/src/xvtc_g.c new file mode 100644 index 00000000..583d42fa --- /dev/null +++ b/XilinxProcessorIPLib/drivers/vtc/src/xvtc_g.c @@ -0,0 +1,58 @@ +/****************************************************************************** +* +* Copyright (C) 2010 - 2014 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +* (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in +* this Software without prior written authorization from Xilinx. +* +******************************************************************************/ + +#include "xparameters.h" +#include "xvtc.h" + +/* +* The configuration table for devices +*/ + +XVtc_Config XVtc_ConfigTable[] = +{ + { + XPAR_FMC_HDMI_INPUT_V_TC_1_DEVICE_ID, + XPAR_FMC_HDMI_INPUT_V_TC_1_BASEADDR + }, + { + XPAR_FMC_HDMI_OUTPUT_V_TC_1_DEVICE_ID, + XPAR_FMC_HDMI_OUTPUT_V_TC_1_BASEADDR + }, + { + XPAR_FMC_SENSOR_INPUT_V_TC_1_DEVICE_ID, + XPAR_FMC_SENSOR_INPUT_V_TC_1_BASEADDR + }, + { + XPAR_HDMI_OUTPUT_V_TC_1_DEVICE_ID, + XPAR_HDMI_OUTPUT_V_TC_1_BASEADDR + } +}; diff --git a/XilinxProcessorIPLib/drivers/vtc/src/xvtc_hw.h b/XilinxProcessorIPLib/drivers/vtc/src/xvtc_hw.h new file mode 100644 index 00000000..9a0199b3 --- /dev/null +++ b/XilinxProcessorIPLib/drivers/vtc/src/xvtc_hw.h @@ -0,0 +1,658 @@ +/****************************************************************************** +* +* Copyright (C) 2008 - 2014 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +* (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in +* this Software without prior written authorization from Xilinx. +* +******************************************************************************/ +/*****************************************************************************/ +/** +* +* @file xvtc_hw.h +* +* This header file contains identifiers and register-level core functions (or +* macros) that can be used to access the Xilinx VTC core. +* +* For more information about the operation of this core, see the hardware +* specification and documentation in the higher level driver xvtc.h source +* code file. +* +* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- ------ -------- -------------------------------------------------------
+* 1.00a xd     08/05/08 First release.
+* 1.01a xd     07/23/10 Added GIER. Added more h/w generic info into
+*                       xparameters.h. Feed callbacks with pending
+*                       interrupt info. Added Doxygen & Version support.
+* 2.00a cm     05/25/11 Renamed XVTC_CTL_GACS_MASK to XVTC_CTL_GACLS_MASKl.
+*                       Added XVTC_CTL_GACPS_MASK.
+* 3.00a cjm    08/01/12 Converted from xio.h to xil_io.h, translating basic
+*                       types, MB cache functions, exceptions and assertions to
+*                       xil_io format. Replaced the following
+*                       "XExc_Init" -> "Xil_ExceptionInit"
+*                       "XExc_RegisterHandler" -> "Xil_ExceptionRegisterHandler"
+*                       "XEXC_ID_NON_CRITICAL_INT" -> "XIL_EXCEPTION_ID_INT"
+*                       "XExceptionHandler" -> "Xil_ExceptionHandler"
+*                       "XExc_mEnableExceptions" -> "Xil_ExceptionEnable"
+*                       "XEXC_NON_CRITICAL" -> "XIL_EXCEPTION_NON_CRITICAL"
+*                       "XExc_DisableExceptions" -> "Xil_ExceptionDisable"
+*                       "XExc_RemoveHandler" -> "Xil_ExceptionRemoveHandler"
+*                       "microblaze_enable_interrupts" -> "Xil_Exception
+*                                                                      Enable"
+*                       "microblaze_disable_interrupts" -> "Xil_Exception
+*                                                                       Disable"
+*
+*                       "XCOMPONENT_IS_STARTED" -> "XIL_COMPONENT_IS_STARTED"
+*                       "XCOMPONENT_IS_READY" -> "XIL_COMPONENT_IS_READY"
+*
+*                       "XASSERT_NONVOID" -> "Xil_AssertNonvoid"
+*                       "XASSERT_VOID_ALWAYS" -> "Xil_AssertVoidAlways"
+*                       "XASSERT_VOID" -> "Xil_AssertVoid"
+*                       "Xil_AssertVoid_ALWAYS" -> "Xil_AssertVoidAlways"
+*                       "XAssertStatus" -> "Xil_AssertStatus"
+*                       "XAssertSetCallback" -> "Xil_AssertCallback"
+*
+*                       "XASSERT_OCCURRED" -> "XIL_ASSERT_OCCURRED"
+*                       "XASSERT_NONE" -> "XIL_ASSERT_NONE"
+*
+*                       "microblaze_disable_dcache" -> "Xil_DCacheDisable"
+*                       "microblaze_enable_dcache" -> "Xil_DCacheEnable"
+*                       "microblaze_enable_icache" -> "Xil_ICacheEnable"
+*                       "microblaze_disable_icache" -> "Xil_ICacheDisable"
+*                       "microblaze_init_dcache_range" -> "Xil_DCache
+*                                                         InvalidateRange"
+*
+*                       "XCache_DisableDCache" -> "Xil_DCacheDisable"
+*                       "XCache_DisableICache" -> "Xil_ICacheDisable"
+*                       "XCache_EnableDCache" -> "Xil_DCacheEnableRegion"
+*                       "XCache_EnableICache" -> "Xil_ICacheEnableRegion"
+*                       "XCache_InvalidateDCacheLine" -> "Xil_DCache
+*                                                       InvalidateRange"
+*
+*                       "XUtil_MemoryTest32" -> "Xil_TestMem32"
+*                       "XUtil_MemoryTest16" -> "Xil_TestMem16"
+*                       "XUtil_MemoryTest8" -> "Xil_TestMem8"
+*
+*                       "xutil.h" -> "xil_testmem.h"
+*
+*                       "xbasic_types.h" -> "xil_types.h"
+*                       "xio.h" -> "xil_io.h"
+*
+*                       "XIo_In32" -> "Xil_In32"
+*                       "XIo_Out32" -> "Xil_Out32"
+*
+*                       "XTRUE" -> "TRUE"
+*                       "XFALSE" -> "FALSE"
+*                       "XNULL" -> "NULL"
+*
+*                       "Xuint8" -> "u8"
+*                       "Xuint16" -> "u16"
+*                       "Xuint32" -> "u32"
+*                       "Xint8" -> "char"
+*                       "Xint16" -> "short"
+*                       "Xint32" -> "long"
+*                       "Xfloat32" -> "float"
+*                       "Xfloat64" -> "double"
+*                       "Xboolean" -> "int"
+*                       "XTEST_FAILED" -> "XST_FAILURE"
+*                       "XTEST_PASSED" -> "XST_SUCCESS"
+* 3.00a cjm    08/02/12 Changed XVTC_RESET_RESET_MASK from 0x0000_000a
+*                       to 0x8000_0000
+* 4.00a cjm    02/07/13 Remove Unused defines: XVTC_GIER, XVTC_GIER_GIE_MASK.
+* 4.00a cjm    02/08/13 Removed XVTC_CTL_HASS_MASK.
+* 5.00a cjm    08/06/13 Replaced CTL in Polarity and Encoding register
+*                       definition with "POL" and "ENC".
+*                       Renamed XVTC_RESET_RESET_MASK to XVTC_CTL_RESET_MASK.
+*                       Renamed XVTC_SYNC_RESET_MASK to XVTC_CTL_SRST_MASK.
+*                       Renamed Error register bit defs to XVTC_ERR_*
+*                       Added Patch and Internal Revision MASKs for.
+*                       Revision register.
+* 5.00a cjm    11/01/13 Removed Unused Hori Offset registers defines from
+*                       0x0a0 - 0x0c0A
+*                       Added interlaced register defines.
+*                       Changed Version Register Revision shift from 12 to 8
+*                       and changed mask to be 8 instead of 4 bits wide
+* 5.00a cjm    11/03/13 Added Chroma/field parity bit masks.
+*                       Replaced old timing bit masks/shifts with Start/End Bit
+*                       masks/shifts.
+* 6.1   adk    08/23/14 Removed XVTC_ERR_FIL_MASK macro because it is  not
+*                       present in latest product guide.
+*                       Modified register offsets from XVTC_* to XVTC_*_OFFSET
+*                       for consistency.
+*                       Added backward compatibility macros.
+*
+* +******************************************************************************/ + +#ifndef XVTC_HW_H_ +#define XVTC_HW_H_ /**< prevent circular inclusions + * by using protection macros */ + +#ifdef __cplusplus +extern "C" { +#endif + +/***************************** Include Files *********************************/ + +#include "xil_io.h" + +/************************** Constant Definitions *****************************/ + +/** @name Core Register Offsets +* @{ +*/ +#define XVTC_CTL_OFFSET 0x000 /**< Control Register Offset */ +#define XVTC_ISR_OFFSET 0x004 /**< Status/Interrupt Status Register + * Offset */ +#define XVTC_ERROR_OFFSET 0x008 /**< Error Register Offset */ +#define XVTC_IER_OFFSET 0x00C /**< Interrupt Enable Register + * Offset */ +#define XVTC_VER_OFFSET 0x010 /**< Version Register Offset */ + +#define XVTC_DASIZE_OFFSET 0x020 /**< Detector Active Size Offset */ +#define XVTC_DTSTAT_OFFSET 0x024 /**< Detector Timing Status Offset */ +#define XVTC_DFENC_OFFSET 0x028 /**< Detector Encoding Offset */ +#define XVTC_DPOL_OFFSET 0x02C /**< Detector Polarity Offset */ +#define XVTC_DHSIZE_OFFSET 0x030 /**< Detector Frame Horizontal Size + * Offset */ +#define XVTC_DVSIZE_OFFSET 0x034 /**< Detector Frame Vertical Size + * Offset */ +#define XVTC_DHSYNC_OFFSET 0x038 /**< Detector Horizontal sync + * Offset */ + +#define XVTC_DVBHOFF_OFFSET 0x03C /**< Detector Frame/F0 Vblank + * Horizontal Offset */ +#define XVTC_DVSYNC_OFFSET 0x040 /**< Detector Frame/F0 Vertical Sync + * Offset */ +#define XVTC_DVSHOFF_OFFSET 0x044 /**< Detector Frame/F0 Vsync Horizontal + * Offset */ + +#define XVTC_DVBHOFF_F1_OFFSET 0x048 /**< Detector Field 1 Vblank Horizontal + * Offset */ +#define XVTC_DVSYNC_F1_OFFSET 0x04C /**< Detector Field 1 Vertical Sync + * Offset */ +#define XVTC_DVSHOFF_F1_OFFSET 0x050 /**< Detector Field 1 Vsync Horizontal + * Offset */ + +#define XVTC_GASIZE_OFFSET 0x060 /**< Generator Active Size Offset */ +#define XVTC_GTSTAT_OFFSET 0x064 /**< Generator Timing Status Offset */ +#define XVTC_GFENC_OFFSET 0x068 /**< Generator Encoding Offset */ +#define XVTC_GPOL_OFFSET 0x06C /**< Generator Polarity Offset */ +#define XVTC_GHSIZE_OFFSET 0x070 /**< Generator Frame Horizontal Size + * Offset */ +#define XVTC_GVSIZE_OFFSET 0x074 /**< Generator Frame Vertical Size + * Offset */ +#define XVTC_GHSYNC_OFFSET 0x078 /**< Generator Horizontal Sync + * Offset */ + +#define XVTC_GVBHOFF_OFFSET 0x07C /**< Generator Frame/F0 Vblank + * Horizontal Offset */ +#define XVTC_GVSYNC_OFFSET 0x080 /**< Generator Frame/F0 Vertical + * Sync Offset */ +#define XVTC_GVSHOFF_OFFSET 0x084 /**< Generator Frame/F0 Vsync + * horizontal Offset */ + +#define XVTC_GVBHOFF_F1_OFFSET 0x088 /**< Generator Field 1 Vblank + * Horizontal Offset */ +#define XVTC_GVSYNC_F1_OFFSET 0x08C /**< Generator Field 1 Vertical + * Sync Offset */ +#define XVTC_GVSHOFF_F1_OFFSET 0x090 /**< Generator Field 1 Vsync horizontal + * Offset */ + +#define XVTC_FS00_OFFSET 0x100 /**< Frame Sync 00 Config + * Register Offset */ +#define XVTC_FS01_OFFSET 0x104 /**< Frame Sync 01 Config + * Register Offset */ +#define XVTC_FS02_OFFSET 0x108 /**< Frame Sync 02 Config + * Register Offset */ +#define XVTC_FS03_OFFSET 0x10C /**< Frame Sync 03 Config + * Register Offset */ +#define XVTC_FS04_OFFSET 0x110 /**< Frame Sync 04 Config + * Register Offset */ +#define XVTC_FS05_OFFSET 0x114 /**< Frame Sync 05 Config + * Register Offset */ +#define XVTC_FS06_OFFSET 0x118 /**< Frame Sync 06 Config + * Register Offset */ +#define XVTC_FS07_OFFSET 0x11C /**< Frame Sync 07 Config + * Register Offset */ +#define XVTC_FS08_OFFSET 0x120 /**< Frame Sync 08 Config + * Register Offset */ +#define XVTC_FS09_OFFSET 0x124 /**< Frame Sync 09 Config + * Register Offset */ +#define XVTC_FS10_OFFSET 0x128 /**< Frame Sync 10 Config + * Register Offset */ +#define XVTC_FS11_OFFSET 0x12C /**< Frame Sync 11 Config + * Register Offset */ +#define XVTC_FS12_OFFSET 0x130 /**< Frame Sync 12 Config + * Register Offset */ +#define XVTC_FS13_OFFSET 0x134 /**< Frame Sync 13 Config + * Register Offset */ +#define XVTC_FS14_OFFSET 0x138 /**< Frame Sync 14 Config + * Register Offset */ +#define XVTC_FS15_OFFSET 0x13C /**< Frame Sync 15 Config + * Register Offset */ + +#define XVTC_GGD_OFFSET 0x140 /**< Generator Global Delay + * Register Offset */ +/*@}*/ + +/** @name Control Register Bit Definitions +* @{ +*/ +#define XVTC_CTL_RESET_MASK 0x80000000 /**< Software Reset Mask */ +#define XVTC_CTL_SRST_MASK 0x40000000 /**< Frame Sync'ed Software + * Reset Mask */ +#define XVTC_CTL_FIPSS_MASK 0x04000000 /**< Field ID Output + * Polarity Source Mask */ +#define XVTC_CTL_ACPSS_MASK 0x02000000 /**< Active Chroma Output + * Polarity Source Mask */ +#define XVTC_CTL_AVPSS_MASK 0x01000000 /**< Active Video Output + * Polarity Source Mask */ +#define XVTC_CTL_HSPSS_MASK 0x00800000 /**< Horizontal Sync Output + * Polarity Source Mask */ +#define XVTC_CTL_VSPSS_MASK 0x00400000 /**< Vertical Sync Output + * Polarity Source Mask */ +#define XVTC_CTL_HBPSS_MASK 0x00200000 /**< Horizontal Blank Output + * Polarity Source Mask */ +#define XVTC_CTL_VBPSS_MASK 0x00100000 /**< Vertical Blank Output + * Polarity Source Mask */ + +#define XVTC_CTL_VCSS_MASK 0x00040000 /**< Generator Chroma Polarity + * and Encoding Source + * Select Mask */ +#define XVTC_CTL_VASS_MASK 0x00020000 /**< Generator Vertical Blank + * Offset Source Select + * Mask */ +#define XVTC_CTL_VBSS_MASK 0x00010000 /**< Generator Vertical Sync End + * (Back porch start) Source + * Select Mask */ +#define XVTC_CTL_VSSS_MASK 0x00008000 /**< Generator Vertical Sync + * Start Source Select Mask */ +#define XVTC_CTL_VFSS_MASK 0x00004000 /**< Generator Vertical Active Size + * Source Select Mask */ +#define XVTC_CTL_VTSS_MASK 0x00002000/**< Generator Vertical Total Source + * Select (Frame Size) Mask */ + +#define XVTC_CTL_HBSS_MASK 0x00000800 /**< Horizontal Back Porch Start + * Register Source Select + * (Sync End) Mask */ +#define XVTC_CTL_HSSS_MASK 0x00000400 /**< Horizontal Sync Start Register + * Source Select Mask */ +#define XVTC_CTL_HFSS_MASK 0x00000200 /**< Horizontal Front Porch Start + * Register Source Select + * (Active Size) Mask */ +#define XVTC_CTL_HTSS_MASK 0x00000100 /**< Horizontal Total Register + * Source Select (Frame Size) + * Mask */ + +#define XVTC_CTL_ALLSS_MASK 0x03F5EF00 /**< Bit mask for all source + * select Mask */ +//#define XVTC_CTL_LP_MASK 0x00000008 /**< Lock Polarity */ +#define XVTC_CTL_SE_MASK 0x00000020 /**< Enable Sync with Detector */ +#define XVTC_CTL_DE_MASK 0x00000008 /**< VTC Detector Enable */ +#define XVTC_CTL_GE_MASK 0x00000004 /**< VTC Generator Enable */ +#define XVTC_CTL_RU_MASK 0x00000002 /**< VTC Register Update */ +#define XVTC_CTL_SW_MASK 0x00000001 /**< VTC Core Enable */ +/*@}*/ + +/** @name Interrupt Status/Enable Register Bit Definitions +* @{ +*/ +#define XVTC_IXR_FSYNC15_MASK 0x80000000 /**< Frame Sync Interrupt 15 + * Mask */ +#define XVTC_IXR_FSYNC14_MASK 0x40000000 /**< Frame Sync Interrupt 14 + * Mask */ +#define XVTC_IXR_FSYNC13_MASK 0x20000000 /**< Frame Sync Interrupt 13 + * Mask */ +#define XVTC_IXR_FSYNC12_MASK 0x10000000 /**< Frame Sync Interrupt 12 + * Mask */ +#define XVTC_IXR_FSYNC11_MASK 0x08000000 /**< Frame Sync Interrupt 11 + * Mask */ +#define XVTC_IXR_FSYNC10_MASK 0x04000000 /**< Frame Sync Interrupt 10 + * Mask */ +#define XVTC_IXR_FSYNC09_MASK 0x02000000 /**< Frame Sync Interrupt 09 + * Mask */ +#define XVTC_IXR_FSYNC08_MASK 0x01000000 /**< Frame Sync Interrupt 08 + * Mask */ +#define XVTC_IXR_FSYNC07_MASK 0x00800000 /**< Frame Sync Interrupt 07 + * Mask */ +#define XVTC_IXR_FSYNC06_MASK 0x00400000 /**< Frame Sync Interrupt 06 + * Mask */ +#define XVTC_IXR_FSYNC05_MASK 0x00200000 /**< Frame Sync Interrupt 05 + * Mask */ +#define XVTC_IXR_FSYNC04_MASK 0x00100000 /**< Frame Sync Interrupt 04 + * Mask */ +#define XVTC_IXR_FSYNC03_MASK 0x00080000 /**< Frame Sync Interrupt 03 + * Mask */ +#define XVTC_IXR_FSYNC02_MASK 0x00040000 /**< Frame Sync Interrupt 02 + * Mask */ +#define XVTC_IXR_FSYNC01_MASK 0x00020000 /**< Frame Sync Interrupt 01 + * Mask */ +#define XVTC_IXR_FSYNC00_MASK 0x00010000 /**< Frame Sync Interrupt 00 + * Mask */ +#define XVTC_IXR_FSYNCALL_MASK 0xFFFF0000 /**< All Frame Sync Interrupt 0-15 + * Mask */ + +#define XVTC_IXR_G_AV_MASK 0x00002000 /**< Generator Active Video Intr + * Mask */ +#define XVTC_IXR_G_VBLANK_MASK 0x00001000 /**< Generator VBLANK Interrupt + * Mask */ +#define XVTC_IXR_G_ALL_MASK 0x00003000 /**< All Generator interrupts + * Mask */ + +#define XVTC_IXR_D_AV_MASK 0x00000800 /**< Detector Active Video + * Interrupt Mask */ +#define XVTC_IXR_D_VBLANK_MASK 0x00000400 /**< Detector VBLANK Interrupt + * Mask */ +#define XVTC_IXR_D_ALL_MASK 0x00000C00 /**< All Detector Interrupts + * Mask */ + +#define XVTC_IXR_LOL_MASK 0x00000200 /**< Lock Loss Mask */ +#define XVTC_IXR_LO_MASK 0x00000100 /**< Lock Mask */ +#define XVTC_IXR_LOCKALL_MASK 0x00000300 /**< All Signal Lock interrupt + * Mask */ + +#define XVTC_IXR_ALLINTR_MASK (XVTC_IXR_FSYNCALL_MASK |\ + XVTC_IXR_G_ALL_MASK |\ + XVTC_IXR_D_ALL_MASK |\ + XVTC_IXR_LOCKALL_MASK) /**< Mask for all + * interrupts Mask */ + +/** @name Error Register Bit Definitions +* @{ +*/ +#define XVTC_ERR_ACL_MASK 0x00200000 /**< Active Chroma Signal + * Lock Mask */ +#define XVTC_ERR_AVL_MASK 0x00100000 /**< Active Video Signal + * Lock Mask */ +#define XVTC_ERR_HSL_MASK 0x00080000 /**< Horizontal Sync Signal + * Lock Mask */ +#define XVTC_ERR_VSL_MASK 0x00040000 /**< Vertical Sync Signal + * Lock Mask */ +#define XVTC_ERR_HBL_MASK 0x00020000 /**< Horizontal Blank Signal + * Lock Mask */ +#define XVTC_ERR_VBL_MASK 0x00010000 /**< Vertical Blank Signal + * Lock Mask */ +/*@}*/ + +/** @name Version Register Bit Definition and Shifts +* @{ +*/ +#define XVTC_VER_MAJOR_MASK 0xFF000000 /**< Major Version Mask */ +#define XVTC_VER_MAJOR_SHIFT 24 /**< Major Version Bit Shift */ +#define XVTC_VER_MINOR_MASK 0x00FF0000 /**< Minor Version Mask */ +#define XVTC_VER_MINOR_SHIFT 16 /**< Minor Version Bit Shift */ +#define XVTC_VER_REV_MASK 0x0000FF00 /**< Revision Version Mask */ +#define XVTC_VER_REV_SHIFT 8 /**< Revision Version Bit + * Shift */ +#define XVTC_VER_IREV_MASK 0x000000FF /**< Internal Revision Version + * Mask */ +#define XVTC_VER_IREV_SHIFT 0 /**< Internal Revision Bit + * Shift */ +/*@}*/ + +/** @name Generator/Detector Active Video Size Register Bit Definitions and +* Shift +* @{ +*/ +#define XVTC_ASIZE_VERT_MASK 0x1FFF0000 /**< Total number of lines + * (including blanking) for + * frame or field 1 */ +#define XVTC_ASIZE_VERT_SHIFT 16 /**< Bit shift for End Cycle or + * Line Count */ +#define XVTC_ASIZE_HORI_MASK 0x00001FFF /**< Horizontal Active Frame + * Size.The width of the frame + * without blanking in number + * of pixels or clocks. */ +/*@}*/ + +/** @name Generator/Detector Status Bit Definitions +* @{ +*/ +#define XVTC_STAT_AVIDEO_MASK 0x00000004 /**< Active Video Interrupt + * Status.Mask */ +#define XVTC_STAT_VBLANK_MASK 0x00000002 /**< Vertical Blank Interrupt + * Status Mask */ +#define XVTC_STAT_LOCKED_MASK 0x00000001 /**< Lock Status. Set High when + * all signals have locked. + * (Detector only) Mask */ +/*@}*/ + +/** @name Generator/Detector Encoding Register Bit Definitions +* @{ +*/ +#define XVTC_ENC_GACPS_MASK 0x00000200 /**< Generator Active Chroma + * Pixel Skip/Parity Mask */ +#define XVTC_ENC_CPARITY_MASK 0x00000100 /**< Chroma Line Parity Mask */ +#define XVTC_ENC_CPARITY_SHIFT 8 /**< Bit shift for Active + * Chroma Line Parity */ +#define XVTC_ENC_FPARITY_MASK 0x00000080 /**< Field Parity Mask */ +#define XVTC_ENC_PROG_MASK 0x00000040 /**< Progressive/Interlaced + * Mask */ +#define XVTC_ENC_GACLS_MASK 0x00000001 /**< Generator Active Chroma + * Line Skip/parity Mask */ +/*@}*/ + +/** @name Generator/Detector Polarity Register Bit Definitions +* @{ +*/ +#define XVTC_POL_FIP_MASK 0x00000040 /**< Field ID Output + * Polarity Mask */ +#define XVTC_POL_ACP_MASK 0x00000020 /**< Active Chroma Output + * Polarity Mask */ +#define XVTC_POL_AVP_MASK 0x00000010 /**< Active Video Output + * Polarity Mask */ +#define XVTC_POL_HSP_MASK 0x00000008 /**< Horizontal Sync Output + * Polarity Mask */ +#define XVTC_POL_VSP_MASK 0x00000004 /**< Vertical Sync Output + * Polarity Mask */ +#define XVTC_POL_HBP_MASK 0x00000002 /**< Horizontal Blank Output + * Polarity Mask */ +#define XVTC_POL_VBP_MASK 0x00000001 /**< Vertical Blank Output + * Polarity Mask */ +#define XVTC_POL_ALLP_MASK 0x0000007F /**< Bit mask for all + * polarity bits Mask */ +/*@}*/ + +/** @name Generator/Detector Full Vertical Size Register Bit Definitions +* and Shift +* @{ +*/ +#define XVTC_VSIZE_F1_MASK 0x1FFF0000 /**< Total number of lines + * (including blanking) for + * frame or field 1 */ +#define XVTC_VSIZE_F1_SHIFT 16 /**< Bit shift for End Cycle or + * Line Count */ +#define XVTC_VSIZE_F0_MASK 0x00001FFF /**< Total number of lines + * (including blanking) for + * frame or field 0 */ +/*@}*/ + +/** @name Generator/Detector Sync/Blank Register Bit Definitions and Shift +* @{ +*/ +#define XVTC_SB_END_MASK 0x1FFF0000 /**< End cycle or line count + * of horizontal sync, vertical + * sync or vertical blank */ +#define XVTC_SB_END_SHIFT 16 /**< Bit shift for End Cycle or + * Line Count */ +#define XVTC_SB_START_MASK 0x00001FFF /**< Start cycle or line count + * of horizontal sync, vertical + * sync or vertical blank */ +/*@}*/ + +/** @name Generator/Detector VBlank/VSync Horizontal Bit Definitions and Shift +* @{ +*/ +#define XVTC_XVXHOX_HEND_MASK 0x1FFF0000 /**< Horizontal Offset End + * Mask */ +#define XVTC_XVXHOX_HEND_SHIFT 16 /**< Horizontal End Shift */ +#define XVTC_XVXHOX_HSTART_MASK 0x00001FFF /**< Horizontal Offset Start + * Offset */ +/*@}*/ + +/** @name Frame Sync 00 - 15 +* @{ +*/ +#define XVTC_FSXX_VSTART_MASK 0x1FFF0000 /**< Vertical line count during + * which current Frame Sync is + * active Mask */ +#define XVTC_FSXX_VSTART_SHIFT 16 /**< Bit shift for the vertical + * line count */ +#define XVTC_FSXX_HSTART_MASK 0x00001FFF /**< Horizontal cycle count + * during which current + * Frame Sync is active Mask */ +/*@}*/ + +/** @name VTC Generator Global Delay Bit Definition and Shift +* @{ +*/ +#define XVTC_GGD_VDELAY_MASK 0x1FFF0000 /**< Total lines per frame to + * delay generator output + * Mask */ +#define XVTC_GGD_VDELAY_SHIFT 16 /**< Bit shift for the total + * lines */ +#define XVTC_GGD_HDELAY_MASK 0x00001FFF /**< Total clock cycles per + * line to delay generator + * output Mask */ +/*@}*/ + +/** @name Compatibility Macros +* @{ +*/ +#define XVTC_CTL XVTC_CTL_OFFSET +#define XVTC_ISR XVTC_ISR_OFFSET +#define XVTC_ERROR XVTC_ERROR_OFFSET +#define XVTC_IER XVTC_IER_OFFSET +#define XVTC_VER XVTC_VER_OFFSET +#define XVTC_DASIZE XVTC_DASIZE_OFFSET +#define XVTC_DTSTAT XVTC_DTSTAT_OFFSET +#define XVTC_DFENC XVTC_DFENC_OFFSET +#define XVTC_DPOL XVTC_DPOL_OFFSET +#define XVTC_DHSIZE XVTC_DHSIZE_OFFSET +#define XVTC_DVSIZE XVTC_DVSIZE_OFFSET +#define XVTC_DHSYNC XVTC_DHSYNC_OFFSET +#define XVTC_DVBHOFF XVTC_DVBHOFF_OFFSET +#define XVTC_DVSYNC XVTC_DVSYNC_OFFSET +#define XVTC_DVSHOFF XVTC_DVSHOFF_OFFSET +#define XVTC_DVBHOFF_F1 XVTC_DVBHOFF_F1_OFFSET +#define XVTC_DVSYNC_F1 XVTC_DVSYNC_F1_OFFSET +#define XVTC_DVSHOFF_F1 XVTC_DVSHOFF_F1_OFFSET +#define XVTC_GASIZE XVTC_GASIZE_OFFSET +#define XVTC_GTSTAT XVTC_GTSTAT_OFFSET +#define XVTC_GFENC XVTC_GFENC_OFFSET +#define XVTC_GPOL XVTC_GPOL_OFFSET +#define XVTC_GHSIZE XVTC_GHSIZE_OFFSET +#define XVTC_GVSIZE XVTC_GVSIZE_OFFSET +#define XVTC_GHSYNC XVTC_GHSYNC_OFFSET +#define XVTC_GVBHOFF XVTC_GVBHOFF_OFFSET +#define XVTC_GVSYNC XVTC_GVSYNC_OFFSET +#define XVTC_GVSHOFF XVTC_GVSHOFF_OFFSET +#define XVTC_GVBHOFF_F1 XVTC_GVBHOFF_F1_OFFSET +#define XVTC_GVSYNC_F1 XVTC_GVSYNC_F1_OFFSET +#define XVTC_GVSHOFF_F1 XVTC_GVSHOFF_F1_OFFSET +#define XVTC_FS00 XVTC_FS00_OFFSET +#define XVTC_FS01 XVTC_FS01_OFFSET +#define XVTC_FS02 XVTC_FS02_OFFSET +#define XVTC_FS03 XVTC_FS03_OFFSET +#define XVTC_FS04 XVTC_FS04_OFFSET +#define XVTC_FS05 XVTC_FS05_OFFSET +#define XVTC_FS06 XVTC_FS06_OFFSET +#define XVTC_FS07 XVTC_FS07_OFFSET +#define XVTC_FS08 XVTC_FS08_OFFSET +#define XVTC_FS09 XVTC_FS09_OFFSET +#define XVTC_FS10 XVTC_FS10_OFFSET +#define XVTC_FS11 XVTC_FS11_OFFSET +#define XVTC_FS12 XVTC_FS12_OFFSET +#define XVTC_FS13 XVTC_FS13_OFFSET +#define XVTC_FS14 XVTC_FS14_OFFSET +#define XVTC_FS15 XVTC_FS15_OFFSET +#define XVTC_GGD XVTC_GGD_OFFSET +/*@}*/ + +/***************** Macros (Inline Functions) Definitions *********************/ + +/** @name Register Access Macro Definition +* @{ +*/ +#define XVtc_In32 Xil_In32 /**< Input Operations */ +#define XVtc_Out32 Xil_Out32 /**< Output Operations */ + +/*****************************************************************************/ +/** +* +* This function macro reads the given register. +* +* @param BaseAddress is the base address of the VTC core. +* @param RegOffset is the register offset of the register (defined at +* top of this file). +* +* @return The 32-bit value of the register. +* +* @note C-style signature: +* u32 XVtc_ReadReg(u32 BaseAddress, u32 RegOffset) +* +******************************************************************************/ +#define XVtc_ReadReg(BaseAddress, RegOffset) \ + XVtc_In32((BaseAddress) + ((u32)RegOffset)) + +/*****************************************************************************/ +/** +* +* Write the given register. +* +* @param BaseAddress is the base address of the VTC core. +* @param RegOffset is the register offset of the register (defined at +* top of this file) to be written. +* @param Data is the 32-bit value to write to the register. +* +* @return None. +* +* @note C-style signature: +* void XVtc_WriteReg(u32 BaseAddress, u32 RegOffset, u32 Data) +* +******************************************************************************/ +#define XVtc_WriteReg(BaseAddress, RegOffset, Data) \ + XVtc_Out32((BaseAddress) + ((u32)RegOffset), (u32)(Data)) +/*@}*/ + +/**************************** Type Definitions *******************************/ + + +/************************** Function Prototypes ******************************/ + + +/************************** Variable Declarations ****************************/ + + +#ifdef __cplusplus +} +#endif + +#endif /* end of protection macro */ diff --git a/XilinxProcessorIPLib/drivers/vtc/src/xvtc_intr.c b/XilinxProcessorIPLib/drivers/vtc/src/xvtc_intr.c new file mode 100644 index 00000000..563abb12 --- /dev/null +++ b/XilinxProcessorIPLib/drivers/vtc/src/xvtc_intr.c @@ -0,0 +1,295 @@ +/****************************************************************************** +* +* Copyright (C) 2008 - 2014 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +* (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in +* this Software without prior written authorization from Xilinx. +* +******************************************************************************/ +/*****************************************************************************/ +/** +* +* @file xvtc_intr.c +* +* This file contains interrupt related functions of Xilinx VTC core. +* Please see xvtc.h for more details of the core. +* +* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- ------ -------- -----------------------------------------------
+* 1.00a xd     08/05/08 First release
+* 1.01a xd     07/23/10 Added GIER. Added more h/w generic info into
+*                       xparameters.h. Feed callbacks with pending
+*                       interrupt info. Added Doxygen & Version support.
+* 3.00a cjm    08/01/12 Converted from xio.h to xil_io.h, translating
+*                       basic types, MB cache functions, exceptions and
+*                       assertions to xil_io format.
+*                       Replaced the following:
+*                       "XExc_Init" -> "Xil_ExceptionInit"
+*                       "XExc_RegisterHandler" -> "Xil_Exception
+*                                                 RegisterHandler"
+*                       "XEXC_ID_NON_CRITICAL_INT" -> "XIL_EXCEPTION_ID_INT"
+*                       "XExceptionHandler" -> "Xil_ExceptionHandler"
+*                       "XExc_mEnableExceptions" -> "Xil_ExceptionEnable"
+*                       "XEXC_NON_CRITICAL" -> "XIL_EXCEPTION_NON_CRITICAL"
+*                       "XExc_DisableExceptions" -> "Xil_ExceptionDisable"
+*                       "XExc_RemoveHandler" -> "Xil_ExceptionRemoveHandler"
+*                       "microblaze_enable_interrupts" -> "Xil_Exception
+*                                                         Enable"
+*                       "microblaze_disable_interrupts" -> "Xil_Exception
+*                                                           Disable"
+*                       "XCOMPONENT_IS_STARTED" -> "XIL_COMPONENT_IS_STARTED"
+*                       "XCOMPONENT_IS_READY" -> "XIL_COMPONENT_IS_READY"
+*                       "XASSERT_NONVOID" -> "Xil_AssertNonvoid"
+*                       "XASSERT_VOID_ALWAYS" -> "Xil_AssertVoidAlways"
+*                       "XASSERT_VOID" -> "Xil_AssertVoid"
+*                       "Xil_AssertVoid_ALWAYS" -> "Xil_AssertVoidAlways"
+*                       "XAssertStatus" -> "Xil_AssertStatus"
+*                       "XAssertSetCallback" -> "Xil_AssertCallback"
+*
+*                       "XASSERT_OCCURRED" -> "XIL_ASSERT_OCCURRED"
+*                       "XASSERT_NONE" -> "XIL_ASSERT_NONE"
+*
+*                       "microblaze_disable_dcache" -> "Xil_DCacheDisable"
+*                       "microblaze_enable_dcache" -> "Xil_DCacheEnable"
+*                       "microblaze_enable_icache" -> "Xil_ICacheEnable"
+*                       "microblaze_disable_icache" -> "Xil_ICacheDisable"
+*                       "microblaze_init_dcache_range" -> "Xil_DCache
+*                                                        InvalidateRange"
+*
+*                       "XCache_DisableDCache" -> "Xil_DCacheDisable"
+*                       "XCache_DisableICache" -> "Xil_ICacheDisable"
+*                       "XCache_EnableDCache" -> "Xil_DCacheEnableRegion"
+*                       "XCache_EnableICache" -> "Xil_ICacheEnableRegion"
+*                       "XCache_InvalidateDCacheLine" -> "Xil_DCache
+*                                                             InvalidateRange"
+*
+*                       "XUtil_MemoryTest32" -> "Xil_TestMem32"
+*                       "XUtil_MemoryTest16" -> "Xil_TestMem16"
+*                       "XUtil_MemoryTest8" -> "Xil_TestMem8"
+*
+*                       "xutil.h" -> "xil_testmem.h"
+*
+*                       "xbasic_types.h" -> "xil_types.h"
+*                       "xio.h" -> "xil_io.h"
+*
+*                       "XIo_In32" -> "Xil_In32"
+*                       "XIo_Out32" -> "Xil_Out32"
+*
+*                       "XTRUE" -> "TRUE"
+*                       "XFALSE" -> "FALSE"
+*                       "XNULL" -> "NULL"
+*
+*                       "Xuint8" -> "u8"
+*                       "Xuint16" -> "u16"
+*                       "Xuint32" -> "u32"
+*                       "Xint8" -> "char"
+*                       "Xint16" -> "short"
+*                       "Xint32" -> "long"
+*                       "Xfloat32" -> "float"
+*                       "Xfloat64" -> "double"
+*                       "Xboolean" -> "int"
+*                       "XTEST_FAILED" -> "XST_FAILURE"
+*                       "XTEST_PASSED" -> "XST_SUCCESS"
+* 6.1   adk    08/23/14 Alligned doxygen tags.
+*
+* +******************************************************************************/ + +/***************************** Include Files *********************************/ + +#include "xvtc.h" + +/************************** Constant Definitions *****************************/ + + +/***************** Macros (Inline Functions) Definitions *********************/ + + +/**************************** Type Definitions *******************************/ + + +/************************** Function Prototypes ******************************/ + + +/************************** Variable Definitions *****************************/ + + +/************************** Function Definitions *****************************/ + +/*****************************************************************************/ +/** +* +* This function is the interrupt handler for the VTC core. +* +* This handler reads the pending interrupt from the IER/ISR, determines the +* source of the interrupts, calls according callbacks and finally clears the +* interrupts. +* +* The application is responsible for connecting this function to the interrupt +* system. Application beyond this driver is also responsible for providing +* callbacks to handle interrupts and installing the callbacks using +* XVtc_SetCallBack() during initialization phase. +* +* @param InstancePtr is a pointer to the XVtc instance that just +* interrupted. +* +* @return None. +* +* @note None. +* +******************************************************************************/ +void XVtc_IntrHandler(void *InstancePtr) +{ + u32 PendingIntr; + u32 ErrorStatus; + XVtc *XVtcPtr = (XVtc *) InstancePtr; + + /* Verify arguments. */ + Xil_AssertVoid(XVtcPtr != NULL); + Xil_AssertVoid(XVtcPtr->IsReady == XIL_COMPONENT_IS_READY); + + /* Get pending interrupts */ + PendingIntr = XVtc_IntrGetPending(XVtcPtr); + + /* Clear pending interrupt(s) */ + XVtc_IntrClear(XVtcPtr, PendingIntr); + + /* Spurious interrupt has happened */ + if (0 == (PendingIntr | XVTC_IXR_ALLINTR_MASK)) { + ErrorStatus = 0; + XVtcPtr->ErrCallBack(XVtcPtr->ErrRef, ErrorStatus); + return; + } + + /* A generator event has happened */ + if ((PendingIntr & XVTC_IXR_G_ALL_MASK)) + XVtcPtr->GeneratorCallBack(XVtcPtr->GeneratorRef, + PendingIntr); + + /* A detector event has happened */ + if ((PendingIntr & XVTC_IXR_D_ALL_MASK)) + XVtcPtr->DetectorCallBack(XVtcPtr->DetectorRef, + PendingIntr); + + /* A frame sync is done */ + if ((PendingIntr & XVTC_IXR_FSYNCALL_MASK)) + XVtcPtr->FrameSyncCallBack(XVtcPtr->FrameSyncRef, + PendingIntr); + + /* A signal lock is detected */ + if ((PendingIntr & XVTC_IXR_LOCKALL_MASK)) + XVtcPtr->LockCallBack(XVtcPtr->LockRef, + PendingIntr); +} + + +/*****************************************************************************/ +/** +* +* This routine installs an asynchronous callback function for the given +* HandlerType: +* +* 
+* HandlerType              Callback Function Type
+* -----------------------  --------------------------------------------------
+* XVTC_HANDLER_FRAMESYNC   XVtc_FrameSyncCallBack
+* XVTC_HANDLER_LOCK        XVtc_LockCallBack
+* XVTC_HANDLER_DETECTOR    XVtc_DetectorCallBack
+* XVTC_HANDLER_GENERATOR   XVtc_GeneratorCallBack
+* XVTC_HANDLER_ERROR       XVtc_ErrCallBack
+*
+* HandlerType              Invoked by this driver when:
+* -----------------------  --------------------------------------------------
+* XVTC_HANDLER_FRAMESYNC   A frame sync event happens
+* XVTC_HANDLER_LOCK        A signal lock event happens
+* XVTC_HANDLER_DETECTOR    A detector related event happens
+* XVTC_HANDLER_GENERATOR   A generator related event happens
+* XVTC_HANDLER_ERROR       An error condition happens
+*
+* +* @param InstancePtr is a pointer to the XVtc instance to be worked +* on. +* @param HandlerType specifies which callback is to be attached. +* @param CallBackFunc is the address of the callback function. +* @param CallBackRef is a user data item that will be passed to the +* callback function when it is invoked. +* +* @return +* - XST_SUCCESS when handler is installed. +* - XST_INVALID_PARAM when HandlerType is invalid. +* +* @note Invoking this function for a handler that already has been +* installed replaces it with the new handler. +* +******************************************************************************/ +int XVtc_SetCallBack(XVtc *InstancePtr, u32 HandlerType, + void *CallBackFunc, void *CallBackRef) +{ + + /* Verify arguments. */ + Xil_AssertNonvoid(InstancePtr != NULL); + Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + + /* For specific handler type assigning callback function reference */ + switch (HandlerType) { + case XVTC_HANDLER_FRAMESYNC: + InstancePtr->FrameSyncCallBack = + (XVtc_CallBack) CallBackFunc; + InstancePtr->FrameSyncRef = CallBackRef; + break; + + case XVTC_HANDLER_LOCK: + InstancePtr->LockCallBack = (XVtc_CallBack) CallBackFunc; + InstancePtr->LockRef = CallBackRef; + break; + + case XVTC_HANDLER_DETECTOR: + InstancePtr->DetectorCallBack = + (XVtc_CallBack) CallBackFunc; + InstancePtr->DetectorRef = CallBackRef; + break; + + case XVTC_HANDLER_GENERATOR: + InstancePtr->GeneratorCallBack = + (XVtc_CallBack) CallBackFunc; + InstancePtr->GeneratorRef = CallBackRef; + break; + + case XVTC_HANDLER_ERROR: + InstancePtr->ErrCallBack = + (XVtc_ErrorCallBack) CallBackFunc; + InstancePtr->ErrRef = CallBackRef; + break; + + default: + return XST_INVALID_PARAM; + + } + return XST_SUCCESS; +} diff --git a/XilinxProcessorIPLib/drivers/vtc/src/xvtc_selftest.c b/XilinxProcessorIPLib/drivers/vtc/src/xvtc_selftest.c new file mode 100644 index 00000000..c21f5765 --- /dev/null +++ b/XilinxProcessorIPLib/drivers/vtc/src/xvtc_selftest.c @@ -0,0 +1,109 @@ +/****************************************************************************** +* +* Copyright (C) 2014 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +* (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in +* this Software without prior written authorization from Xilinx. +* +******************************************************************************/ +/*****************************************************************************/ +/** +* +* @file xvtc_selftest.c +* +* This file contains the self test function for the VTC core. +* The self test function reads the Version register. +* +* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- ------ -------- --------------------------------------------------
+* 6.1   adk    08/23/14 First Release.
+*                       Implemented following function:
+*                       XVtc_SelfTest.
+*
+* +******************************************************************************/ + +/***************************** Include Files *********************************/ + +#include "xvtc.h" + +/************************** Constant Definitions *****************************/ + + +/***************** Macros (Inline Functions) Definitions *********************/ + + +/**************************** Type Definitions *******************************/ + + +/************************** Function Prototypes ******************************/ + + +/************************** Variable Definitions *****************************/ + + +/************************** Function Definitions *****************************/ + +/*****************************************************************************/ +/** +* +* This function reads version register of the VTC core and compares with zero +* as part of self test. +* +* @param InstancePtr is a pointer to the XVtc instance. +* +* @return +* - XST_SUCCESS if the Version register read test was successful. +* - XST_FAILURE if the Version register read test failed. +* +* @note None. +* +******************************************************************************/ +int XVtc_SelfTest(XVtc *InstancePtr) +{ + u32 Version; + int Status; + + /* Verify argument. */ + Xil_AssertNonvoid(InstancePtr != NULL); + + /* Read VTC core version register. */ + Version = XVtc_ReadReg((InstancePtr)->Config.BaseAddress, + (XVTC_VER_OFFSET)); + + /* Compare version with zero */ + if(Version != (u32)0x0) { + Status = (u32)(XST_SUCCESS); + } + else { + Status = (u32)(XST_FAILURE); + } + + return Status; +} diff --git a/XilinxProcessorIPLib/drivers/vtc/src/xvtc_sinit.c b/XilinxProcessorIPLib/drivers/vtc/src/xvtc_sinit.c new file mode 100644 index 00000000..c36db728 --- /dev/null +++ b/XilinxProcessorIPLib/drivers/vtc/src/xvtc_sinit.c @@ -0,0 +1,115 @@ +/****************************************************************************** +* +* Copyright (C) 2008 - 2014 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +* (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in +* this Software without prior written authorization from Xilinx. +* +******************************************************************************/ +/*****************************************************************************/ +/** +* +* @file xvtc_sinit.c +* +* This file contains static initialization methods for Xilinx VTC core. +* +* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- ------ -------- --------------------------------------------------
+* 1.00a xd     08/05/08 First release.
+* 1.01a xd     07/23/10 Added GIER; Added more h/w generic info into
+*                       xparameters.h. Feed callbacks with pending
+*                       interrupt info. Added Doxygen & Version support.
+* 3.00a cjm    08/01/12 Converted from xio.h to xil_io.h, translating
+*                       basic types, MB cache functions, exceptions and
+*                       assertions to xil_io format.
+*                       Replaced the following:
+*                       "Xuint16" -> "u16".
+* 6.1   adk    08/23/14 updated doxygen tags.
+*
+* +******************************************************************************/ + +/***************************** Include Files *********************************/ + +#include "xvtc.h" +#include "xparameters.h" + +/************************** Constant Definitions *****************************/ + + +/***************** Macros (Inline Functions) Definitions *********************/ + + +/**************************** Type Definitions *******************************/ + + +/************************** Function Prototypes ******************************/ + + +/************************** Variable Definitions *****************************/ + + +/************************** Function Definitions *****************************/ + +/*****************************************************************************/ +/** +* +* This function returns a reference to an XVtc_Config structure based on the +* core id, DeviceId. The return value will refer to an entry in +* the device configuration table defined in the xvtc_g.c file. +* +* @param DeviceId is the unique core ID of the VTC core for the lookup +* operation. +* +* @return XVtc_LookupConfig returns a reference to a config record in +* the configuration table (in xvtc_g.c) corresponding to +* DeviceId, or NULL if no match is found. +* +* @note None. +* +******************************************************************************/ +XVtc_Config *XVtc_LookupConfig(u16 DeviceId) +{ + extern XVtc_Config XVtc_ConfigTable[]; + XVtc_Config *CfgPtr = NULL; + int i; + + /* Checking for device id for which instance it is matching */ + for (i = 0; i < XPAR_XVTC_NUM_INSTANCES; i++) { + /* Assigning address of config table if both device ids + * are matched + */ + if (XVtc_ConfigTable[i].DeviceId == DeviceId) { + CfgPtr = &XVtc_ConfigTable[i]; + break; + } + } + + return CfgPtr; +}