From 5f495caaabbe6aeba4a162074c9bef342ab12c51 Mon Sep 17 00:00:00 2001
From: Gilbert Magnaye <gmagnay@xilinx.com>
Date: Wed, 11 Nov 2015 19:19:55 -0800
Subject: [PATCH] vphy: Added API for resetting the MMCM.

Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Acked-by: Srikanth Vemula <svemula@xilinx.com>
---
 XilinxProcessorIPLib/drivers/vphy/src/xvphy.c | 58 ++++++++++++++++++-
 XilinxProcessorIPLib/drivers/vphy/src/xvphy.h |  2 +
 .../drivers/vphy/src/xvphy_hw.h               |  1 +
 3 files changed, 60 insertions(+), 1 deletion(-)

diff --git a/XilinxProcessorIPLib/drivers/vphy/src/xvphy.c b/XilinxProcessorIPLib/drivers/vphy/src/xvphy.c
index c7808837..08485b47 100644
--- a/XilinxProcessorIPLib/drivers/vphy/src/xvphy.c
+++ b/XilinxProcessorIPLib/drivers/vphy/src/xvphy.c
@@ -45,7 +45,8 @@
  *
  * Ver   Who  Date     Changes
  * ----- ---- -------- -----------------------------------------------
- * 1.0   als  10/19/15 Initial release.
+ * 1.0   als, 10/19/15 Initial release.
+ *       gm
  * </pre>
  *
 *******************************************************************************/
@@ -1422,6 +1423,12 @@ void XVphy_MmcmStart(XVphy *InstancePtr, u8 QuadId, XVphy_DirectionType Dir)
 	u32 Status;
 	u8 Retry;
 
+	if ((InstancePtr->Config.TxProtocol == XVPHY_PROTOCOL_HDMI) ||
+	    (InstancePtr->Config.RxProtocol == XVPHY_PROTOCOL_HDMI)) {
+		/* Enable MMCM Locked Masking */
+		XVphy_MmcmLockedMaskEnable(InstancePtr, QuadId, Dir, TRUE);
+	}
+
 	/* Enable MMCM. */
 	XVphy_MmcmPowerDown(InstancePtr, QuadId, Dir, FALSE);
 
@@ -1444,6 +1451,55 @@ void XVphy_MmcmStart(XVphy *InstancePtr, u8 QuadId, XVphy_DirectionType Dir)
 
 	/* Toggle MMCM reset. */
 	XVphy_MmcmReset(InstancePtr, QuadId, Dir, FALSE);
+
+	if ((InstancePtr->Config.TxProtocol == XVPHY_PROTOCOL_HDMI) ||
+	    (InstancePtr->Config.RxProtocol == XVPHY_PROTOCOL_HDMI)) {
+		/* Disable MMC Locked Masking */
+		XVphy_MmcmLockedMaskEnable(InstancePtr, QuadId, Dir, FALSE);
+	}
+}
+
+/*****************************************************************************/
+/**
+* This function will reset the mixed-mode clock manager (MMCM) core.
+*
+* @param	InstancePtr is a pointer to the XVphy core instance.
+* @param	QuadId is the GT quad ID to operate on.
+* @param	Dir is an indicator for TX or RX.
+* @param	Enable is an indicator whether to "Enable" the locked mask
+*		if set to 1. If set to 0: reset, then disable.
+*
+* @return	None.
+*
+* @note		None.
+*
+******************************************************************************/
+void XVphy_MmcmLockedMaskEnable(XVphy *InstancePtr, u8 QuadId,
+		XVphy_DirectionType Dir, u8 Enable)
+{
+	u32 RegOffsetCtrl;
+	u32 RegVal;
+
+	XVphy_SelQuad(InstancePtr, QuadId);
+
+	if (Dir == XVPHY_DIR_TX) {
+		RegOffsetCtrl = XVPHY_MMCM_TXUSRCLK_CTRL_REG;
+	}
+	else {
+		RegOffsetCtrl = XVPHY_MMCM_RXUSRCLK_CTRL_REG;
+	}
+
+	/* Assert reset. */
+	RegVal = XVphy_ReadReg(InstancePtr->Config.BaseAddr, RegOffsetCtrl);
+	RegVal |= XVPHY_MMCM_USRCLK_CTRL_LOCKED_MASK_MASK;
+	XVphy_WriteReg(InstancePtr->Config.BaseAddr, RegOffsetCtrl, RegVal);
+
+	if (!Enable) {
+		/* De-assert reset. */
+		RegVal &= ~XVPHY_MMCM_USRCLK_CTRL_LOCKED_MASK_MASK;
+		XVphy_WriteReg(InstancePtr->Config.BaseAddr, RegOffsetCtrl,
+									RegVal);
+	}
 }
 
 /*****************************************************************************/
diff --git a/XilinxProcessorIPLib/drivers/vphy/src/xvphy.h b/XilinxProcessorIPLib/drivers/vphy/src/xvphy.h
index 026b49ec..fe78b24e 100644
--- a/XilinxProcessorIPLib/drivers/vphy/src/xvphy.h
+++ b/XilinxProcessorIPLib/drivers/vphy/src/xvphy.h
@@ -707,6 +707,8 @@ void XVphy_MmcmReset(XVphy *InstancePtr, u8 QuadId, XVphy_DirectionType Dir,
 void XVphy_MmcmPowerDown(XVphy *InstancePtr, u8 QuadId, XVphy_DirectionType Dir,
 		u8 Hold);
 void XVphy_MmcmStart(XVphy *InstancePtr, u8 QuadId, XVphy_DirectionType Dir);
+void XVphy_MmcmLockedMaskEnable(XVphy *InstancePtr, u8 QuadId,
+		XVphy_DirectionType Dir, u8 Enable);
 void XVphy_BufgGtReset(XVphy *InstancePtr, XVphy_DirectionType Dir, u8 Reset);
 void XVphy_SetBufgGtDiv(XVphy *InstancePtr, XVphy_DirectionType Dir, u8 Div);
 void XVphy_IBufDsEnable(XVphy *InstancePtr, u8 QuadId, XVphy_DirectionType Dir,
diff --git a/XilinxProcessorIPLib/drivers/vphy/src/xvphy_hw.h b/XilinxProcessorIPLib/drivers/vphy/src/xvphy_hw.h
index dd2e2611..138686f6 100644
--- a/XilinxProcessorIPLib/drivers/vphy/src/xvphy_hw.h
+++ b/XilinxProcessorIPLib/drivers/vphy/src/xvphy_hw.h
@@ -457,6 +457,7 @@
 #define XVPHY_MMCM_USRCLK_CTRL_CFG_SUCCESS_MASK	0x10
 #define XVPHY_MMCM_USRCLK_CTRL_LOCKED_MASK	0x20
 #define XVPHY_MMCM_USRCLK_CTRL_PWRDWN_MASK	0x400
+#define XVPHY_MMCM_USRCLK_CTRL_LOCKED_MASK_MASK	0x800
 /* 0x124, 0x144: MMCM_TXUSRCLK_REG1, MMCM_RXUSRCLK_REG1 */
 #define XVPHY_MMCM_USRCLK_REG1_DIVCLK_MASK \
 					0x00000FF