diff --git a/XilinxProcessorIPLib/drivers/v_vcresampler/data/v_vcresampler.mdd b/XilinxProcessorIPLib/drivers/v_vcresampler/data/v_vcresampler.mdd index e2ea8818..ac88f504 100755 --- a/XilinxProcessorIPLib/drivers/v_vcresampler/data/v_vcresampler.mdd +++ b/XilinxProcessorIPLib/drivers/v_vcresampler/data/v_vcresampler.mdd @@ -1,9 +1,33 @@ -# ============================================================== -# File generated by Vivado(TM) HLS - High-Level Synthesis from C, C++ and SystemC -# Version: 2015.1 -# Copyright (C) 2015 Xilinx Inc. All rights reserved. +############################################################################## # -# ============================================================== +# Copyright (C) 2015 Xilinx, Inc. All rights reserved. +# +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"),to deal +# in the Software without restriction, including without limitation the rights +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +# copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# Use of the Software is limited solely to applications: +# (a) running on a Xilinx device, or +# (b) that interact with a Xilinx device through a bus or interconnect. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +# XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER +# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +# OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +# SOFTWARE. +# +# Except as contained in this notice, the name of the Xilinx shall not be used +# in advertising or otherwise to promote the sale, use or other dealings in +# this Software without prior written authorization from Xilinx. +############################################################################### OPTION psf_version = 2.1; diff --git a/XilinxProcessorIPLib/drivers/v_vcresampler/src/xv_vcresampler_coeff.c b/XilinxProcessorIPLib/drivers/v_vcresampler/src/xv_vcresampler_coeff.c new file mode 100644 index 00000000..1fd31f6b --- /dev/null +++ b/XilinxProcessorIPLib/drivers/v_vcresampler/src/xv_vcresampler_coeff.c @@ -0,0 +1,104 @@ +/****************************************************************************** + * + * Copyright (C) 2015 Xilinx, Inc. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * Use of the Software is limited solely to applications: + * (a) running on a Xilinx device, or + * (b) that interact with a Xilinx device through a bus or interconnect. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF + * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Except as contained in this notice, the name of the Xilinx shall not be used + * in advertising or otherwise to promote the sale, use or other dealings in + * this Software without prior written authorization from Xilinx. + * +******************************************************************************/ +/*****************************************************************************/ +/** +* +* @file xv_vcresampler_coeff.c +* @addtogroup v_vcresampler_v1_0 +* @{ +* @details +* +* This file provides the default fixed coefficient sets for supported taps +* +* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- ---- -------- -------------------------------------------------------
+* 1.00  rco   07/31/15   Initial Release
+
+*
+* +******************************************************************************/ +#include "xv_vcresampler_l2.h" + +// 4 tap filter +const short XV_vcrsmplrcoeff_taps4[XV_VCRSMPLR_NUM_CONVERSIONS][XV_VCRSMPLR_MAX_PHASES][XV_VCRSMPLR_TAPS_4] = +{ + //422->420 + {{ 0, 1024, 2048, 1024}, + { 0, 0, 0, 0} + }, + //420->422 + {{ 0, 4096, 0, 0}, + { 506, 1542, 1542, 506} + } +}; + +// 6 tap filter +const short XV_vcrsmplrcoeff_taps6[XV_VCRSMPLR_NUM_CONVERSIONS][XV_VCRSMPLR_MAX_PHASES][XV_VCRSMPLR_TAPS_6] = +{ + //422->420 + {{ 0, 0, 1298, 1500, 1298, 0}, + { 0, 0, 0, 0, 0, 0} + }, + //420->422 + {{ 0, 0, 4096, 0, 0, 0}, + {-327, 792, 1583, 1583, 792, -327} + } +}; + +// 8 tap filter +const short XV_vcrsmplrcoeff_taps8[XV_VCRSMPLR_NUM_CONVERSIONS][XV_VCRSMPLR_MAX_PHASES][XV_VCRSMPLR_TAPS_8] = +{ + //422->420 + {{ 0, -988, 0, 1703, 2666, 1703, 0, -988}, + { 0, 0, 0, 0, 0, 0, 0, 0} + }, + //420->422 + {{ 0, 0, 0, 4096, 0, 0, 0, 0}, + {-423, -903, 977, 2397, 2397, 977, -903, -423} + } +}; + +// 10 tap filter +const short XV_vcrsmplrcoeff_taps10[XV_VCRSMPLR_NUM_CONVERSIONS][XV_VCRSMPLR_MAX_PHASES][XV_VCRSMPLR_TAPS_10] = +{ + //422->420 + {{ 0, 0, -988, 0, 1703, 2666, 1703, 0, -988, 0}, + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} + }, + //420->422 + {{ 0, 0, 0, 0, 4096, 0, 0, 0, 0, 0}, + { 305, -638, -586, 705, 2262, 2262, 705, -586, -638, 305} + } +}; diff --git a/XilinxProcessorIPLib/drivers/v_vcresampler/src/xv_vcresampler_l2.c b/XilinxProcessorIPLib/drivers/v_vcresampler/src/xv_vcresampler_l2.c index d8271d67..e412eb63 100644 --- a/XilinxProcessorIPLib/drivers/v_vcresampler/src/xv_vcresampler_l2.c +++ b/XilinxProcessorIPLib/drivers/v_vcresampler/src/xv_vcresampler_l2.c @@ -61,9 +61,16 @@ /**************************** Type Definitions *******************************/ /**************************** Local Global *******************************/ +const short XV_vcrsmplrcoeff_taps4[XV_VCRSMPLR_NUM_CONVERSIONS][XV_VCRSMPLR_MAX_PHASES][XV_VCRSMPLR_TAPS_4]; +const short XV_vcrsmplrcoeff_taps6[XV_VCRSMPLR_NUM_CONVERSIONS][XV_VCRSMPLR_MAX_PHASES][XV_VCRSMPLR_TAPS_6]; +const short XV_vcrsmplrcoeff_taps8[XV_VCRSMPLR_NUM_CONVERSIONS][XV_VCRSMPLR_MAX_PHASES][XV_VCRSMPLR_TAPS_8]; +const short XV_vcrsmplrcoeff_taps10[XV_VCRSMPLR_NUM_CONVERSIONS][XV_VCRSMPLR_MAX_PHASES][XV_VCRSMPLR_TAPS_10]; + /************************** Function Prototypes ******************************/ -static void vcrUpdateCoefficients(XV_vcresampler *pVCrsmplr, u32 coeff[2][4]); +static void XV_vcresampler_SetCoefficients(XV_vcresampler *pVCrsmplr, + XV_vcresampler_l2 *pVcrsmplL2Data, + XV_VCRESAMPLER_CONVERSION convType); /*****************************************************************************/ /** @@ -98,6 +105,144 @@ void XV_VCrsmplStop(XV_vcresampler *InstancePtr) XV_vcresampler_DisableAutoRestart(InstancePtr); } +/*****************************************************************************/ +/** +* This function loads default filter coefficients in the chroma resampler +* coefficient storage based on the selected TAP configuration +* +* @param InstancePtr is a pointer to the core instance to be worked on. +* @param pVcrsmplL2Data is a pointer to the core instance layer 2 data. +* +* @return None +* +******************************************************************************/ +void XV_VCrsmplLoadDefaultCoeff(XV_vcresampler *InstancePtr, + XV_vcresampler_l2 *pVcrsmplL2Data) +{ + u16 numTaps; + const short *coeff; + + /* + * validates input arguments + */ + Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(pVcrsmplL2Data != NULL); + + numTaps = InstancePtr->Config.NumTaps; + + switch(numTaps) + { + case XV_VCRSMPLR_TAPS_4: + coeff = &XV_vcrsmplrcoeff_taps4[0][0][0]; + break; + + case XV_VCRSMPLR_TAPS_6: + coeff = &XV_vcrsmplrcoeff_taps6[0][0][0]; + break; + + case XV_VCRSMPLR_TAPS_8: + coeff = &XV_vcrsmplrcoeff_taps8[0][0][0]; + break; + + case XV_VCRSMPLR_TAPS_10: + coeff = &XV_vcrsmplrcoeff_taps10[0][0][0]; + break; + + default: + xil_printf("ERR: V Chroma Resampler %d Taps Not Supported",numTaps); + return; + } + + XV_VCrsmplrLoadUsrCoeff(InstancePtr, + pVcrsmplL2Data, + numTaps, + coeff); +} + +/*****************************************************************************/ +/** +* This function loads user defined filter coefficients in the horiz. chroma +* resampler coefficient storage +* +* @param InstancePtr is a pointer to the core instance to be worked on. +* @param pVcrsmplL2Data is a pointer to the core instance layer 2 data. +* @param num_taps is the number of taps +* @param Coeff is a pointer to user defined filter coefficients table +* +* @return None +* +******************************************************************************/ +void XV_VCrsmplrLoadUsrCoeff(XV_vcresampler *InstancePtr, + XV_vcresampler_l2 *pVcrsmplL2Data, + u16 num_taps, + const short *Coeff) +{ + int i,j, k, pad, offset; + int index, phase, tap, conversion; + + /* + * validate input arguments + */ + Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(pVcrsmplL2Data != NULL); + Xil_AssertVoid(num_taps <= InstancePtr->Config.NumTaps); + Xil_AssertVoid(Coeff != NULL); + + switch(num_taps) + { + case XV_VCRSMPLR_TAPS_4: + case XV_VCRSMPLR_TAPS_6: + case XV_VCRSMPLR_TAPS_8: + case XV_VCRSMPLR_TAPS_10: + break; + + default: + xil_printf("\r\nERR: V Chroma Resampler %d TAPS not supported. (Select from 4/6/8/10)\r\n"); + return; + } + + //determine if coefficient needs padding (effective vs. max taps) + pad = XV_VCRSMPLR_MAX_TAPS - InstancePtr->Config.NumTaps; + offset = ((pad) ? (pad>>1) : 0); + + index = 0; + //Load User defined coefficients into coefficient storage + for (conversion = 0; conversion < XV_VCRSMPLR_NUM_CONVERSIONS; ++conversion) + { + for (phase = 0; phase < XV_VCRSMPLR_MAX_PHASES; ++phase) + { + for (tap = 0; tap < num_taps; ++tap) + { + index = (conversion*XV_VCRSMPLR_MAX_PHASES*num_taps) + (phase*num_taps) + tap; + pVcrsmplL2Data->coeff[conversion][phase][tap+offset] = Coeff[index]; + } + } + } + + if(pad) //effective taps < max_taps + { + for (conversion = 0; conversion < XV_VCRSMPLR_NUM_CONVERSIONS; ++conversion) + { + for(phase = 0; phase < XV_VCRSMPLR_MAX_PHASES; ++phase) + { + //pad left + for (tap = 0; tap < offset; ++tap) + { + pVcrsmplL2Data->coeff[conversion][phase][tap] = 0; + } + //pad right + for (tap = (num_taps+offset); tap < XV_VCRSMPLR_MAX_TAPS; ++tap) + { + pVcrsmplL2Data->coeff[conversion][phase][tap] = 0; + } + } + } + } + + /* Enable use of external coefficients */ + pVcrsmplL2Data->UseExtCoeff = TRUE; +} + /*****************************************************************************/ /** * This function configures the Chroma resampler active resolution @@ -132,63 +277,34 @@ void XV_VCrsmplSetActiveSize(XV_vcresampler *InstancePtr, * ******************************************************************************/ void XV_VCrsmplSetFormat(XV_vcresampler *InstancePtr, + XV_vcresampler_l2 *pVcrsmplL2Data, XVidC_ColorFormat formatIn, XVidC_ColorFormat formatOut) { - u32 fmtIn, fmtOut; - u32 K[2][4] = {{0}}; + XV_VCRESAMPLER_CONVERSION convType; /* - * Assert validates the input arguments + * validate the input arguments */ Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(pVcrsmplL2Data != NULL); - /* Temp: Resampler IP YUV420 has 2 modes with distinct indexes. The difference is - * in how the data is packed into the AXIS stream. HDMI IP packing is different - * than standard AXIS definition. Ideally HDMI should convert and repack it in the - * standard format, but until update is available the sub-cores that work with - * YUV420 will have 2 modes to support - * - YUV420_AXIS = 3 - * - YUV420_HDMI = 4 - * - * Video Common driver has only YUV420_AXIS mode defined at index 3 - * VPRD beta release, is tightly coupled with HDMI IP, hence fow now the 420 mode - * is mapped to YUV420_HDMI (4) - */ - - fmtIn = ((formatIn == XVIDC_CSF_YCRCB_420) ? (XVIDC_CSF_YCRCB_420+1) : formatIn); - fmtOut = ((formatOut == XVIDC_CSF_YCRCB_420) ? (XVIDC_CSF_YCRCB_420+1) : formatOut); - - XV_vcresampler_Set_HwReg_input_video_format(InstancePtr, fmtIn); - XV_vcresampler_Set_HwReg_output_video_format(InstancePtr, fmtOut); + XV_vcresampler_Set_HwReg_input_video_format(InstancePtr, formatIn); + XV_vcresampler_Set_HwReg_output_video_format(InstancePtr, formatOut); if((formatIn == XVIDC_CSF_YCRCB_420) && (formatOut == XVIDC_CSF_YCRCB_422)) { - K[0][0] = 0; - K[0][1] = 4096; - K[0][2] = 0; - K[0][3] = 0; - K[1][0] = 506; - K[1][1] = 1542; - K[1][2] = 1542; - K[1][3] = 506; + convType = XV_VCRSMPLR_420_TO_422; } else if((formatIn == XVIDC_CSF_YCRCB_422) && - (formatOut == XVIDC_CSF_YCRCB_420)) + (formatOut == XVIDC_CSF_YCRCB_420)) { - K[0][0] = 0; - K[0][1] = 1024; - K[0][2] = 2048; - K[0][3] = 1024; - K[1][0] = 0; - K[1][1] = 0; - K[1][2] = 0; - K[1][3] = 0; + convType = XV_VCRSMPLR_422_TO_420; } - vcrUpdateCoefficients(InstancePtr, K); + XV_vcresampler_SetCoefficients(InstancePtr, pVcrsmplL2Data, convType); } /*****************************************************************************/ @@ -197,21 +313,36 @@ void XV_VCrsmplSetFormat(XV_vcresampler *InstancePtr, * required conversion * * @param pVCrsmplr is a pointer to the core instance to be worked on. -* @param coeff is the array holding computed coefficients +* @param pVcrsmplL2Data is a pointer to the core instance layer 2 data. +* @param convType is the format conversion requested * * @return None * ******************************************************************************/ -static void vcrUpdateCoefficients(XV_vcresampler *pVCrsmplr, u32 coeff[2][4]) +static void XV_vcresampler_SetCoefficients(XV_vcresampler *pVCrsmplr, + XV_vcresampler_l2 *pVcrsmplL2Data, + XV_VCRESAMPLER_CONVERSION convType) { - XV_vcresampler_Set_HwReg_coefs_0_0(pVCrsmplr, coeff[0][0]); - XV_vcresampler_Set_HwReg_coefs_0_1(pVCrsmplr, coeff[0][1]); - XV_vcresampler_Set_HwReg_coefs_0_2(pVCrsmplr, coeff[0][2]); - XV_vcresampler_Set_HwReg_coefs_0_3(pVCrsmplr, coeff[0][3]); - XV_vcresampler_Set_HwReg_coefs_1_0(pVCrsmplr, coeff[1][0]); - XV_vcresampler_Set_HwReg_coefs_1_1(pVCrsmplr, coeff[1][1]); - XV_vcresampler_Set_HwReg_coefs_1_2(pVCrsmplr, coeff[1][2]); - XV_vcresampler_Set_HwReg_coefs_1_3(pVCrsmplr, coeff[1][3]); + u16 pad, offset; + u32 baseaddr; + u16 tap, phase,regcount; + + //determine if coefficients are padded + pad = XV_VCRSMPLR_MAX_TAPS - pVCrsmplr->Config.NumTaps; + offset = ((pad) ? (pad>>1) : 0); + + regcount = 0; //number of registers being written + baseaddr = XV_VCRESAMPLER_CTRL_ADDR_HWREG_COEFS_0_0_DATA; + baseaddr += pVCrsmplr->Config.BaseAddress; + + for(phase = 0; phase < XV_VCRSMPLR_MAX_PHASES; ++phase) + { + for(tap = 0; tap < pVCrsmplr->Config.NumTaps; ++tap) + { + Xil_Out32((baseaddr+(regcount*8)), pVcrsmplL2Data->coeff[convType][phase][offset+tap]); + ++regcount; + } + } } /*****************************************************************************/ diff --git a/XilinxProcessorIPLib/drivers/v_vcresampler/src/xv_vcresampler_l2.h b/XilinxProcessorIPLib/drivers/v_vcresampler/src/xv_vcresampler_l2.h index f6314b82..a0c55990 100644 --- a/XilinxProcessorIPLib/drivers/v_vcresampler/src/xv_vcresampler_l2.h +++ b/XilinxProcessorIPLib/drivers/v_vcresampler/src/xv_vcresampler_l2.h @@ -106,18 +106,65 @@ extern "C" { #include "xv_vcresampler.h" /************************** Constant Definitions *****************************/ + /** @name Hw Configuration + * @{ + * The following constants define the vert. resampler HW MAX configuration + * + */ +#define XV_VCRSMPLR_MAX_TAPS (10) +#define XV_VCRSMPLR_MAX_PHASES (2) /**************************** Type Definitions *******************************/ + /** + * This typedef enumerates the supported taps + */ + typedef enum + { + XV_VCRSMPLR_TAPS_4 = 4, + XV_VCRSMPLR_TAPS_6 = 6, + XV_VCRSMPLR_TAPS_8 = 8, + XV_VCRSMPLR_TAPS_10 = 10, + XV_VCRSMPLR_NUM_SUPPORTED_TAPS_CONFIG = 4 + }XV_VCRESAMPLER_TAPS; + + /** + * This typedef enumerates the conversion type + */ + typedef enum + { + XV_VCRSMPLR_422_TO_420 = 0, + XV_VCRSMPLR_420_TO_422 , + XV_VCRSMPLR_NUM_CONVERSIONS + }XV_VCRESAMPLER_CONVERSION; + + /** + * V Chroma Resampler Layer 2 data. The user is required to allocate a + * variable of this type for every V chroma resampler device in the system. + * A pointer to a variable of this type is then passed to the driver API + * functions. + */ + typedef struct + { + u16 UseExtCoeff; + short coeff[XV_VCRSMPLR_NUM_CONVERSIONS][XV_VCRSMPLR_MAX_PHASES][XV_VCRSMPLR_MAX_TAPS]; + }XV_vcresampler_l2; /************************** Function Prototypes ******************************/ void XV_VCrsmplStart(XV_vcresampler *InstancePtr); void XV_VCrsmplStop(XV_vcresampler *InstancePtr); +void XV_VCrsmplLoadDefaultCoeff(XV_vcresampler *InstancePtr, + XV_vcresampler_l2 *pVcrsmplL2Data); +void XV_VCrsmplrLoadUsrCoeff(XV_vcresampler *InstancePtr, + XV_vcresampler_l2 *pVcrsmplL2Data, + u16 num_taps, + const short *Coeff); void XV_VCrsmplSetActiveSize(XV_vcresampler *InstancePtr, u32 width, u32 height); void XV_VCrsmplSetFormat(XV_vcresampler *InstancePtr, + XV_vcresampler_l2 *pVcrsmplL2Data, XVidC_ColorFormat formatIn, XVidC_ColorFormat formatOut);