diff --git a/XilinxProcessorIPLib/drivers/v_deinterlacer/data/v_deinterlacer.mdd b/XilinxProcessorIPLib/drivers/v_deinterlacer/data/v_deinterlacer.mdd
old mode 100644
new mode 100755
diff --git a/XilinxProcessorIPLib/drivers/v_deinterlacer/data/v_deinterlacer.tcl b/XilinxProcessorIPLib/drivers/v_deinterlacer/data/v_deinterlacer.tcl
old mode 100644
new mode 100755
index 63544d79..c2b5e4d5
--- a/XilinxProcessorIPLib/drivers/v_deinterlacer/data/v_deinterlacer.tcl
+++ b/XilinxProcessorIPLib/drivers/v_deinterlacer/data/v_deinterlacer.tcl
@@ -1,9 +1,33 @@
-# ==============================================================
-# File generated by Vivado(TM) HLS - High-Level Synthesis from C, C++ and SystemC
-# Version: 2015.1
-# Copyright (C) 2015 Xilinx Inc. All rights reserved.
+##############################################################################
 #
-# ==============================================================
+# Copyright (C) 2015 Xilinx, Inc. All rights reserved.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"),to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# Use of the Software is limited solely to applications:
+# (a) running on a Xilinx device, or
+# (b) that interact with a Xilinx device through a bus or interconnect.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+# XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+# OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+# SOFTWARE.
+#
+# Except as contained in this notice, the name of the Xilinx shall not be used
+# in advertising or otherwise to promote the sale, use or other dealings in
+# this Software without prior written authorization from Xilinx.
+###############################################################################
 
 proc generate {drv_handle} {
     xdefine_include_file $drv_handle "xparameters.h" "XV_deinterlacer" \
@@ -11,17 +35,20 @@ proc generate {drv_handle} {
         "DEVICE_ID" \
         "C_S_AXI_AXILITES_BASEADDR" \
         "C_S_AXI_AXILITES_HIGHADDR" \
-		"MAX_DATA_WIDTH"
+        "NUM_VIDEO_COMPONENTS" \
+        "MAX_DATA_WIDTH"
 
     xdefine_config_file $drv_handle "xv_deinterlacer_g.c" "XV_deinterlacer" \
         "DEVICE_ID" \
         "C_S_AXI_AXILITES_BASEADDR" \
-		"MAX_DATA_WIDTH"
+        "NUM_VIDEO_COMPONENTS" \
+        "MAX_DATA_WIDTH"
 
     xdefine_canonical_xpars $drv_handle "xparameters.h" "XV_deinterlacer" \
         "DEVICE_ID" \
         "C_S_AXI_AXILITES_BASEADDR" \
         "C_S_AXI_AXILITES_HIGHADDR" \
-		"MAX_DATA_WIDTH"
+        "NUM_VIDEO_COMPONENTS" \
+        "MAX_DATA_WIDTH"
 }
 
diff --git a/XilinxProcessorIPLib/drivers/v_deinterlacer/src/xv_deinterlacer.c b/XilinxProcessorIPLib/drivers/v_deinterlacer/src/xv_deinterlacer.c
index cf5fa96a..d0fdfe80 100644
--- a/XilinxProcessorIPLib/drivers/v_deinterlacer/src/xv_deinterlacer.c
+++ b/XilinxProcessorIPLib/drivers/v_deinterlacer/src/xv_deinterlacer.c
@@ -11,16 +11,21 @@
 
 /************************** Function Implementation *************************/
 #ifndef __linux__
-int XV_deinterlacer_CfgInitialize(XV_deinterlacer *InstancePtr, XV_deinterlacer_Config *ConfigPtr) {
+int XV_deinterlacer_CfgInitialize(XV_deinterlacer *InstancePtr,
+                                  XV_deinterlacer_Config *ConfigPtr,
+                                  u32 EffectiveAddr) {
     Xil_AssertNonvoid(InstancePtr != NULL);
     Xil_AssertNonvoid(ConfigPtr != NULL);
+    Xil_AssertNonvoid(EffectiveAddr != (u32)0x0);
 
-	/* Setup the instance */
-	(void)memset((void *)InstancePtr, 0, sizeof(XV_deinterlacer));
-	(void)memcpy((void *)&(InstancePtr->Config), (const void *)ConfigPtr,
-					sizeof(XV_deinterlacer_Config));
+    /* Setup the instance */
+    (void)memset((void *)InstancePtr, 0, sizeof(XV_deinterlacer));
+    (void)memcpy((void *)&(InstancePtr->Config), (const void *)ConfigPtr,
+                    sizeof(XV_deinterlacer_Config));
 
-    InstancePtr->Axilites_BaseAddress = ConfigPtr->Axilites_BaseAddress;
+    InstancePtr->Config.BaseAddress = EffectiveAddr;
+
+    /* Set the flag to indicate the driver is ready */
     InstancePtr->IsReady = XIL_COMPONENT_IS_READY;
 
     return XST_SUCCESS;
@@ -33,8 +38,8 @@ void XV_deinterlacer_Start(XV_deinterlacer *InstancePtr) {
     Xil_AssertVoid(InstancePtr != NULL);
     Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
 
-    Data = XV_deinterlacer_ReadReg(InstancePtr->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_AP_CTRL) & 0x80;
-    XV_deinterlacer_WriteReg(InstancePtr->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_AP_CTRL, Data | 0x01);
+    Data = XV_deinterlacer_ReadReg(InstancePtr->Config.BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_AP_CTRL) & 0x80;
+    XV_deinterlacer_WriteReg(InstancePtr->Config.BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_AP_CTRL, Data | 0x01);
 }
 
 u32 XV_deinterlacer_IsDone(XV_deinterlacer *InstancePtr) {
@@ -43,7 +48,7 @@ u32 XV_deinterlacer_IsDone(XV_deinterlacer *InstancePtr) {
     Xil_AssertNonvoid(InstancePtr != NULL);
     Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
 
-    Data = XV_deinterlacer_ReadReg(InstancePtr->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_AP_CTRL);
+    Data = XV_deinterlacer_ReadReg(InstancePtr->Config.BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_AP_CTRL);
     return (Data >> 1) & 0x1;
 }
 
@@ -53,7 +58,7 @@ u32 XV_deinterlacer_IsIdle(XV_deinterlacer *InstancePtr) {
     Xil_AssertNonvoid(InstancePtr != NULL);
     Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
 
-    Data = XV_deinterlacer_ReadReg(InstancePtr->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_AP_CTRL);
+    Data = XV_deinterlacer_ReadReg(InstancePtr->Config.BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_AP_CTRL);
     return (Data >> 2) & 0x1;
 }
 
@@ -63,7 +68,7 @@ u32 XV_deinterlacer_IsReady(XV_deinterlacer *InstancePtr) {
     Xil_AssertNonvoid(InstancePtr != NULL);
     Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
 
-    Data = XV_deinterlacer_ReadReg(InstancePtr->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_AP_CTRL);
+    Data = XV_deinterlacer_ReadReg(InstancePtr->Config.BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_AP_CTRL);
     // check ap_start to see if the pcore is ready for next input
     return !(Data & 0x1);
 }
@@ -72,21 +77,21 @@ void XV_deinterlacer_EnableAutoRestart(XV_deinterlacer *InstancePtr) {
     Xil_AssertVoid(InstancePtr != NULL);
     Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
 
-    XV_deinterlacer_WriteReg(InstancePtr->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_AP_CTRL, 0x80);
+    XV_deinterlacer_WriteReg(InstancePtr->Config.BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_AP_CTRL, 0x80);
 }
 
 void XV_deinterlacer_DisableAutoRestart(XV_deinterlacer *InstancePtr) {
     Xil_AssertVoid(InstancePtr != NULL);
     Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
 
-    XV_deinterlacer_WriteReg(InstancePtr->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_AP_CTRL, 0);
+    XV_deinterlacer_WriteReg(InstancePtr->Config.BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_AP_CTRL, 0);
 }
 
 void XV_deinterlacer_Set_read_fb(XV_deinterlacer *InstancePtr, u32 Data) {
     Xil_AssertVoid(InstancePtr != NULL);
     Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
 
-    XV_deinterlacer_WriteReg(InstancePtr->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_READ_FB_DATA, Data);
+    XV_deinterlacer_WriteReg(InstancePtr->Config.BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_READ_FB_DATA, Data);
 }
 
 u32 XV_deinterlacer_Get_read_fb(XV_deinterlacer *InstancePtr) {
@@ -95,7 +100,7 @@ u32 XV_deinterlacer_Get_read_fb(XV_deinterlacer *InstancePtr) {
     Xil_AssertNonvoid(InstancePtr != NULL);
     Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
 
-    Data = XV_deinterlacer_ReadReg(InstancePtr->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_READ_FB_DATA);
+    Data = XV_deinterlacer_ReadReg(InstancePtr->Config.BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_READ_FB_DATA);
     return Data;
 }
 
@@ -103,7 +108,7 @@ void XV_deinterlacer_Set_write_fb(XV_deinterlacer *InstancePtr, u32 Data) {
     Xil_AssertVoid(InstancePtr != NULL);
     Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
 
-    XV_deinterlacer_WriteReg(InstancePtr->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_WRITE_FB_DATA, Data);
+    XV_deinterlacer_WriteReg(InstancePtr->Config.BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_WRITE_FB_DATA, Data);
 }
 
 u32 XV_deinterlacer_Get_write_fb(XV_deinterlacer *InstancePtr) {
@@ -112,7 +117,7 @@ u32 XV_deinterlacer_Get_write_fb(XV_deinterlacer *InstancePtr) {
     Xil_AssertNonvoid(InstancePtr != NULL);
     Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
 
-    Data = XV_deinterlacer_ReadReg(InstancePtr->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_WRITE_FB_DATA);
+    Data = XV_deinterlacer_ReadReg(InstancePtr->Config.BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_WRITE_FB_DATA);
     return Data;
 }
 
@@ -120,7 +125,7 @@ void XV_deinterlacer_Set_colorFormat(XV_deinterlacer *InstancePtr, u32 Data) {
     Xil_AssertVoid(InstancePtr != NULL);
     Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
 
-    XV_deinterlacer_WriteReg(InstancePtr->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_COLORFORMAT_DATA, Data);
+    XV_deinterlacer_WriteReg(InstancePtr->Config.BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_COLORFORMAT_DATA, Data);
 }
 
 u32 XV_deinterlacer_Get_colorFormat(XV_deinterlacer *InstancePtr) {
@@ -129,7 +134,7 @@ u32 XV_deinterlacer_Get_colorFormat(XV_deinterlacer *InstancePtr) {
     Xil_AssertNonvoid(InstancePtr != NULL);
     Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
 
-    Data = XV_deinterlacer_ReadReg(InstancePtr->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_COLORFORMAT_DATA);
+    Data = XV_deinterlacer_ReadReg(InstancePtr->Config.BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_COLORFORMAT_DATA);
     return Data;
 }
 
@@ -137,7 +142,7 @@ void XV_deinterlacer_Set_algo(XV_deinterlacer *InstancePtr, u32 Data) {
     Xil_AssertVoid(InstancePtr != NULL);
     Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
 
-    XV_deinterlacer_WriteReg(InstancePtr->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_ALGO_DATA, Data);
+    XV_deinterlacer_WriteReg(InstancePtr->Config.BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_ALGO_DATA, Data);
 }
 
 u32 XV_deinterlacer_Get_algo(XV_deinterlacer *InstancePtr) {
@@ -146,7 +151,7 @@ u32 XV_deinterlacer_Get_algo(XV_deinterlacer *InstancePtr) {
     Xil_AssertNonvoid(InstancePtr != NULL);
     Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
 
-    Data = XV_deinterlacer_ReadReg(InstancePtr->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_ALGO_DATA);
+    Data = XV_deinterlacer_ReadReg(InstancePtr->Config.BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_ALGO_DATA);
     return Data;
 }
 
@@ -154,14 +159,14 @@ void XV_deinterlacer_InterruptGlobalEnable(XV_deinterlacer *InstancePtr) {
     Xil_AssertVoid(InstancePtr != NULL);
     Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
 
-    XV_deinterlacer_WriteReg(InstancePtr->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_GIE, 1);
+    XV_deinterlacer_WriteReg(InstancePtr->Config.BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_GIE, 1);
 }
 
 void XV_deinterlacer_InterruptGlobalDisable(XV_deinterlacer *InstancePtr) {
     Xil_AssertVoid(InstancePtr != NULL);
     Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
 
-    XV_deinterlacer_WriteReg(InstancePtr->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_GIE, 0);
+    XV_deinterlacer_WriteReg(InstancePtr->Config.BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_GIE, 0);
 }
 
 void XV_deinterlacer_InterruptEnable(XV_deinterlacer *InstancePtr, u32 Mask) {
@@ -170,8 +175,8 @@ void XV_deinterlacer_InterruptEnable(XV_deinterlacer *InstancePtr, u32 Mask) {
     Xil_AssertVoid(InstancePtr != NULL);
     Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
 
-    Register =  XV_deinterlacer_ReadReg(InstancePtr->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_IER);
-    XV_deinterlacer_WriteReg(InstancePtr->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_IER, Register | Mask);
+    Register =  XV_deinterlacer_ReadReg(InstancePtr->Config.BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_IER);
+    XV_deinterlacer_WriteReg(InstancePtr->Config.BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_IER, Register | Mask);
 }
 
 void XV_deinterlacer_InterruptDisable(XV_deinterlacer *InstancePtr, u32 Mask) {
@@ -180,27 +185,27 @@ void XV_deinterlacer_InterruptDisable(XV_deinterlacer *InstancePtr, u32 Mask) {
     Xil_AssertVoid(InstancePtr != NULL);
     Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
 
-    Register =  XV_deinterlacer_ReadReg(InstancePtr->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_IER);
-    XV_deinterlacer_WriteReg(InstancePtr->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_IER, Register & (~Mask));
+    Register =  XV_deinterlacer_ReadReg(InstancePtr->Config.BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_IER);
+    XV_deinterlacer_WriteReg(InstancePtr->Config.BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_IER, Register & (~Mask));
 }
 
 void XV_deinterlacer_InterruptClear(XV_deinterlacer *InstancePtr, u32 Mask) {
     Xil_AssertVoid(InstancePtr != NULL);
     Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
 
-    XV_deinterlacer_WriteReg(InstancePtr->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_ISR, Mask);
+    XV_deinterlacer_WriteReg(InstancePtr->Config.BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_ISR, Mask);
 }
 
 u32 XV_deinterlacer_InterruptGetEnabled(XV_deinterlacer *InstancePtr) {
     Xil_AssertNonvoid(InstancePtr != NULL);
     Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
 
-    return XV_deinterlacer_ReadReg(InstancePtr->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_IER);
+    return XV_deinterlacer_ReadReg(InstancePtr->Config.BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_IER);
 }
 
 u32 XV_deinterlacer_InterruptGetStatus(XV_deinterlacer *InstancePtr) {
     Xil_AssertNonvoid(InstancePtr != NULL);
     Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
 
-    return XV_deinterlacer_ReadReg(InstancePtr->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_ISR);
+    return XV_deinterlacer_ReadReg(InstancePtr->Config.BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_ISR);
 }
diff --git a/XilinxProcessorIPLib/drivers/v_deinterlacer/src/xv_deinterlacer.h b/XilinxProcessorIPLib/drivers/v_deinterlacer/src/xv_deinterlacer.h
index 3dfd7ee8..85ddc6ea 100644
--- a/XilinxProcessorIPLib/drivers/v_deinterlacer/src/xv_deinterlacer.h
+++ b/XilinxProcessorIPLib/drivers/v_deinterlacer/src/xv_deinterlacer.h
@@ -45,8 +45,9 @@ typedef uint32_t u32;
 */
 typedef struct {
     u16 DeviceId;              /**< Unique ID  of device */
-    u32 Axilites_BaseAddress;  /**< The base address of the core instance. */
-    int MaxDataWidth;          /**< Maximum Data width of each channel */
+    u32 BaseAddress;           /**< The base address of the core instance. */
+    u16 NumVidComponents;      /**< Number of Video Components */
+    u16 MaxDataWidth;          /**< Maximum Data width of each channel */
 } XV_deinterlacer_Config;
 #endif
 
@@ -55,7 +56,6 @@ typedef struct {
 */
 typedef struct {
     XV_deinterlacer_Config Config; /**< Hardware Configuration */
-    u32 Axilites_BaseAddress;      /**< The base address of the core instance. */
     u32 IsReady;                   /**< Device is initialized and ready */
 } XV_deinterlacer;
 
@@ -84,7 +84,9 @@ typedef struct {
 #ifndef __linux__
 int XV_deinterlacer_Initialize(XV_deinterlacer *InstancePtr, u16 DeviceId);
 XV_deinterlacer_Config* XV_deinterlacer_LookupConfig(u16 DeviceId);
-int XV_deinterlacer_CfgInitialize(XV_deinterlacer *InstancePtr, XV_deinterlacer_Config *ConfigPtr);
+int XV_deinterlacer_CfgInitialize(XV_deinterlacer *InstancePtr,
+                                  XV_deinterlacer_Config *ConfigPtr,
+                                  u32 EffectiveAddr);
 #else
 int XV_deinterlacer_Initialize(XV_deinterlacer *InstancePtr, const char* InstanceName);
 int XV_deinterlacer_Release(XV_deinterlacer *InstancePtr);
diff --git a/XilinxProcessorIPLib/drivers/v_deinterlacer/src/xv_deinterlacer_g.c b/XilinxProcessorIPLib/drivers/v_deinterlacer/src/xv_deinterlacer_g.c
new file mode 100644
index 00000000..bb0ee011
--- /dev/null
+++ b/XilinxProcessorIPLib/drivers/v_deinterlacer/src/xv_deinterlacer_g.c
@@ -0,0 +1,57 @@
+
+/*******************************************************************
+*
+* CAUTION: This file is automatically generated by HSI.
+* Version:
+* DO NOT EDIT.
+*
+* Copyright (C) 2010-2015 Xilinx, Inc. All Rights Reserved.*
+*Permission is hereby granted, free of charge, to any person obtaining a copy
+*of this software and associated documentation files (the Software), to deal
+*in the Software without restriction, including without limitation the rights
+*to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+*copies of the Software, and to permit persons to whom the Software is
+*furnished to do so, subject to the following conditions:
+*
+*The above copyright notice and this permission notice shall be included in
+*all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+*(a) running on a Xilinx device, or
+*(b) that interact with a Xilinx device through a bus or interconnect.
+*
+*THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+*IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+*FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+*XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+*WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
+*OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*
+*Except as contained in this notice, the name of the Xilinx shall not be used
+*in advertising or otherwise to promote the sale, use or other dealings in
+*this Software without prior written authorization from Xilinx.
+*
+
+*
+* Description: Driver configuration
+*
+*******************************************************************/
+
+#include "xparameters.h"
+#include "xv_deinterlacer.h"
+
+/*
+* The configuration table for devices
+*/
+
+XV_deinterlacer_Config XV_deinterlacer_ConfigTable[] =
+{
+	{
+#ifdef XPAR_XV_DEINTERLACER_NUM_INSTANCES
+		XPAR_V_PROC_SS_0_V_DEINTERLACER_DEVICE_ID,
+		XPAR_V_PROC_SS_0_V_DEINTERLACER_S_AXI_AXILITES_BASEADDR,
+		XPAR_V_PROC_SS_0_V_DEINTERLACER_NUM_VIDEO_COMPONENTS,
+		XPAR_V_PROC_SS_0_V_DEINTERLACER_MAX_DATA_WIDTH
+#endif
+	}
+};
diff --git a/XilinxProcessorIPLib/drivers/v_deinterlacer/src/xv_deinterlacer_l2.c b/XilinxProcessorIPLib/drivers/v_deinterlacer/src/xv_deinterlacer_l2.c
index f39c61c3..30f82c01 100644
--- a/XilinxProcessorIPLib/drivers/v_deinterlacer/src/xv_deinterlacer_l2.c
+++ b/XilinxProcessorIPLib/drivers/v_deinterlacer/src/xv_deinterlacer_l2.c
@@ -35,6 +35,7 @@
 * @file xv_deinterlacer_l2.c
 * @addtogroup v_deinterlacer_v5_0
 * @{
+* @details
 *
 * The deint Layer-2 Driver. The functions in this file provides an abstraction
 * from the register peek/poke methodology by implementing most common use-case
@@ -46,7 +47,7 @@
 *
 * Ver   Who    Date     Changes
 * ----- ---- -------- -------------------------------------------------------
-* 1.00  rc   05/01/15   Initial Release
+* 1.00  rco   07/21/15   Initial Release
 
 * </pre>
 *
@@ -109,8 +110,8 @@ void XV_DeintStop(XV_deinterlacer *InstancePtr)
 *
 ******************************************************************************/
 void XV_DeintSetFieldBuffers(XV_deinterlacer   *InstancePtr,
-							  u32               memAddr,
-							  XVidC_ColorFormat cformat)
+                              u32               memAddr,
+                              XVidC_ColorFormat cformat)
 {
   Xil_AssertVoid(InstancePtr != NULL);
 
@@ -145,7 +146,7 @@ void XV_DeintDbgReportStatus(XV_deinterlacer *InstancePtr)
   done  = XV_deinterlacer_IsDone(pDeint);
   idle  = XV_deinterlacer_IsIdle(pDeint);
   ready = XV_deinterlacer_IsReady(pDeint);
-  ctrl  = XV_deinterlacer_ReadReg(pDeint->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_AP_CTRL);
+  ctrl  = XV_deinterlacer_ReadReg(pDeint->Config.BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_AP_CTRL);
 
   rfb  = XV_deinterlacer_Get_read_fb(pDeint);
   wfb  = XV_deinterlacer_Get_write_fb(pDeint);
diff --git a/XilinxProcessorIPLib/drivers/v_deinterlacer/src/xv_deinterlacer_l2.h b/XilinxProcessorIPLib/drivers/v_deinterlacer/src/xv_deinterlacer_l2.h
index 36aa30c1..e3fe111b 100644
--- a/XilinxProcessorIPLib/drivers/v_deinterlacer/src/xv_deinterlacer_l2.h
+++ b/XilinxProcessorIPLib/drivers/v_deinterlacer/src/xv_deinterlacer_l2.h
@@ -35,6 +35,7 @@
 * @file xv_deinterlacer_l2.h
 * @addtogroup v_deinterlacer_v5_0
 * @{
+* @details
 *
 * This header file contains layer 2 API's of the deint sub-core driver.
 * The functions contained herein provides a high level implementation of features
@@ -85,7 +86,7 @@
 *
 * Ver   Who    Date     Changes
 * ----- ---- -------- -------------------------------------------------------
-* 1.00  rc   05/01/15   Initial Release
+* 1.00  rco   07/21/15   Initial Release
 
 * </pre>
 *
@@ -114,5 +115,5 @@ void XV_DeintSetFieldBuffers(XV_deinterlacer   *InstancePtr,
 void XV_DeintDbgReportStatus(XV_deinterlacer *InstancePtr);
 
 
-#endif /* XSS_DEINT_H_ */
+#endif
 /** @} */
diff --git a/XilinxProcessorIPLib/drivers/v_deinterlacer/src/xv_deinterlacer_linux.c b/XilinxProcessorIPLib/drivers/v_deinterlacer/src/xv_deinterlacer_linux.c
index a4d3cca0..38974653 100644
--- a/XilinxProcessorIPLib/drivers/v_deinterlacer/src/xv_deinterlacer_linux.c
+++ b/XilinxProcessorIPLib/drivers/v_deinterlacer/src/xv_deinterlacer_linux.c
@@ -87,8 +87,8 @@ static int uio_info_read_map_size(XV_deinterlacer_uio_info* info, int n) {
 }
 
 int XV_deinterlacer_Initialize(XV_deinterlacer *InstancePtr, const char* InstanceName) {
-	XV_deinterlacer_uio_info *InfoPtr = &uio_info;
-	struct dirent **namelist;
+    XV_deinterlacer_uio_info *InfoPtr = &uio_info;
+    struct dirent **namelist;
     int i, n;
     char* s;
     char file[ MAX_UIO_PATH_SIZE ];
@@ -100,9 +100,9 @@ int XV_deinterlacer_Initialize(XV_deinterlacer *InstancePtr, const char* Instanc
     n = scandir("/sys/class/uio", &namelist, 0, alphasort);
     if (n < 0)  return XST_DEVICE_NOT_FOUND;
     for (i = 0;  i < n; i++) {
-	strcpy(file, "/sys/class/uio/");
-	strcat(file, namelist[i]->d_name);
-	strcat(file, "/name");
+    strcpy(file, "/sys/class/uio/");
+    strcat(file, namelist[i]->d_name);
+    strcat(file, "/name");
         if ((line_from_file(file, name) == 0) && (strcmp(name, InstanceName) == 0)) {
             flag = 1;
             s = namelist[i]->d_name;
@@ -126,8 +126,8 @@ int XV_deinterlacer_Initialize(XV_deinterlacer *InstancePtr, const char* Instanc
     }
 
     // NOTE: slave interface 'Axilites' should be mapped to uioX/map0
-    InstancePtr->Axilites_BaseAddress = (u32)mmap(NULL, InfoPtr->maps[0].size, PROT_READ|PROT_WRITE, MAP_SHARED, InfoPtr->uio_fd, 0 * getpagesize());
-    assert(InstancePtr->Axilites_BaseAddress);
+    InstancePtr->Config.BaseAddress = (u32)mmap(NULL, InfoPtr->maps[0].size, PROT_READ|PROT_WRITE, MAP_SHARED, InfoPtr->uio_fd, 0 * getpagesize());
+    assert(InstancePtr->Config.BaseAddress);
 
     InstancePtr->IsReady = XIL_COMPONENT_IS_READY;
 
@@ -135,12 +135,12 @@ int XV_deinterlacer_Initialize(XV_deinterlacer *InstancePtr, const char* Instanc
 }
 
 int XV_deinterlacer_Release(XV_deinterlacer *InstancePtr) {
-	XV_deinterlacer_uio_info *InfoPtr = &uio_info;
+    XV_deinterlacer_uio_info *InfoPtr = &uio_info;
 
     assert(InstancePtr != NULL);
     assert(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
 
-    munmap((void*)InstancePtr->Axilites_BaseAddress, InfoPtr->maps[0].size);
+    munmap((void*)InstancePtr->Config.BaseAddress, InfoPtr->maps[0].size);
 
     close(InfoPtr->uio_fd);
 
diff --git a/XilinxProcessorIPLib/drivers/v_deinterlacer/src/xv_deinterlacer_sinit.c b/XilinxProcessorIPLib/drivers/v_deinterlacer/src/xv_deinterlacer_sinit.c
index b32f2891..71e812b1 100644
--- a/XilinxProcessorIPLib/drivers/v_deinterlacer/src/xv_deinterlacer_sinit.c
+++ b/XilinxProcessorIPLib/drivers/v_deinterlacer/src/xv_deinterlacer_sinit.c
@@ -11,35 +11,41 @@
 #include "xparameters.h"
 #include "xv_deinterlacer.h"
 
+#ifndef XPAR_XV_DEINTERLACER_NUM_INSTANCES
+#define XPAR_XV_DEINTERLACER_NUM_INSTANCES  0
+#endif
+
 extern XV_deinterlacer_Config XV_deinterlacer_ConfigTable[];
 
 XV_deinterlacer_Config *XV_deinterlacer_LookupConfig(u16 DeviceId) {
-	XV_deinterlacer_Config *ConfigPtr = NULL;
+    XV_deinterlacer_Config *ConfigPtr = NULL;
 
-	int Index;
+    int Index;
 
-	for (Index = 0; Index < XPAR_XV_DEINTERLACER_NUM_INSTANCES; Index++) {
-		if (XV_deinterlacer_ConfigTable[Index].DeviceId == DeviceId) {
-			ConfigPtr = &XV_deinterlacer_ConfigTable[Index];
-			break;
-		}
-	}
+    for (Index = 0; Index < XPAR_XV_DEINTERLACER_NUM_INSTANCES; Index++) {
+        if (XV_deinterlacer_ConfigTable[Index].DeviceId == DeviceId) {
+            ConfigPtr = &XV_deinterlacer_ConfigTable[Index];
+            break;
+        }
+    }
 
-	return ConfigPtr;
+    return ConfigPtr;
 }
 
 int XV_deinterlacer_Initialize(XV_deinterlacer *InstancePtr, u16 DeviceId) {
-	XV_deinterlacer_Config *ConfigPtr;
+    XV_deinterlacer_Config *ConfigPtr;
 
-	Xil_AssertNonvoid(InstancePtr != NULL);
+    Xil_AssertNonvoid(InstancePtr != NULL);
 
-	ConfigPtr = XV_deinterlacer_LookupConfig(DeviceId);
-	if (ConfigPtr == NULL) {
-		InstancePtr->IsReady = 0;
-		return (XST_DEVICE_NOT_FOUND);
-	}
+    ConfigPtr = XV_deinterlacer_LookupConfig(DeviceId);
+    if (ConfigPtr == NULL) {
+        InstancePtr->IsReady = 0;
+        return (XST_DEVICE_NOT_FOUND);
+    }
 
-	return XV_deinterlacer_CfgInitialize(InstancePtr, ConfigPtr);
+    return XV_deinterlacer_CfgInitialize(InstancePtr,
+                                         ConfigPtr,
+                                         ConfigPtr->BaseAddress);
 }
 
 #endif