diff --git a/XilinxProcessorIPLib/drivers/dp/src/xdp.c b/XilinxProcessorIPLib/drivers/dp/src/xdp.c index 8bf42d24..0f94e3a5 100644 --- a/XilinxProcessorIPLib/drivers/dp/src/xdp.c +++ b/XilinxProcessorIPLib/drivers/dp/src/xdp.c @@ -272,6 +272,7 @@ u32 XDp_TxGetRxCapabilities(XDp *InstancePtr) /* Verify arguments. */ Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertNonvoid(XDp_GetCoreType(InstancePtr) == XDP_TX); Xil_AssertNonvoid(Dpcd != NULL); Xil_AssertNonvoid(LinkConfig != NULL); Xil_AssertNonvoid(ConfigPtr != NULL); @@ -327,6 +328,7 @@ u32 XDp_TxCfgMainLinkMax(XDp *InstancePtr) /* Verify arguments. */ Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertNonvoid(XDp_GetCoreType(InstancePtr) == XDP_TX); /* The link rate and lane count will be checked in XDp_TxSetLinkRate and * XDp_TxSetLaneCount. */ @@ -377,6 +379,7 @@ u32 XDp_TxEstablishLink(XDp *InstancePtr) /* Verify arguments. */ Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertNonvoid(XDp_GetCoreType(InstancePtr) == XDP_TX); Xil_AssertNonvoid((LinkConfig->LinkRate == XDP_TX_LINK_BW_SET_162GBPS) || (LinkConfig->LinkRate == XDP_TX_LINK_BW_SET_270GBPS) || @@ -440,6 +443,7 @@ u32 XDp_TxCheckLinkStatus(XDp *InstancePtr, u8 LaneCount) /* Verify arguments. */ Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertNonvoid(XDp_GetCoreType(InstancePtr) == XDP_TX); Xil_AssertNonvoid((LaneCount == XDP_TX_LANE_COUNT_SET_1) || (LaneCount == XDP_TX_LANE_COUNT_SET_2) || (LaneCount == XDP_TX_LANE_COUNT_SET_4)); @@ -488,6 +492,7 @@ void XDp_TxEnableTrainAdaptive(XDp *InstancePtr, u8 Enable) { /* Verify arguments. */ Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_TX); Xil_AssertVoid((Enable == 1) || (Enable == 0)); InstancePtr->TxInstance.TrainAdaptive = Enable; @@ -513,6 +518,7 @@ void XDp_TxSetHasRedriverInPath(XDp *InstancePtr, u8 Set) { /* Verify arguments. */ Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_TX); Xil_AssertVoid((Set == 1) || (Set == 0)); InstancePtr->TxInstance.BoardChar.HasRedriverInPath = Set; @@ -537,6 +543,7 @@ void XDp_TxCfgTxVsOffset(XDp *InstancePtr, u8 Offset) { /* Verify arguments. */ Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_TX); Xil_AssertVoid((Offset >= 0) && (Offset < 16)); InstancePtr->TxInstance.BoardChar.TxVsOffset = Offset; @@ -564,6 +571,7 @@ void XDp_TxCfgTxVsLevel(XDp *InstancePtr, u8 Level, u8 TxLevel) { /* Verify arguments. */ Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_TX); Xil_AssertVoid((Level >= 0) && (Level < 4)); Xil_AssertVoid((TxLevel >= 0) && (TxLevel < 16)); @@ -592,6 +600,7 @@ void XDp_TxCfgTxPeLevel(XDp *InstancePtr, u8 Level, u8 TxLevel) { /* Verify arguments. */ Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_TX); Xil_AssertVoid((Level >= 0) && (Level < 4)); Xil_AssertVoid((TxLevel >= 0) && (TxLevel < 32)); @@ -614,6 +623,11 @@ u32 XDp_TxIsConnected(XDp *InstancePtr) u32 Status; u8 Retries = 0; + /* Verify arguments. */ + Xil_AssertNonvoid(InstancePtr != NULL); + Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertNonvoid(XDp_GetCoreType(InstancePtr) == XDP_TX); + do { Status = XDp_ReadReg(InstancePtr->Config.BaseAddr, XDP_TX_INTERRUPT_SIG_STATE) & @@ -662,6 +676,7 @@ u32 XDp_TxAuxRead(XDp *InstancePtr, u32 DpcdAddress, u32 BytesToRead, /* Verify arguments. */ Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertNonvoid(XDp_GetCoreType(InstancePtr) == XDP_TX); Xil_AssertNonvoid(DpcdAddress <= 0xFFFFF); Xil_AssertNonvoid(BytesToRead <= 0xFFFFF); Xil_AssertNonvoid(ReadData != NULL); @@ -709,6 +724,7 @@ u32 XDp_TxAuxWrite(XDp *InstancePtr, u32 DpcdAddress, u32 BytesToWrite, /* Verify arguments. */ Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertNonvoid(XDp_GetCoreType(InstancePtr) == XDP_TX); Xil_AssertNonvoid(DpcdAddress <= 0xFFFFF); Xil_AssertNonvoid(BytesToWrite <= 0xFFFFF); Xil_AssertNonvoid(WriteData != NULL); @@ -767,6 +783,7 @@ u32 XDp_TxIicRead(XDp *InstancePtr, u8 IicAddress, u16 Offset, /* Verify arguments. */ Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertNonvoid(XDp_GetCoreType(InstancePtr) == XDP_TX); Xil_AssertNonvoid(IicAddress <= 0xFF); Xil_AssertNonvoid(Offset <= 0xFFFF); Xil_AssertNonvoid(BytesToRead <= 0xFFFF); @@ -880,6 +897,7 @@ u32 XDp_TxIicWrite(XDp *InstancePtr, u8 IicAddress, u8 BytesToWrite, /* Verify arguments. */ Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertNonvoid(XDp_GetCoreType(InstancePtr) == XDP_TX); Xil_AssertNonvoid(IicAddress <= 0xFF); Xil_AssertNonvoid(BytesToWrite <= 0xFF); Xil_AssertNonvoid(WriteData != NULL); @@ -921,6 +939,7 @@ u32 XDp_TxSetDownspread(XDp *InstancePtr, u8 Enable) /* Verify arguments. */ Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertNonvoid(XDp_GetCoreType(InstancePtr) == XDP_TX); Xil_AssertNonvoid((Enable == 1) || (Enable == 0)); if (!XDp_TxIsConnected(InstancePtr)) { @@ -982,6 +1001,7 @@ u32 XDp_TxSetEnhancedFrameMode(XDp *InstancePtr, u8 Enable) /* Verify arguments. */ Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertNonvoid(XDp_GetCoreType(InstancePtr) == XDP_TX); Xil_AssertNonvoid((Enable == 1) || (Enable == 0)); if (!XDp_TxIsConnected(InstancePtr)) { @@ -1041,6 +1061,7 @@ u32 XDp_TxSetLaneCount(XDp *InstancePtr, u8 LaneCount) /* Verify arguments. */ Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertNonvoid(XDp_GetCoreType(InstancePtr) == XDP_TX); Xil_AssertNonvoid((LaneCount == XDP_TX_LANE_COUNT_SET_1) || (LaneCount == XDP_TX_LANE_COUNT_SET_2) || (LaneCount == XDP_TX_LANE_COUNT_SET_4)); @@ -1101,6 +1122,7 @@ u32 XDp_TxSetLinkRate(XDp *InstancePtr, u8 LinkRate) /* Verify arguments. */ Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertNonvoid(XDp_GetCoreType(InstancePtr) == XDP_TX); Xil_AssertNonvoid((LinkRate == XDP_TX_LINK_BW_SET_162GBPS) || (LinkRate == XDP_TX_LINK_BW_SET_270GBPS) || (LinkRate == XDP_TX_LINK_BW_SET_540GBPS)); @@ -1169,6 +1191,7 @@ u32 XDp_TxSetScrambler(XDp *InstancePtr, u8 Enable) /* Verify arguments. */ Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertNonvoid(XDp_GetCoreType(InstancePtr) == XDP_TX); Xil_AssertNonvoid((Enable == 1) || (Enable == 0)); InstancePtr->TxInstance.LinkConfig.ScramblerEn = Enable; @@ -1214,6 +1237,7 @@ void XDp_TxEnableMainLink(XDp *InstancePtr) /* Verify arguments. */ Xil_AssertVoid(InstancePtr != NULL); Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_TX); /* Reset the scrambler. */ XDp_WriteReg(InstancePtr->Config.BaseAddr, @@ -1240,6 +1264,7 @@ void XDp_TxDisableMainLink(XDp *InstancePtr) /* Verify arguments. */ Xil_AssertVoid(InstancePtr != NULL); Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_TX); /* Reset the scrambler. */ XDp_WriteReg(InstancePtr->Config.BaseAddr, @@ -1267,6 +1292,7 @@ void XDp_TxResetPhy(XDp *InstancePtr, u32 Reset) /* Verify arguments. */ Xil_AssertVoid(InstancePtr != NULL); Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_TX); XDp_WriteReg(InstancePtr->Config.BaseAddr, XDP_TX_ENABLE, 0x0); @@ -1304,6 +1330,7 @@ void XDp_TxSetPhyPolarityAll(XDp *InstancePtr, u8 Polarity) /* Verify arguments. */ Xil_AssertVoid(InstancePtr != NULL); Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_TX); Xil_AssertVoid((Polarity == 0) || (Polarity == 1)); /* Preserve current settings. */ @@ -1346,6 +1373,7 @@ void XDp_TxSetPhyPolarityLane(XDp *InstancePtr, u8 Lane, u8 Polarity) /* Verify arguments. */ Xil_AssertVoid(InstancePtr != NULL); Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_TX); Xil_AssertVoid((Lane >= 0) && (Lane <= 3)); Xil_AssertVoid((Polarity == 0) || (Polarity == 1)); @@ -1409,6 +1437,7 @@ u32 XDp_RxCheckLinkStatus(XDp *InstancePtr) /* Verify arguments. */ Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertNonvoid(XDp_GetCoreType(InstancePtr) == XDP_RX); LaneCount = XDp_ReadReg(InstancePtr->Config.BaseAddr, XDP_RX_DPCD_LANE_COUNT_SET); @@ -1452,6 +1481,7 @@ void XDp_RxDtgEn(XDp *InstancePtr) /* Verify arguments. */ Xil_AssertVoid(InstancePtr != NULL); Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_RX); XDp_WriteReg(InstancePtr->Config.BaseAddr, XDP_RX_SOFT_RESET, XDP_RX_SOFT_RESET_VIDEO_MASK); @@ -1476,6 +1506,7 @@ void XDp_RxDtgDis(XDp *InstancePtr) /* Verify arguments. */ Xil_AssertVoid(InstancePtr != NULL); Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_RX); XDp_WriteReg(InstancePtr->Config.BaseAddr, XDP_RX_DTG_ENABLE, 0x0); @@ -1506,6 +1537,7 @@ void XDp_RxSetLinkRate(XDp *InstancePtr, u8 LinkRate) /* Verify arguments. */ Xil_AssertVoid(InstancePtr != NULL); Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_RX); Xil_AssertVoid((LinkRate == XDP_RX_OVER_LINK_BW_SET_162GBPS) || (LinkRate == XDP_RX_OVER_LINK_BW_SET_270GBPS) || (LinkRate == XDP_RX_OVER_LINK_BW_SET_540GBPS)); @@ -1538,6 +1570,7 @@ void XDp_RxSetLaneCount(XDp *InstancePtr, u8 LaneCount) /* Verify arguments. */ Xil_AssertVoid(InstancePtr != NULL); Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_RX); Xil_AssertVoid((LaneCount == XDP_RX_OVER_LANE_COUNT_SET_1) || (LaneCount == XDP_RX_OVER_LANE_COUNT_SET_2) || (LaneCount == XDP_RX_OVER_LANE_COUNT_SET_4)); diff --git a/XilinxProcessorIPLib/drivers/dp/src/xdp_edid.c b/XilinxProcessorIPLib/drivers/dp/src/xdp_edid.c index f894e3d1..bff5baf6 100644 --- a/XilinxProcessorIPLib/drivers/dp/src/xdp_edid.c +++ b/XilinxProcessorIPLib/drivers/dp/src/xdp_edid.c @@ -81,6 +81,7 @@ u32 XDp_TxGetEdid(XDp *InstancePtr, u8 *Edid) /* Verify arguments. */ Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertNonvoid(XDp_GetCoreType(InstancePtr) == XDP_TX); Xil_AssertNonvoid(Edid != NULL); /* Retrieve the base EDID block = EDID block #0. */ @@ -119,6 +120,7 @@ u32 XDp_TxGetRemoteEdid(XDp *InstancePtr, u8 LinkCountTotal, /* Verify arguments. */ Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertNonvoid(XDp_GetCoreType(InstancePtr) == XDP_TX); Xil_AssertNonvoid(LinkCountTotal > 0); Xil_AssertNonvoid((RelativeAddress != NULL) || (LinkCountTotal == 1)); Xil_AssertNonvoid(Edid != NULL); @@ -156,6 +158,12 @@ u32 XDp_TxGetEdidBlock(XDp *InstancePtr, u8 *Data, u8 BlockNum) u32 Status; u16 Offset; + /* Verify arguments. */ + Xil_AssertNonvoid(InstancePtr != NULL); + Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertNonvoid(XDp_GetCoreType(InstancePtr) == XDP_TX); + Xil_AssertNonvoid(Data != NULL); + /* Calculate the I2C offset for the specified EDID block. */ Offset = BlockNum * XDP_EDID_BLOCK_SIZE; @@ -197,6 +205,14 @@ u32 XDp_TxGetRemoteEdidBlock(XDp *InstancePtr, u8 *Data, u8 BlockNum, u32 Status; u16 Offset; + /* Verify arguments. */ + Xil_AssertNonvoid(InstancePtr != NULL); + Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertNonvoid(XDp_GetCoreType(InstancePtr) == XDP_TX); + Xil_AssertNonvoid(LinkCountTotal > 0); + Xil_AssertNonvoid((RelativeAddress != NULL) || (LinkCountTotal == 1)); + Xil_AssertNonvoid(Data != NULL); + /* Calculate the I2C offset for the specified EDID block. */ Offset = BlockNum * XDP_EDID_BLOCK_SIZE; @@ -238,6 +254,14 @@ u32 XDp_TxGetRemoteEdidDispIdExt(XDp *InstancePtr, u8 *Data, u8 NumExt; u8 ExtIndex; + /* Verify arguments. */ + Xil_AssertNonvoid(InstancePtr != NULL); + Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertNonvoid(XDp_GetCoreType(InstancePtr) == XDP_TX); + Xil_AssertNonvoid(LinkCountTotal > 0); + Xil_AssertNonvoid((RelativeAddress != NULL) || (LinkCountTotal == 1)); + Xil_AssertNonvoid(Data != NULL); + /* Get the base EDID block. */ Status = XDp_TxGetRemoteEdid(InstancePtr, LinkCountTotal, RelativeAddress, Data); @@ -292,6 +316,9 @@ u32 XDp_TxGetDispIdDataBlock(u8 *DisplayIdRaw, u8 SectionTag, u8 **DataBlockPtr) u8 DispIdSize = DisplayIdRaw[XDP_TX_DISPID_SIZE]; u8 *DataBlock; + /* Verify arguments. */ + Xil_AssertNonvoid(DisplayIdRaw != NULL); + /* Search for a section data block matching the specified tag. */ for (Index = XDP_TX_DISPID_PAYLOAD_START; Index < DispIdSize; Index++) { DataBlock = &DisplayIdRaw[Index]; @@ -356,6 +383,14 @@ u32 XDp_TxGetRemoteTiledDisplayDb(XDp *InstancePtr, u8 *EdidExt, u32 Status; u8 *EdidExtDispId; + /* Verify arguments. */ + Xil_AssertNonvoid(InstancePtr != NULL); + Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertNonvoid(XDp_GetCoreType(InstancePtr) == XDP_TX); + Xil_AssertNonvoid(LinkCountTotal > 0); + Xil_AssertNonvoid((RelativeAddress != NULL) || (LinkCountTotal == 1)); + Xil_AssertNonvoid(EdidExt != NULL); + /* Obtain a DisplayID EDID extension block. */ Status = XDp_TxGetRemoteEdidDispIdExt(InstancePtr, EdidExt, LinkCountTotal, RelativeAddress); diff --git a/XilinxProcessorIPLib/drivers/dp/src/xdp_intr.c b/XilinxProcessorIPLib/drivers/dp/src/xdp_intr.c index 04955c6f..7cb7aadb 100644 --- a/XilinxProcessorIPLib/drivers/dp/src/xdp_intr.c +++ b/XilinxProcessorIPLib/drivers/dp/src/xdp_intr.c @@ -106,6 +106,7 @@ void XDp_RxGenerateHpdInterrupt(XDp *InstancePtr, u16 DurationUs) /* Verify arguments. */ Xil_AssertVoid(InstancePtr != NULL); Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_RX); XDp_WriteReg(InstancePtr->Config.BaseAddr, XDP_RX_HPD_INTERRUPT, (DurationUs << XDP_RX_HPD_INTERRUPT_LENGTH_US_SHIFT) | @@ -132,6 +133,7 @@ void XDp_RxInterruptEnable(XDp *InstancePtr, u32 Mask) /* Verify arguments. */ Xil_AssertVoid(InstancePtr != NULL); Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_RX); MaskVal = XDp_ReadReg(InstancePtr->Config.BaseAddr, XDP_RX_INTERRUPT_CAUSE); @@ -160,6 +162,7 @@ void XDp_RxInterruptDisable(XDp *InstancePtr, u32 Mask) /* Verify arguments. */ Xil_AssertVoid(InstancePtr != NULL); Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_RX); MaskVal = XDp_ReadReg(InstancePtr->Config.BaseAddr, XDP_RX_INTERRUPT_CAUSE); @@ -189,6 +192,7 @@ void XDp_TxSetHpdEventHandler(XDp *InstancePtr, { /* Verify arguments. */ Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_TX); Xil_AssertVoid(CallbackFunc != NULL); Xil_AssertVoid(CallbackRef != NULL); @@ -216,6 +220,7 @@ void XDp_TxSetHpdPulseHandler(XDp *InstancePtr, { /* Verify arguments. */ Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_TX); Xil_AssertVoid(CallbackFunc != NULL); Xil_AssertVoid(CallbackRef != NULL); @@ -243,6 +248,7 @@ void XDp_RxSetIntrVmChangeHandler(XDp *InstancePtr, { /* Verify arguments. */ Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_RX); Xil_AssertVoid(CallbackFunc != NULL); Xil_AssertVoid(CallbackRef != NULL); @@ -270,6 +276,7 @@ void XDp_RxSetIntrPowerStateHandler(XDp *InstancePtr, { /* Verify arguments. */ Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_RX); Xil_AssertVoid(CallbackFunc != NULL); Xil_AssertVoid(CallbackRef != NULL); @@ -297,6 +304,7 @@ void XDp_RxSetIntrNoVideoHandler(XDp *InstancePtr, { /* Verify arguments. */ Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_RX); Xil_AssertVoid(CallbackFunc != NULL); Xil_AssertVoid(CallbackRef != NULL); @@ -324,6 +332,7 @@ void XDp_RxSetIntrVBlankHandler(XDp *InstancePtr, { /* Verify arguments. */ Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_RX); Xil_AssertVoid(CallbackFunc != NULL); Xil_AssertVoid(CallbackRef != NULL); @@ -351,6 +360,7 @@ void XDp_RxSetIntrTrainingLostHandler(XDp *InstancePtr, { /* Verify arguments. */ Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_RX); Xil_AssertVoid(CallbackFunc != NULL); Xil_AssertVoid(CallbackRef != NULL); @@ -378,6 +388,7 @@ void XDp_RxSetIntrVideoHandler(XDp *InstancePtr, { /* Verify arguments. */ Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_RX); Xil_AssertVoid(CallbackFunc != NULL); Xil_AssertVoid(CallbackRef != NULL); @@ -405,6 +416,7 @@ void XDp_RxSetIntrTrainingDoneHandler(XDp *InstancePtr, { /* Verify arguments. */ Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_RX); Xil_AssertVoid(CallbackFunc != NULL); Xil_AssertVoid(CallbackRef != NULL); @@ -432,6 +444,7 @@ void XDp_RxSetIntrBwChangeHandler(XDp *InstancePtr, { /* Verify arguments. */ Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_RX); Xil_AssertVoid(CallbackFunc != NULL); Xil_AssertVoid(CallbackRef != NULL); @@ -459,6 +472,7 @@ void XDp_RxSetIntrTp1Handler(XDp *InstancePtr, { /* Verify arguments. */ Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_RX); Xil_AssertVoid(CallbackFunc != NULL); Xil_AssertVoid(CallbackRef != NULL); @@ -486,6 +500,7 @@ void XDp_RxSetIntrTp2Handler(XDp *InstancePtr, { /* Verify arguments. */ Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_RX); Xil_AssertVoid(CallbackFunc != NULL); Xil_AssertVoid(CallbackRef != NULL); @@ -513,6 +528,7 @@ void XDp_RxSetIntrTp3Handler(XDp *InstancePtr, { /* Verify arguments. */ Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_RX); Xil_AssertVoid(CallbackFunc != NULL); Xil_AssertVoid(CallbackRef != NULL); diff --git a/XilinxProcessorIPLib/drivers/dp/src/xdp_mst.c b/XilinxProcessorIPLib/drivers/dp/src/xdp_mst.c index 19b1f4bc..61b9fb77 100644 --- a/XilinxProcessorIPLib/drivers/dp/src/xdp_mst.c +++ b/XilinxProcessorIPLib/drivers/dp/src/xdp_mst.c @@ -205,6 +205,7 @@ void XDp_TxMstCfgModeEnable(XDp *InstancePtr) { /* Verify arguments. */ Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_TX); InstancePtr->TxInstance.MstEnable = 1; } @@ -225,6 +226,7 @@ void XDp_TxMstCfgModeDisable(XDp *InstancePtr) { /* Verify arguments. */ Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_TX); InstancePtr->TxInstance.MstEnable = 0; } @@ -256,6 +258,7 @@ u32 XDp_TxMstCapable(XDp *InstancePtr) /* Verify arguments. */ Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertNonvoid(XDp_GetCoreType(InstancePtr) == XDP_TX); if (InstancePtr->Config.MstSupport == 0) { return XST_NO_FEATURE; @@ -317,6 +320,7 @@ u32 XDp_TxMstEnable(XDp *InstancePtr) /* Verify arguments. */ Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertNonvoid(XDp_GetCoreType(InstancePtr) == XDP_TX); /* Check if the immediate downstream RX device has MST capabilities. */ Status = XDp_TxMstCapable(InstancePtr); @@ -378,6 +382,7 @@ u32 XDp_TxMstDisable(XDp *InstancePtr) /* Verify arguments. */ Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertNonvoid(XDp_GetCoreType(InstancePtr) == XDP_TX); /* Disable MST mode in the immediate branch device. */ AuxData = 0; @@ -413,6 +418,7 @@ u8 XDp_TxMstStreamIsEnabled(XDp *InstancePtr, u8 Stream) { /* Verify arguments. */ Xil_AssertNonvoid(InstancePtr != NULL); + Xil_AssertNonvoid(XDp_GetCoreType(InstancePtr) == XDP_TX); Xil_AssertNonvoid((Stream == XDP_TX_STREAM_ID1) || (Stream == XDP_TX_STREAM_ID2) || (Stream == XDP_TX_STREAM_ID3) || @@ -439,6 +445,7 @@ void XDp_TxMstCfgStreamEnable(XDp *InstancePtr, u8 Stream) { /* Verify arguments. */ Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_TX); Xil_AssertVoid((Stream == XDP_TX_STREAM_ID1) || (Stream == XDP_TX_STREAM_ID2) || (Stream == XDP_TX_STREAM_ID3) || @@ -464,6 +471,7 @@ void XDp_TxMstCfgStreamDisable(XDp *InstancePtr, u8 Stream) { /* Verify arguments. */ Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_TX); Xil_AssertVoid((Stream == XDP_TX_STREAM_ID1) || (Stream == XDP_TX_STREAM_ID2) || (Stream == XDP_TX_STREAM_ID3) || @@ -499,6 +507,7 @@ void XDp_TxSetStreamSelectFromSinkList(XDp *InstancePtr, u8 Stream, u8 SinkNum) /* Verify arguments. */ Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_TX); Xil_AssertVoid((Stream == XDP_TX_STREAM_ID1) || (Stream == XDP_TX_STREAM_ID2) || (Stream == XDP_TX_STREAM_ID3) || @@ -541,12 +550,13 @@ void XDp_TxSetStreamSinkRad(XDp *InstancePtr, u8 Stream, u8 LinkCountTotal, /* Verify arguments. */ Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_TX); Xil_AssertVoid((Stream == XDP_TX_STREAM_ID1) || (Stream == XDP_TX_STREAM_ID2) || (Stream == XDP_TX_STREAM_ID3) || (Stream == XDP_TX_STREAM_ID4)); Xil_AssertVoid(LinkCountTotal > 0); - Xil_AssertVoid(RelativeAddress != NULL); + Xil_AssertVoid((RelativeAddress != NULL) || (LinkCountTotal == 1)); MstStream = &InstancePtr->TxInstance.MstStreamConfig[Stream - 1]; @@ -624,10 +634,11 @@ u32 XDp_TxFindAccessibleDpDevices(XDp *InstancePtr, u8 LinkCountTotal, static XDp_TxSbMsgLinkAddressReplyDeviceInfo DeviceInfo; /* Verify arguments. */ - Xil_AssertVoid(InstancePtr != NULL); - Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); - Xil_AssertVoid(LinkCountTotal > 0); - Xil_AssertVoid((RelativeAddress != NULL) || (LinkCountTotal == 1)); + Xil_AssertNonvoid(InstancePtr != NULL); + Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertNonvoid(XDp_GetCoreType(InstancePtr) == XDP_TX); + Xil_AssertNonvoid(LinkCountTotal > 0); + Xil_AssertNonvoid((RelativeAddress != NULL) || (LinkCountTotal == 1)); Topology = &InstancePtr->TxInstance.Topology; @@ -731,6 +742,10 @@ u32 XDp_TxFindAccessibleDpDevices(XDp *InstancePtr, u8 LinkCountTotal, *******************************************************************************/ void XDp_TxTopologySwapSinks(XDp *InstancePtr, u8 Index0, u8 Index1) { + /* Verify arguments. */ + Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_TX); + XDp_TxTopologyNode *TmpSink = InstancePtr->TxInstance.Topology.SinkList[Index0]; @@ -770,6 +785,10 @@ void XDp_TxTopologySortSinksByTiling(XDp *InstancePtr) u8 CurrTileOrder, CmpTileOrder; u8 SameTileDispCount, SameTileDispNum; + /* Verify arguments. */ + Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_TX); + for (CurrIndex = 0; CurrIndex < (InstancePtr->TxInstance.Topology.SinkTotal - 1); CurrIndex++) { @@ -877,6 +896,14 @@ u32 XDp_TxRemoteDpcdRead(XDp *InstancePtr, u8 LinkCountTotal, { u32 Status; + /* Verify arguments. */ + Xil_AssertNonvoid(InstancePtr != NULL); + Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertNonvoid(XDp_GetCoreType(InstancePtr) == XDP_TX); + Xil_AssertNonvoid(LinkCountTotal > 0); + Xil_AssertNonvoid((RelativeAddress != NULL) || (LinkCountTotal == 1)); + Xil_AssertNonvoid(ReadData != NULL); + /* Target RX device is immediately connected to the TX. */ if (LinkCountTotal == 1) { Status = XDp_TxAuxRead(InstancePtr, DpcdAddress, BytesToRead, @@ -960,6 +987,14 @@ u32 XDp_TxRemoteDpcdWrite(XDp *InstancePtr, u8 LinkCountTotal, { u32 Status; + /* Verify arguments. */ + Xil_AssertNonvoid(InstancePtr != NULL); + Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertNonvoid(XDp_GetCoreType(InstancePtr) == XDP_TX); + Xil_AssertNonvoid(LinkCountTotal > 0); + Xil_AssertNonvoid((RelativeAddress != NULL) || (LinkCountTotal == 1)); + Xil_AssertNonvoid(WriteData != NULL); + /* Target RX device is immediately connected to the TX. */ if (LinkCountTotal == 1) { Status = XDp_TxAuxWrite(InstancePtr, DpcdAddress, BytesToWrite, @@ -1052,6 +1087,14 @@ u32 XDp_TxRemoteIicRead(XDp *InstancePtr, u8 LinkCountTotal, { u32 Status; + /* Verify arguments. */ + Xil_AssertNonvoid(InstancePtr != NULL); + Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertNonvoid(XDp_GetCoreType(InstancePtr) == XDP_TX); + Xil_AssertNonvoid(LinkCountTotal > 0); + Xil_AssertNonvoid((RelativeAddress != NULL) || (LinkCountTotal == 1)); + Xil_AssertNonvoid(ReadData != NULL); + /* Target RX device is immediately connected to the TX. */ if (LinkCountTotal == 1) { Status = XDp_TxIicRead(InstancePtr, IicAddress, Offset, @@ -1176,6 +1219,14 @@ u32 XDp_TxRemoteIicWrite(XDp *InstancePtr, u8 LinkCountTotal, { u32 Status; + /* Verify arguments. */ + Xil_AssertNonvoid(InstancePtr != NULL); + Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertNonvoid(XDp_GetCoreType(InstancePtr) == XDP_TX); + Xil_AssertNonvoid(LinkCountTotal > 0); + Xil_AssertNonvoid((RelativeAddress != NULL) || (LinkCountTotal == 1)); + Xil_AssertNonvoid(WriteData != NULL); + /* Target RX device is immediately connected to the TX. */ if (LinkCountTotal == 1) { Status = XDp_TxIicWrite(InstancePtr, IicAddress, BytesToWrite, @@ -1224,6 +1275,7 @@ u32 XDp_TxAllocatePayloadStreams(XDp *InstancePtr) /* Verify arguments. */ Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertNonvoid(XDp_GetCoreType(InstancePtr) == XDP_TX); /* Allocate the payload table for each stream in both the DisplayPort TX * and RX device. */ @@ -1306,6 +1358,7 @@ u32 XDp_TxAllocatePayloadVcIdTable(XDp *InstancePtr, u8 VcId, u8 Ts) /* Verify arguments. */ Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertNonvoid(XDp_GetCoreType(InstancePtr) == XDP_TX); Xil_AssertNonvoid(VcId >= 0); Xil_AssertNonvoid((Ts >= 0) && (Ts <= 64)); @@ -1407,6 +1460,7 @@ u32 XDp_TxClearPayloadVcIdTable(XDp *InstancePtr) /* Verify arguments. */ Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertNonvoid(XDp_GetCoreType(InstancePtr) == XDP_TX); Status = XDp_TxAllocatePayloadVcIdTable(InstancePtr, 0, 64); if (Status != XST_SUCCESS) { @@ -1462,6 +1516,7 @@ u32 XDp_TxSendSbMsgRemoteDpcdWrite(XDp *InstancePtr, u8 LinkCountTotal, /* Verify arguments. */ Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertNonvoid(XDp_GetCoreType(InstancePtr) == XDP_TX); Xil_AssertNonvoid(LinkCountTotal > 0); Xil_AssertNonvoid((RelativeAddress != NULL) || (LinkCountTotal == 1)); Xil_AssertNonvoid(DpcdAddress <= 0xFFFFF); @@ -1552,6 +1607,7 @@ u32 XDp_TxSendSbMsgRemoteDpcdRead(XDp *InstancePtr, u8 LinkCountTotal, /* Verify arguments. */ Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertNonvoid(XDp_GetCoreType(InstancePtr) == XDP_TX); Xil_AssertNonvoid(LinkCountTotal > 0); Xil_AssertNonvoid((RelativeAddress != NULL) || (LinkCountTotal == 1)); Xil_AssertNonvoid(DpcdAddress <= 0xFFFFF); @@ -1621,6 +1677,7 @@ u32 XDp_TxSendSbMsgRemoteIicWrite(XDp *InstancePtr, u8 LinkCountTotal, /* Verify arguments. */ Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertNonvoid(XDp_GetCoreType(InstancePtr) == XDP_TX); Xil_AssertNonvoid(LinkCountTotal > 0); Xil_AssertNonvoid((RelativeAddress != NULL) || (LinkCountTotal == 1)); Xil_AssertNonvoid(IicDeviceId <= 0xFF); @@ -1710,6 +1767,7 @@ u32 XDp_TxSendSbMsgRemoteIicRead(XDp *InstancePtr, u8 LinkCountTotal, /* Verify arguments. */ Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertNonvoid(XDp_GetCoreType(InstancePtr) == XDP_TX); Xil_AssertNonvoid(LinkCountTotal > 0); Xil_AssertNonvoid((RelativeAddress != NULL) || (LinkCountTotal == 1)); Xil_AssertNonvoid(IicDeviceId <= 0xFF); @@ -1814,6 +1872,7 @@ u32 XDp_TxSendSbMsgLinkAddress(XDp *InstancePtr, u8 LinkCountTotal, /* Verify arguments. */ Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertNonvoid(XDp_GetCoreType(InstancePtr) == XDP_TX); Xil_AssertNonvoid(LinkCountTotal > 0); Xil_AssertNonvoid((RelativeAddress != NULL) || (LinkCountTotal == 1)); Xil_AssertNonvoid(DeviceInfo != NULL); @@ -1903,6 +1962,7 @@ u32 XDp_TxSendSbMsgEnumPathResources(XDp *InstancePtr, u8 LinkCountTotal, /* Verify arguments. */ Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertNonvoid(XDp_GetCoreType(InstancePtr) == XDP_TX); Xil_AssertNonvoid(LinkCountTotal > 0); Xil_AssertNonvoid((RelativeAddress != NULL) || (LinkCountTotal == 1)); Xil_AssertNonvoid(AvailPbn != NULL); @@ -1993,6 +2053,7 @@ u32 XDp_TxSendSbMsgAllocatePayload(XDp *InstancePtr, u8 LinkCountTotal, /* Verify arguments. */ Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertNonvoid(XDp_GetCoreType(InstancePtr) == XDP_TX); Xil_AssertNonvoid(LinkCountTotal > 0); Xil_AssertNonvoid((RelativeAddress != NULL) || (LinkCountTotal == 1)); Xil_AssertNonvoid(VcId > 0); @@ -2065,6 +2126,7 @@ u32 XDp_TxSendSbMsgClearPayloadIdTable(XDp *InstancePtr) /* Verify arguments. */ Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertNonvoid(XDp_GetCoreType(InstancePtr) == XDP_TX); /* Prepare the sideband message header. */ Msg.Header.LinkCountTotal = 1; @@ -2120,6 +2182,7 @@ void XDp_TxWriteGuid(XDp *InstancePtr, u8 LinkCountTotal, u8 *RelativeAddress, /* Verify arguments. */ Xil_AssertVoid(InstancePtr != NULL); Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_TX); Xil_AssertVoid(LinkCountTotal > 0); Xil_AssertVoid((RelativeAddress != NULL) || (LinkCountTotal == 1)); Xil_AssertVoid((Guid[0] != 0) || (Guid[1] != 0) || (Guid[2] != 0) || @@ -2162,6 +2225,7 @@ void XDp_TxGetGuid(XDp *InstancePtr, u8 LinkCountTotal, u8 *RelativeAddress, /* Verify arguments. */ Xil_AssertVoid(InstancePtr != NULL); Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_TX); Xil_AssertVoid(LinkCountTotal > 0); Xil_AssertVoid((RelativeAddress != NULL) || (LinkCountTotal == 1)); Xil_AssertVoid(Guid != NULL); diff --git a/XilinxProcessorIPLib/drivers/dp/src/xdp_spm.c b/XilinxProcessorIPLib/drivers/dp/src/xdp_spm.c index eb8a9cc6..059ff9c7 100644 --- a/XilinxProcessorIPLib/drivers/dp/src/xdp_spm.c +++ b/XilinxProcessorIPLib/drivers/dp/src/xdp_spm.c @@ -111,6 +111,7 @@ void XDp_TxCfgMsaRecalculate(XDp *InstancePtr, u8 Stream) /* Verify arguments. */ Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_TX); Xil_AssertVoid((Stream == XDP_TX_STREAM_ID1) || (Stream == XDP_TX_STREAM_ID2) || (Stream == XDP_TX_STREAM_ID3) || (Stream == XDP_TX_STREAM_ID4)); @@ -271,6 +272,7 @@ void XDp_TxCfgMsaUseStandardVideoMode(XDp *InstancePtr, u8 Stream, /* Verify arguments. */ Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_TX); Xil_AssertVoid(VideoMode < XVIDC_VM_NUM_SUPPORTED); Xil_AssertVoid((Stream == XDP_TX_STREAM_ID1) || (Stream == XDP_TX_STREAM_ID2) || (Stream == XDP_TX_STREAM_ID3) || @@ -348,6 +350,7 @@ void XDp_TxCfgMsaUseEdidPreferredTiming(XDp *InstancePtr, u8 Stream, u8 *Edid) /* Verify arguments. */ Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_TX); Xil_AssertVoid((Stream == XDP_TX_STREAM_ID1) || (Stream == XDP_TX_STREAM_ID2) || (Stream == XDP_TX_STREAM_ID3) || @@ -484,6 +487,7 @@ void XDp_TxCfgMsaUseCustom(XDp *InstancePtr, u8 Stream, /* Verify arguments. */ Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_TX); Xil_AssertVoid((Stream == XDP_TX_STREAM_ID1) || (Stream == XDP_TX_STREAM_ID2) || (Stream == XDP_TX_STREAM_ID3) || @@ -567,6 +571,7 @@ void XDp_TxCfgMsaSetBpc(XDp *InstancePtr, u8 Stream, u8 BitsPerColor) { /* Verify arguments. */ Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_TX); Xil_AssertVoid((Stream == XDP_TX_STREAM_ID1) || (Stream == XDP_TX_STREAM_ID2) || (Stream == XDP_TX_STREAM_ID3) || @@ -603,6 +608,7 @@ void XDp_TxCfgMsaEnSynchClkMode(XDp *InstancePtr, u8 Stream, u8 Enable) /* Verify arguments. */ Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_TX); Xil_AssertVoid((Stream == XDP_TX_STREAM_ID1) || (Stream == XDP_TX_STREAM_ID2) || (Stream == XDP_TX_STREAM_ID3) || @@ -674,6 +680,7 @@ void XDp_TxClearMsaValues(XDp *InstancePtr, u8 Stream) /* Verify arguments. */ Xil_AssertVoid(InstancePtr != NULL); Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_TX); Xil_AssertVoid((Stream == XDP_TX_STREAM_ID1) || (Stream == XDP_TX_STREAM_ID2) || (Stream == XDP_TX_STREAM_ID3) || @@ -748,6 +755,7 @@ void XDp_TxSetMsaValues(XDp *InstancePtr, u8 Stream) /* Verify arguments. */ Xil_AssertVoid(InstancePtr != NULL); Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_TX); Xil_AssertVoid((Stream == XDP_TX_STREAM_ID1) || (Stream == XDP_TX_STREAM_ID2) || (Stream == XDP_TX_STREAM_ID3) || @@ -832,6 +840,7 @@ void XDp_RxSetUserPixelWidth(XDp *InstancePtr, u8 UserPixelWidth) /* Verify arguments. */ Xil_AssertVoid(InstancePtr != NULL); Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); + Xil_AssertVoid(XDp_GetCoreType(InstancePtr) == XDP_RX); Xil_AssertVoid((UserPixelWidth == 1) || (UserPixelWidth == 2) || (UserPixelWidth == 4));