diff --git a/XilinxProcessorIPLib/drivers/nandpsu/src/xnandpsu.c b/XilinxProcessorIPLib/drivers/nandpsu/src/xnandpsu.c
index 2ccfe86d..85650143 100644
--- a/XilinxProcessorIPLib/drivers/nandpsu/src/xnandpsu.c
+++ b/XilinxProcessorIPLib/drivers/nandpsu/src/xnandpsu.c
@@ -2151,7 +2151,7 @@ static s32 XNandPsu_ProgramPage(XNandPsu *InstancePtr, u32 Target, u32 Page,
 		/*
 		 * Flush the Data Cache
 		 */
-		Xil_DCacheFlushRange(Buf, (PktSize * PktCount));
+		Xil_DCacheFlushRange((INTPTR)Buf, (PktSize * PktCount));
 
 #ifdef __aarch64__
 		XNandPsu_WriteReg(InstancePtr->Config.BaseAddress,
@@ -2427,7 +2427,7 @@ s32 XNandPsu_WriteSpareBytes(XNandPsu *InstancePtr, u32 Page, u8 *Buf)
 		/*
 		 * Flush the Data Cache
 		 */
-		Xil_DCacheFlushRange(BufPtr, (PktSize * PktCount));
+		Xil_DCacheFlushRange((INTPTR)BufPtr, (PktSize * PktCount));
 
 #ifdef __aarch64__
 		XNandPsu_WriteReg(InstancePtr->Config.BaseAddress,
@@ -2681,7 +2681,7 @@ static s32 XNandPsu_ReadPage(XNandPsu *InstancePtr, u32 Target, u32 Page,
 		/*
 		 * Invalidate the Data Cache
 		 */
-		Xil_DCacheInvalidateRange(Buf, (PktSize * PktCount));
+		Xil_DCacheInvalidateRange((INTPTR)Buf, (PktSize * PktCount));
 
 #ifdef __aarch64__
 		XNandPsu_WriteReg(InstancePtr->Config.BaseAddress,
@@ -2957,7 +2957,7 @@ s32 XNandPsu_ReadSpareBytes(XNandPsu *InstancePtr, u32 Page, u8 *Buf)
 		/*
 		 * Invalidate the Data Cache
 		 */
-		Xil_DCacheInvalidateRange(Buf, (PktSize * PktCount));
+		Xil_DCacheInvalidateRange((INTPTR)Buf, (PktSize * PktCount));
 #ifdef __aarch64__
 		XNandPsu_WriteReg(InstancePtr->Config.BaseAddress,
 				XNANDPSU_DMA_SYS_ADDR1_OFFSET,
@@ -3737,7 +3737,7 @@ static s32 XNandPsu_ChangeReadColumn(XNandPsu *InstancePtr, u32 Target,
 		/*
 		 * Invalidate the Data Cache
 		 */
-		Xil_DCacheInvalidateRange(Buf, (PktSize * PktCount));
+		Xil_DCacheInvalidateRange((INTPTR)Buf, (PktSize * PktCount));
 #ifdef __aarch64__
 		XNandPsu_WriteReg(InstancePtr->Config.BaseAddress,
 				XNANDPSU_DMA_SYS_ADDR1_OFFSET,
diff --git a/XilinxProcessorIPLib/drivers/nandpsu/src/xnandpsu.h b/XilinxProcessorIPLib/drivers/nandpsu/src/xnandpsu.h
index 5ed7e617..3feed1f1 100644
--- a/XilinxProcessorIPLib/drivers/nandpsu/src/xnandpsu.h
+++ b/XilinxProcessorIPLib/drivers/nandpsu/src/xnandpsu.h
@@ -552,6 +552,11 @@ s32 XNandPsu_GetFeature(XNandPsu *InstancePtr, u32 Target, u8 Feature,
 
 s32 XNandPsu_SetFeature(XNandPsu *InstancePtr, u32 Target, u8 Feature,
 								u8 *Buf);
+
+s32 XNandPsu_ScanBbt(XNandPsu *InstancePtr);
+
+s32 XNandPsu_MarkBlockBad(XNandPsu *InstancePtr, u32 Block);
+
 void XNandPsu_EnableDmaMode(XNandPsu *InstancePtr);
 
 void XNandPsu_DisableDmaMode(XNandPsu *InstancePtr);
diff --git a/XilinxProcessorIPLib/drivers/nandpsu/src/xnandpsu_sinit.c b/XilinxProcessorIPLib/drivers/nandpsu/src/xnandpsu_sinit.c
index 67fa4b6e..a01b3070 100644
--- a/XilinxProcessorIPLib/drivers/nandpsu/src/xnandpsu_sinit.c
+++ b/XilinxProcessorIPLib/drivers/nandpsu/src/xnandpsu_sinit.c
@@ -52,7 +52,6 @@
 #include "xparameters.h"
 #include "xnandpsu.h"
 /************************** Constant Definitions ****************************/
-#define XPAR_XNANDPSU_NUM_INSTANCES	1U
 
 /**************************** Type Definitions ******************************/