From 8deec4b39780b184bcbcb8fd0fc262a581399452 Mon Sep 17 00:00:00 2001 From: Andrei-Liviu Simion Date: Mon, 18 Aug 2014 00:37:14 -0700 Subject: [PATCH] dptx: Updated Doxygen documentation. Signed-off-by: Andrei-Liviu Simion --- .../drivers/dptx/doc/html/api/functions.html | 28 +++- .../dptx/doc/html/api/functions_vars.html | 28 +++- .../dptx/doc/html/api/globals_0x78.html | 20 +-- .../dptx/doc/html/api/globals_defs.html | 20 +-- .../drivers/dptx/doc/html/api/index.html | 2 +- .../doc/html/api/struct_x_dptx-members.html | 2 + .../dptx/doc/html/api/struct_x_dptx.html | 34 ++++ .../api/struct_x_dptx___config-members.html | 6 + .../doc/html/api/struct_x_dptx___config.html | 122 +++++++++++++-- ...dptx___main_stream_attributes-members.html | 1 + ...truct_x_dptx___main_stream_attributes.html | 17 ++ .../dptx/doc/html/api/xdptx__hw_8h.html | 148 +++++++++--------- .../dptx/doc/html/api/xdptx__spm_8c.html | 1 - 13 files changed, 307 insertions(+), 122 deletions(-) diff --git a/XilinxProcessorIPLib/drivers/dptx/doc/html/api/functions.html b/XilinxProcessorIPLib/drivers/dptx/doc/html/api/functions.html index 232ed4da..93255c62 100644 --- a/XilinxProcessorIPLib/drivers/dptx/doc/html/api/functions.html +++ b/XilinxProcessorIPLib/drivers/dptx/doc/html/api/functions.html @@ -40,6 +40,7 @@
  • l
  • m
  • n
  • +
  • o
  • p
  • q
  • r
  • @@ -56,7 +57,8 @@ Here is a list of all class members with links to the classes they belong to:

    - a -

    - b -

    - e -

    +: XDptx_MstStream
  • MstSupport +: XDptx_Config

    - n -

    +

    - o -

    - p -

    - s -

    - n -

    +

    - o -

    - p -

    - s -

    • SAxiClkHz -: XDptx_Config
    • ScramblerEn -: XDptx_LinkConfig
    • SinkList +: XDptx_Config
    • SbMsgDelayUs +: XDptx
    • ScramblerEn +: XDptx_LinkConfig
    • SecondaryChEn +: XDptx_Config
    • SinkList : XDptx_Topology
    • SinkTotal : XDptx_Topology
    • StartOfMsgTransaction : XDptx_SidebandMsgHeader
    • SupportDownspreadControl diff --git a/XilinxProcessorIPLib/drivers/dptx/doc/html/api/globals_0x78.html b/XilinxProcessorIPLib/drivers/dptx/doc/html/api/globals_0x78.html index 72ba8f0e..9c485049 100644 --- a/XilinxProcessorIPLib/drivers/dptx/doc/html/api/globals_0x78.html +++ b/XilinxProcessorIPLib/drivers/dptx/doc/html/api/globals_0x78.html @@ -621,27 +621,27 @@ Here is a list of all file members with links to the files they belong to: : xdptx.h, xdptx.c
    • XDptx_SetVideoMode() : xdptx_spm.c, xdptx.h
    • XDPTX_SOFT_RESET : xdptx_hw.h
    • XDPTX_SOFT_RESET_AUX_MASK -: xdptx_hw.h
    • XDPTX_SOFT_RESET_VIDEO_STREAM1_MASK +: xdptx_hw.h
    • XDPTX_SOFT_RESET_VIDEO_STREAM0_MASK +: xdptx_hw.h
    • XDPTX_SOFT_RESET_VIDEO_STREAM1_MASK : xdptx_hw.h
    • XDPTX_SOFT_RESET_VIDEO_STREAM2_MASK : xdptx_hw.h
    • XDPTX_SOFT_RESET_VIDEO_STREAM3_MASK -: xdptx_hw.h
    • XDPTX_SOFT_RESET_VIDEO_STREAM4_MASK -: xdptx_hw.h
    • XDPTX_SOFT_RESET_VIDEO_STREAM_ALL_MASK +: xdptx_hw.h
    • XDPTX_SOFT_RESET_VIDEO_STREAM_ALL_MASK : xdptx_hw.h
    • XDPTX_STREAM0 -: xdptx_hw.h
    • XDPTX_STREAM1 +: xdptx_hw.h
    • XDPTX_STREAM0_MSA_START +: xdptx_hw.h
    • XDPTX_STREAM1 : xdptx_hw.h
    • XDPTX_STREAM1_MSA_START -: xdptx_hw.h
    • XDPTX_STREAM2 +: xdptx_hw.h
    • XDPTX_STREAM1_MSA_START_OFFSET +: xdptx_hw.h
    • XDPTX_STREAM2 : xdptx_hw.h
    • XDPTX_STREAM2_MSA_START : xdptx_hw.h
    • XDPTX_STREAM2_MSA_START_OFFSET : xdptx_hw.h
    • XDPTX_STREAM3 : xdptx_hw.h
    • XDPTX_STREAM3_MSA_START : xdptx_hw.h
    • XDPTX_STREAM3_MSA_START_OFFSET -: xdptx_hw.h
    • XDPTX_STREAM4_MSA_START -: xdptx_hw.h
    • XDPTX_STREAM4_MSA_START_OFFSET -: xdptx_hw.h
    • XDPTX_STREAM_ID1 +: xdptx_hw.h
    • XDPTX_STREAM_ID0 +: xdptx_hw.h
    • XDPTX_STREAM_ID1 : xdptx_hw.h
    • XDPTX_STREAM_ID2 : xdptx_hw.h
    • XDPTX_STREAM_ID3 -: xdptx_hw.h
    • XDPTX_STREAM_ID4 -: xdptx_hw.h
    • XDptx_TimerHandler +: xdptx_hw.h
    • XDptx_TimerHandler : xdptx.h
    • XDPTX_TRAINING_PATTERN_SET : xdptx_hw.h
    • XDPTX_TRAINING_PATTERN_SET_OFF : xdptx_hw.h
    • XDPTX_TRAINING_PATTERN_SET_TP1 diff --git a/XilinxProcessorIPLib/drivers/dptx/doc/html/api/globals_defs.html b/XilinxProcessorIPLib/drivers/dptx/doc/html/api/globals_defs.html index 00d8e508..02744b3e 100644 --- a/XilinxProcessorIPLib/drivers/dptx/doc/html/api/globals_defs.html +++ b/XilinxProcessorIPLib/drivers/dptx/doc/html/api/globals_defs.html @@ -553,27 +553,27 @@ : xdptx_hw.h
    • XDPTX_SCRAMBLING_DISABLE : xdptx_hw.h
    • XDPTX_SOFT_RESET : xdptx_hw.h
    • XDPTX_SOFT_RESET_AUX_MASK -: xdptx_hw.h
    • XDPTX_SOFT_RESET_VIDEO_STREAM1_MASK +: xdptx_hw.h
    • XDPTX_SOFT_RESET_VIDEO_STREAM0_MASK +: xdptx_hw.h
    • XDPTX_SOFT_RESET_VIDEO_STREAM1_MASK : xdptx_hw.h
    • XDPTX_SOFT_RESET_VIDEO_STREAM2_MASK : xdptx_hw.h
    • XDPTX_SOFT_RESET_VIDEO_STREAM3_MASK -: xdptx_hw.h
    • XDPTX_SOFT_RESET_VIDEO_STREAM4_MASK -: xdptx_hw.h
    • XDPTX_SOFT_RESET_VIDEO_STREAM_ALL_MASK +: xdptx_hw.h
    • XDPTX_SOFT_RESET_VIDEO_STREAM_ALL_MASK : xdptx_hw.h
    • XDPTX_STREAM0 -: xdptx_hw.h
    • XDPTX_STREAM1 +: xdptx_hw.h
    • XDPTX_STREAM0_MSA_START +: xdptx_hw.h
    • XDPTX_STREAM1 : xdptx_hw.h
    • XDPTX_STREAM1_MSA_START -: xdptx_hw.h
    • XDPTX_STREAM2 +: xdptx_hw.h
    • XDPTX_STREAM1_MSA_START_OFFSET +: xdptx_hw.h
    • XDPTX_STREAM2 : xdptx_hw.h
    • XDPTX_STREAM2_MSA_START : xdptx_hw.h
    • XDPTX_STREAM2_MSA_START_OFFSET : xdptx_hw.h
    • XDPTX_STREAM3 : xdptx_hw.h
    • XDPTX_STREAM3_MSA_START : xdptx_hw.h
    • XDPTX_STREAM3_MSA_START_OFFSET -: xdptx_hw.h
    • XDPTX_STREAM4_MSA_START -: xdptx_hw.h
    • XDPTX_STREAM4_MSA_START_OFFSET -: xdptx_hw.h
    • XDPTX_STREAM_ID1 +: xdptx_hw.h
    • XDPTX_STREAM_ID0 +: xdptx_hw.h
    • XDPTX_STREAM_ID1 : xdptx_hw.h
    • XDPTX_STREAM_ID2 : xdptx_hw.h
    • XDPTX_STREAM_ID3 -: xdptx_hw.h
    • XDPTX_STREAM_ID4 -: xdptx_hw.h
    • XDPTX_TRAINING_PATTERN_SET +: xdptx_hw.h
    • XDPTX_TRAINING_PATTERN_SET : xdptx_hw.h
    • XDPTX_TRAINING_PATTERN_SET_OFF : xdptx_hw.h
    • XDPTX_TRAINING_PATTERN_SET_TP1 : xdptx_hw.h
    • XDPTX_TRAINING_PATTERN_SET_TP2 diff --git a/XilinxProcessorIPLib/drivers/dptx/doc/html/api/index.html b/XilinxProcessorIPLib/drivers/dptx/doc/html/api/index.html index 53587c3c..e5d6afd0 100644 --- a/XilinxProcessorIPLib/drivers/dptx/doc/html/api/index.html +++ b/XilinxProcessorIPLib/drivers/dptx/doc/html/api/index.html @@ -53,7 +53,7 @@ The driver does not handle audio. For an example as to how to configure and tran Asserts are used within all Xilinx drivers to enforce constraints on argument values. Asserts can be turned off on a system-wide basis by defining, at compile time, the NDEBUG identifier. By default, asserts are turned on and it is recommended that application developers leave asserts on during development.

      Limitations and known issues

        -
      • For MST mode to correctly display, the current version of the driver requires that each of the DisplayPort TX streams be allocated without skipping streams (i.e. assign stream 1, stream 2, and stream 3 - problems were experienced if skipping stream 2 and assigning stream 4 instead). skipping monitors in a daisy chain is OK as long as they are assigned to streams in order.
      • In MST mode, the current version of the driver does not support removal of an allocated stream from the virtual channel payload ID table without clearing the entire table.
      • Some sideband messages have not been implemented in the current version of the driver for MST mode. Notable, reception of a CONNECTION_STATUS_NOTIFY sideband message.
      • Some monitors required a power cycle for all streams to come up at certain resolutions (outside of the 1080p and UHD/2 resolutions) during testing. Different resolutions for different streams were not tested. This will be investigated for the next SDK release.
      • The driver does not handle audio. See the audio example in the driver examples directory for the required sequence for enabling audio.
      +
    • For MST mode to correctly display, the current version of the driver requires that each of the DisplayPort TX streams be allocated without skipping streams (i.e. assign stream 1, stream 2, and stream 3 - problems were experienced if skipping stream 2 and assigning stream 4 instead). skipping monitors in a daisy chain is OK as long as they are assigned to streams in order.
    • In MST mode, the current version of the driver does not support removal of an allocated stream from the virtual channel payload ID table without clearing the entire table.
    • Some sideband messages have not been implemented in the current version of the driver for MST mode. Notable, reception of a CONNECTION_STATUS_NOTIFY sideband message.
    • Some monitors required a power cycle for all streams to come up at certain resolutions (outside of the 1080p and UHD/2 resolutions) during testing. Different resolutions for different streams were not tested. This will be investigated for the next SDK release.
    • The driver does not handle audio. See the audio example in the driver examples directory for the required sequence for enabling audio.
    • Limited testing was done with 4-byte GT data width.
    • Most testing was done on a KC705 board. Some testing was done on a ZC706 board, mostly with a 2-byte GT data width configuration.

    Note:
    For a 5.4Gbps link rate, a high performance 7 series FPGA is required with a speed grade of -2 or -3.
    diff --git a/XilinxProcessorIPLib/drivers/dptx/doc/html/api/struct_x_dptx-members.html b/XilinxProcessorIPLib/drivers/dptx/doc/html/api/struct_x_dptx-members.html
    index 5071f985..ada0518e 100644
    --- a/XilinxProcessorIPLib/drivers/dptx/doc/html/api/struct_x_dptx-members.html
    +++ b/XilinxProcessorIPLib/drivers/dptx/doc/html/api/struct_x_dptx-members.html
    @@ -22,6 +22,7 @@
         
  • Class Members
  • XDptx Member List

    This is the complete list of members for XDptx, including all inherited members.

    + @@ -34,6 +35,7 @@ + diff --git a/XilinxProcessorIPLib/drivers/dptx/doc/html/api/struct_x_dptx.html b/XilinxProcessorIPLib/drivers/dptx/doc/html/api/struct_x_dptx.html index 0d40a1f8..df7c2437 100644 --- a/XilinxProcessorIPLib/drivers/dptx/doc/html/api/struct_x_dptx.html +++ b/XilinxProcessorIPLib/drivers/dptx/doc/html/api/struct_x_dptx.html @@ -49,6 +49,10 @@ The XDptx driver instance data. The + + + + @@ -63,6 +67,21 @@ The XDptx driver instance data. The
    AuxDelayUsXDptx
    BoardCharXDptx
    ConfigXDptx
    HpdEventCallbackRefXDptx
    MstEnableXDptx
    MstStreamConfigXDptx
    RxConfigXDptx
    SbMsgDelayUsXDptx
    TopologyXDptx
    TrainAdaptiveXDptx
    UserTimerPtrXDptx
    XDptx_Topology Topology
    u32 AuxDelayUs
    u32 SbMsgDelayUs
    XDptx_TimerHandler UserTimerWaitUs
    void * UserTimerPtr


    Member Data Documentation

    + +
    +
    + + + + +
    u32 XDptx::AuxDelayUs
    +
    +
    + +

    +Amount of latency in micro- seconds to use between AUX transactions. +

    +

    @@ -243,6 +262,21 @@ Configuration structure for a multi-stream transport (MST) stream. Configuration structure for the RX device.

    + +

    +
    + + + + +
    u32 XDptx::SbMsgDelayUs
    +
    +
    + +

    +Amount of latency in micro- seconds to use between sideband messages for multi-stream transport (MST) mode. +

    +

    diff --git a/XilinxProcessorIPLib/drivers/dptx/doc/html/api/struct_x_dptx___config-members.html b/XilinxProcessorIPLib/drivers/dptx/doc/html/api/struct_x_dptx___config-members.html index 7dfe9cbe..2b918b86 100644 --- a/XilinxProcessorIPLib/drivers/dptx/doc/html/api/struct_x_dptx___config-members.html +++ b/XilinxProcessorIPLib/drivers/dptx/doc/html/api/struct_x_dptx___config-members.html @@ -24,12 +24,18 @@

    XDptx_Config Member List

    This is the complete list of members for XDptx_Config, including all inherited members.

    + + + + + +
    BaseAddrXDptx_Config
    DeviceIdXDptx_Config
    DpProtocolXDptx_Config
    DualPixelEnXDptx_Config
    MaxBitsPerColorXDptx_Config
    MaxLaneCountXDptx_Config
    MaxLinkRateXDptx_Config
    MstSupportXDptx_Config
    NumAudioChsXDptx_Config
    NumMstStreamsXDptx_Config
    PayloadDataWidthXDptx_Config
    QuadPixelEnXDptx_Config
    SAxiClkHzXDptx_Config
    SecondaryChEnXDptx_Config
    YCrCbEnXDptx_Config
    YOnlyEnXDptx_Config
    Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. diff --git a/XilinxProcessorIPLib/drivers/dptx/doc/html/api/struct_x_dptx___config.html b/XilinxProcessorIPLib/drivers/dptx/doc/html/api/struct_x_dptx___config.html index 3b01100b..60bbddd1 100644 --- a/XilinxProcessorIPLib/drivers/dptx/doc/html/api/struct_x_dptx___config.html +++ b/XilinxProcessorIPLib/drivers/dptx/doc/html/api/struct_x_dptx___config.html @@ -45,9 +45,21 @@ This typedef contains configuration information for the DisplayPort TX core. u8 DualPixelEn +u8 YCrCbEn + u8 YOnlyEn -u8 YCrCbEn +u8 PayloadDataWidth + +u8 SecondaryChEn + +u8 NumAudioChs + +u8 MstSupport + +u8 NumMstStreams + +u8 DpProtocol


    Member Data Documentation

    @@ -63,7 +75,7 @@ This typedef contains configuration information for the DisplayPort TX core.

    -The base address of the core. +The base address of the core instance.

    @@ -81,6 +93,21 @@ The base address of the core. Device instance ID.

    + +

    +
    + + + + +
    u8 XDptx_Config::DpProtocol
    +
    +
    + +

    +The DisplayPort protocol version that this core instance is configured for. 0 = v1.1a, 1 = v1.2. +

    +

    @@ -93,7 +120,7 @@ Device instance ID.

    -Dual pixel support by this core's instance. +Dual pixel support by this core instance.

    @@ -108,7 +135,7 @@ Dual pixel support by this core's instance.

    -The maximum bits/color supported by this core's instance +The maximum bits/color supported by this core instance

    @@ -123,7 +150,7 @@ The maximum bits/color supported by this core's instance

    -The maximum lane count supported by this core's instance. +The maximum lane count supported by this core instance.

    @@ -138,7 +165,67 @@ The maximum lane count supported by this core's instance.

    -The maximum link rate supported by this core's instance. +The maximum link rate supported by this core instance. +

    +

    + +

    +
    + + + + +
    u8 XDptx_Config::MstSupport
    +
    +
    + +

    +Multi-stream transport (MST) mode is enabled by this core instance. +

    +

    + +

    + +
    + +

    +The number of audio channels supported by this core instance. +

    +

    + +

    + +
    + +

    +The total number of MST streams supported by this core instance. +

    +

    + +

    + +
    + +

    +The payload data width used by this core instance.

    @@ -153,7 +240,7 @@ The maximum link rate supported by this core's instance.

    -Quad pixel support by this core's instance. +Quad pixel support by this core instance.

    @@ -168,7 +255,22 @@ Quad pixel support by this core's instance.

    -The clock frequency of the core's S_AXI_ACLK port. +The clock frequency of the core instance's S_AXI_ACLK port. +

    +

    + +

    + +
    + +

    +This core instance supports audio packets being sent by the secondary channel.

    @@ -183,7 +285,7 @@ The clock frequency of the core's S_AXI_ACLK port.

    -YCrCb format support by this core's instance. +YCrCb format support by this core instance.

    @@ -198,7 +300,7 @@ YCrCb format support by this core's instance.

    -YOnly format support by this core's instance. +YOnly format support by this core instance.


    The documentation for this struct was generated from the following file:
    The MSA registers for stream 2 are at an offset from the corresponding registers of stream 0.

    @@ -8981,7 +9013,7 @@ Average stream symbol timeslots per MTP config.

    - +
    #define XDPTX_STREAM3_MSA_START   0x0550 #define XDPTX_STREAM3_MSA_START   0x05A0
    @@ -9004,40 +9036,23 @@ Start of the MSA registers for stream 3.

    Value:

    The MSA registers for stream 3 are at an offset from the corresponding registers of stream 1. + XDPTX_STREAM0_MSA_START) +The MSA registers for stream 3 are at an offset from the corresponding registers of stream 0.

    - +

    - +
    #define XDPTX_STREAM4_MSA_START   0x05A0 #define XDPTX_STREAM_ID0   0

    -Start of the MSA registers for stream 4. -

    -

    - -

    -
    - - - - -
    #define XDPTX_STREAM4_MSA_START_OFFSET
    -
    -
    -

    -Value:

    The MSA registers for stream 4 are at an offset from the corresponding registers of stream 1.

    @@ -9083,21 +9098,6 @@ Start of the MSA registers for stream 4.

    - -

    - -

    -
    - - - - -
    #define XDPTX_STREAM_ID4   4
    -
    -
    - -

    -

    diff --git a/XilinxProcessorIPLib/drivers/dptx/doc/html/api/xdptx__spm_8c.html b/XilinxProcessorIPLib/drivers/dptx/doc/html/api/xdptx__spm_8c.html index 4870629e..4bfae35a 100644 --- a/XilinxProcessorIPLib/drivers/dptx/doc/html/api/xdptx__spm_8c.html +++ b/XilinxProcessorIPLib/drivers/dptx/doc/html/api/xdptx__spm_8c.html @@ -32,7 +32,6 @@ This file contains the stream policy maker functions for the

    -#include "math.h"
    #include "
    xdptx.h"
    #include "xdptx_hw.h"
    #include "xstatus.h"