diff --git a/XilinxProcessorIPLib/drivers/video_common/doc/html/api/annotated.html b/XilinxProcessorIPLib/drivers/video_common/doc/html/api/annotated.html index 3c1bd53a..629de1b0 100644 --- a/XilinxProcessorIPLib/drivers/video_common/doc/html/api/annotated.html +++ b/XilinxProcessorIPLib/drivers/video_common/doc/html/api/annotated.html @@ -27,4 +27,4 @@
Public Attributes | ||
XVidC_ColorSpace | ColorSpaceId | |
XVidC_ColorFormat | ColorFormatId | |
XVidC_ColorDepth | ColorDepth | |
HTotal | XVidC_VideoTiming | |
VActive | XVidC_VideoTiming | |
VSyncPolarity | XVidC_VideoTiming |
char* XVidC_GetColorFormatStr | ( | -XVidC_ColorSpace | -ColorSpaceId | +XVidC_ColorFormat | +ColorFormatId | ) |
ColorSpaceId | specifies the index of color space. 0 = XVIDC_CSF_RGB 1 = XVIDC_CSF_YCRCB_444, 2 = XVIDC_CSF_YCRCB_422, 3 = XVIDC_CSF_YCRCB_420, | |
ColorFormatId | specifies the index of color format space. 0 = XVIDC_CSF_RGB 1 = XVIDC_CSF_YCRCB_444, 2 = XVIDC_CSF_YCRCB_422, 3 = XVIDC_CSF_YCRCB_420, |
-This function check input video mode is interlaced/progressive.
+This function checks if the input video mode is interlaced/progressive based on its ID from the video timings table.
VmId | specifies the resolution id. | |
VmId | specifies the resolution ID from the video timings table. |
u8 XVidC_IsInterlaced | +( | +XVidC_VideoMode | +VmId | +) | ++ |
+This function checks if the input video mode is interlaced based on its ID from the video timings table.
+
VmId | specifies the resolution ID from the video timings table. |
@@ -454,4 +486,4 @@ This function prints timing information on STDIO/Uart console.
-Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. +Copyright @ 1995-2015 Xilinx, Inc. All rights reserved. diff --git a/XilinxProcessorIPLib/drivers/video_common/doc/html/api/xvidc_8h.html b/XilinxProcessorIPLib/drivers/video_common/doc/html/api/xvidc_8h.html index 09ef7db3..7bbf69ff 100644 --- a/XilinxProcessorIPLib/drivers/video_common/doc/html/api/xvidc_8h.html +++ b/XilinxProcessorIPLib/drivers/video_common/doc/html/api/xvidc_8h.html @@ -40,13 +40,8 @@
enum XVidC_ColorConversionStd | -
enum XVidC_ColorFormat | +
@@ -430,31 +429,29 @@ Color conversion output range.
enum XVidC_ColorSpace | +enum XVidC_ColorStd |
-Color space format.
Where RB stands for reduced blanking.
XVIDC_VM_480_30_I | - | |||||||||||||||||||||||||||||
XVIDC_VM_480_60_I | ||||||||||||||||||||||||||||||
XVIDC_VM_576_25_I | - | |||||||||||||||||||||||||||||
XVIDC_VM_576_50_I | ||||||||||||||||||||||||||||||
XVIDC_VM_1080_25_I | - | |||||||||||||||||||||||||||||
XVIDC_VM_1080_30_I | - | |||||||||||||||||||||||||||||
XVIDC_VM_1080_50_I | ||||||||||||||||||||||||||||||
XVIDC_VM_1080_60_I |
@@ -846,15 +835,15 @@ Where RB stands for reduced blanking.
Function Documentation- +
+
+
+This function checks if the input video mode is interlaced based on its ID from the video timings table. + @@ -1250,7 +1269,7 @@ This function prints timing information on STDIO/Uart console.
-This table contains the main stream attributes for various standard resolutions. Each entry is of the format: 1) ID: XVIDC_VM_<HRES>x<VRES>_<FRAME RATE (HZ)>_<P|I>(_RB = Reduced Blanking) 2) Resolution naming: "<HRES>x<VRES>@<FRAME RATE (HZ)>" 3) Frame rate: XVIDC_FR_<FRAME RATE (HZ)> 4) Video timing structure: 1) Horizontal active resolution (pixels) 2) Horizontal front porch (pixels) 3) Horizontal sync width (pixels) 4) Horizontal back porch (pixels) 5) Horizontal total (pixels) 6) Horizontal sync polarity (0=negative|1=positive) 7) Vertical active resolution (lines) 8) Frame 0: Vertical front porch (lines) 9) Frame 0: Vertical sync width (lines) 10) Frame 0: Vertical back porch (lines) 11) Frame 0: Vertical total (lines) 12) Frame 1: Vertical front porch (lines) 13) Frame 1: Vertical sync width (lines) 14) Frame 1: Vertical back porch (lines) 15) Frame 1: Vertical total (lines) 16) Vertical sync polarity (0=negative|1=positive) + -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. +Copyright @ 1995-2015 Xilinx, Inc. All rights reserved. diff --git a/XilinxProcessorIPLib/drivers/video_common/doc/html/api/xvidc__edid_8c.html b/XilinxProcessorIPLib/drivers/video_common/doc/html/api/xvidc__edid_8c.html index be0e089e..3de256cd 100644 --- a/XilinxProcessorIPLib/drivers/video_common/doc/html/api/xvidc__edid_8c.html +++ b/XilinxProcessorIPLib/drivers/video_common/doc/html/api/xvidc__edid_8c.html @@ -429,4 +429,4 @@ Checks whether or not a specified video timing mode is supported as specified in -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. +Copyright @ 1995-2015 Xilinx, Inc. All rights reserved. diff --git a/XilinxProcessorIPLib/drivers/video_common/doc/html/api/xvidc__edid_8h.html b/XilinxProcessorIPLib/drivers/video_common/doc/html/api/xvidc__edid_8h.html index 9920c706..bb6dcba6 100644 --- a/XilinxProcessorIPLib/drivers/video_common/doc/html/api/xvidc__edid_8h.html +++ b/XilinxProcessorIPLib/drivers/video_common/doc/html/api/xvidc__edid_8h.html @@ -4629,4 +4629,4 @@ Checks whether or not a specified video timing mode is supported as specified in -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. +Copyright @ 1995-2015 Xilinx, Inc. All rights reserved. diff --git a/XilinxProcessorIPLib/drivers/video_common/doc/html/api/xvidc__timings__table_8c.html b/XilinxProcessorIPLib/drivers/video_common/doc/html/api/xvidc__timings__table_8c.html index 1c54150e..89003ca3 100644 --- a/XilinxProcessorIPLib/drivers/video_common/doc/html/api/xvidc__timings__table_8c.html +++ b/XilinxProcessorIPLib/drivers/video_common/doc/html/api/xvidc__timings__table_8c.html @@ -55,4 +55,4 @@ Contains video timings for various standard resolutions. This table contains the main stream attributes for various standard resolutions. Each entry is of the format: 1) ID: XVIDC_VM_<HRES>x<VRES>_<FRAME RATE (HZ)>_<P|I>(_RB = Reduced Blanking) 2) Resolution naming: "<HRES>x<VRES>@<FRAME RATE (HZ)>" 3) Frame rate: XVIDC_FR_<FRAME RATE (HZ)> 4) Video timing structure: 1) Horizontal active resolution (pixels) 2) Horizontal front porch (pixels) 3) Horizontal sync width (pixels) 4) Horizontal back porch (pixels) 5) Horizontal total (pixels) 6) Horizontal sync polarity (0=negative|1=positive) 7) Vertical active resolution (lines) 8) Frame 0: Vertical front porch (lines) 9) Frame 0: Vertical sync width (lines) 10) Frame 0: Vertical back porch (lines) 11) Frame 0: Vertical total (lines) 12) Frame 1: Vertical front porch (lines) 13) Frame 1: Vertical sync width (lines) 14) Frame 1: Vertical back porch (lines) 15) Frame 1: Vertical total (lines) 16) Vertical sync polarity (0=negative|1=positive) -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. +Copyright @ 1995-2015 Xilinx, Inc. All rights reserved. |