From 979a40a904aff3766a5aff1678b3586b2bad4d7e Mon Sep 17 00:00:00 2001 From: Kinjal Pravinbhai Patel Date: Mon, 16 Mar 2015 14:54:58 +0530 Subject: [PATCH] lib: sw_apps: added echo-test for openamp R5 This patch includes echo test application which should be built with R5 openamp library for creating baremetal slave application for openamp Signed-off-by: Kinjal Pravinbhai Patel --- .../data/openamp_echo_test.mss | 44 +++ .../data/openamp_echo_test.tcl | 100 ++++++ lib/sw_apps/openamp_echo_test/src/baremetal.c | 128 ++++++++ lib/sw_apps/openamp_echo_test/src/baremetal.h | 46 +++ lib/sw_apps/openamp_echo_test/src/echo_test.c | 168 ++++++++++ lib/sw_apps/openamp_echo_test/src/lscript.ld | 308 ++++++++++++++++++ lib/sw_apps/openamp_echo_test/src/platform.c | 119 +++++++ lib/sw_apps/openamp_echo_test/src/platform.h | 100 ++++++ .../openamp_echo_test/src/platform_info.c | 229 +++++++++++++ lib/sw_apps/openamp_echo_test/src/rsc_table.c | 104 ++++++ lib/sw_apps/openamp_echo_test/src/rsc_table.h | 54 +++ 11 files changed, 1400 insertions(+) create mode 100644 lib/sw_apps/openamp_echo_test/data/openamp_echo_test.mss create mode 100644 lib/sw_apps/openamp_echo_test/data/openamp_echo_test.tcl create mode 100644 lib/sw_apps/openamp_echo_test/src/baremetal.c create mode 100644 lib/sw_apps/openamp_echo_test/src/baremetal.h create mode 100644 lib/sw_apps/openamp_echo_test/src/echo_test.c create mode 100644 lib/sw_apps/openamp_echo_test/src/lscript.ld create mode 100644 lib/sw_apps/openamp_echo_test/src/platform.c create mode 100644 lib/sw_apps/openamp_echo_test/src/platform.h create mode 100644 lib/sw_apps/openamp_echo_test/src/platform_info.c create mode 100644 lib/sw_apps/openamp_echo_test/src/rsc_table.c create mode 100644 lib/sw_apps/openamp_echo_test/src/rsc_table.h diff --git a/lib/sw_apps/openamp_echo_test/data/openamp_echo_test.mss b/lib/sw_apps/openamp_echo_test/data/openamp_echo_test.mss new file mode 100644 index 00000000..785e569a --- /dev/null +++ b/lib/sw_apps/openamp_echo_test/data/openamp_echo_test.mss @@ -0,0 +1,44 @@ +#/****************************************************************************** +#* +#* Copyright (C) 2015 Xilinx, Inc. All rights reserved. +#* +#* Permission is hereby granted, free of charge, to any person obtaining a copy +#* of this software and associated documentation files (the "Software"), to deal +#* in the Software without restriction, including without limitation the rights +#* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +#* copies of the Software, and to permit persons to whom the Software is +#* furnished to do so, subject to the following conditions: +#* +#* The above copyright notice and this permission notice shall be included in +#* all copies or substantial portions of the Software. +#* +#* Use of the Software is limited solely to applications: +#* (a) running on a Xilinx device, or +#* (b) that interact with a Xilinx device through a bus or interconnect. +#* +#* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +#* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +#* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +#* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +#* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +#* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +#* SOFTWARE. +#* +#* Except as contained in this notice, the name of the Xilinx shall not be used +#* in advertising or otherwise to promote the sale, use or other dealings in +#* this Software without prior written authorization from Xilinx. +#* +#******************************************************************************/ + +PARAMETER VERSION = 2.2.0 + + +BEGIN OS + PARAMETER OS_NAME = standalone + PARAMETER STDIN = * + PARAMETER STDOUT = * +END + +BEGIN LIBRARY + PARAMETER LIBRARY_NAME = xilopenamp +END \ No newline at end of file diff --git a/lib/sw_apps/openamp_echo_test/data/openamp_echo_test.tcl b/lib/sw_apps/openamp_echo_test/data/openamp_echo_test.tcl new file mode 100644 index 00000000..9719a5fc --- /dev/null +++ b/lib/sw_apps/openamp_echo_test/data/openamp_echo_test.tcl @@ -0,0 +1,100 @@ +#/****************************************************************************** +#* +#* Copyright (C) 2015 Xilinx, Inc. All rights reserved. +#* +#* Permission is hereby granted, free of charge, to any person obtaining a copy +#* of this software and associated documentation files (the "Software"), to deal +#* in the Software without restriction, including without limitation the rights +#* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +#* copies of the Software, and to permit persons to whom the Software is +#* furnished to do so, subject to the following conditions: +#* +#* The above copyright notice and this permission notice shall be included in +#* all copies or substantial portions of the Software. +#* +#* Use of the Software is limited solely to applications: +#* (a) running on a Xilinx device, or +#* (b) that interact with a Xilinx device through a bus or interconnect. +#* +#* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +#* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +#* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +#* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +#* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +#* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +#* SOFTWARE. +#* +#* Except as contained in this notice, the name of the Xilinx shall not be used +#* in advertising or otherwise to promote the sale, use or other dealings in +#* this Software without prior written authorization from Xilinx. +#* +#******************************************************************************/ + +proc swapp_get_name {} { + return "OpenAMP echo-test"; +} + +proc swapp_get_description {} { + return " OPENAMP R5 echo-test application"; +} + +proc check_standalone_os {} { + set oslist [get_os]; + + if { [llength $oslist] != 1 } { + return 0; + } + set os [lindex $oslist 0]; + + if { $os != "standalone" } { + error "This application is supported only on the Standalone Board Support Package."; + } +} + +proc swapp_is_supported_sw {} { + # make sure we are using standalone OS + #check_standalone_os; + + # make sure xilffs is available + set librarylist [get_libs -filter "NAME==xilopenamp"]; + + if { [llength $librarylist] == 0 } { + error "This application requires xilopenamp library in the Board Support Package."; + } elseif { [llength $librarylist] > 1} { + error "Multiple xilopenamp libraries present in the Board Support Package." + } +} + +proc swapp_is_supported_hw {} { + + # check processor type + set proc_instance [get_sw_processor]; + set hw_processor [common::get_property HW_INSTANCE $proc_instance] + + set proc_type [common::get_property IP_NAME [get_cells $hw_processor]]; + + if { $proc_type != "psu_cortexr5" } { + error "This application is supported only for CortexR5 processors."; + } + + return 1; +} + + +proc get_stdout {} { + return; +} + +proc check_stdout_hw {} { + return; +} + +proc swapp_generate {} { + return; +} + +proc swapp_get_linker_constraints {} { + + # don't generate a linker script. fsbl has its own linker script + return "lscript no"; +} diff --git a/lib/sw_apps/openamp_echo_test/src/baremetal.c b/lib/sw_apps/openamp_echo_test/src/baremetal.c new file mode 100644 index 00000000..41287d7d --- /dev/null +++ b/lib/sw_apps/openamp_echo_test/src/baremetal.c @@ -0,0 +1,128 @@ +/****************************************************************************** +* +* Copyright (C) 2015 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +* (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in +* this Software without prior written authorization from Xilinx. +* +******************************************************************************/ + +#include +#include +#include "xparameters.h" +#include "baremetal.h" +#include "xil_exception.h" +#include "xscugic.h" +#include "xil_cache.h" +#include "platform.h" +#include "xil_mmu.h" + +XScuGic InterruptController; + +int zynqMP_r5_gic_initialize() { + u32 Status; + + Xil_ExceptionDisable(); + + XScuGic_Config *IntcConfig; /* The configuration parameters of the interrupt controller */ + + /* + * Initialize the interrupt controller driver + */ + IntcConfig = XScuGic_LookupConfig(INTC_DEVICE_ID); + if (NULL == IntcConfig) { + return XST_FAILURE; + } + + Status = XScuGic_CfgInitialize(&InterruptController, IntcConfig, + IntcConfig->CpuBaseAddress); + if (Status != XST_SUCCESS) { + return XST_FAILURE; + } + + /* + * Register the interrupt handler to the hardware interrupt handling + * logic in the ARM processor. + */ + Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_IRQ_INT, + (Xil_ExceptionHandler) zynqMP_r5_irq_isr, + &InterruptController); + + Xil_ExceptionEnable(); + + return 0; +} + +extern void bm_env_isr(int vector); + +void zynqMP_r5_irq_isr() { + + unsigned int raw_irq; + int irq_vector; + raw_irq = (unsigned int)XScuGic_CPUReadReg(&InterruptController,XSCUGIC_INT_ACK_OFFSET); + irq_vector = (int) (raw_irq & XSCUGIC_ACK_INTID_MASK); + + bm_env_isr(irq_vector); + + XScuGic_CPUWriteReg(&InterruptController,XSCUGIC_EOI_OFFSET, raw_irq); +} + + +/*********************************************************************** + * + * + * zynqMP_r5_map_mem_region + * + * + * This function sets-up the region of memory based on the given + * attributes + * There is no MMU for R5, no need to map phy address to vrt_addr + * + * @param addr - Starting address of memory region + * @parma size - size of region + * @param attrib - Attributes for memory region + * + * + * OUTPUTS + * + * None + * + ***********************************************************************/ +void zynqMP_r5_map_mem_region(u32 addr, u32 size, u32 attrib) { + + u32 Index,NumSize; + + /* Calculating the number of MBs required for the shared region*/ + NumSize = size / 0x100000; + + /* Xil_SetTlbAttributes is designed to configure memory for 1MB + region. The API is called multiple times to configure the number + of MBs required by shared memory size (calculated as NumSize)*/ + for (Index = 0; Index < NumSize; Index ++) + Xil_SetTlbAttributes(addr + 0x100000 * Index, attrib); + + +} diff --git a/lib/sw_apps/openamp_echo_test/src/baremetal.h b/lib/sw_apps/openamp_echo_test/src/baremetal.h new file mode 100644 index 00000000..f1c1c20e --- /dev/null +++ b/lib/sw_apps/openamp_echo_test/src/baremetal.h @@ -0,0 +1,46 @@ +/* + * Copyright (c) 2014, Mentor Graphics Corporation + * All rights reserved. + * + * Copyright (C) 2015 Xilinx, Inc. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of the nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _BAREMETAL_H +#define _BAREMETAL_H + +#include "xil_types.h" +#include "xparameters.h" + +void zynqMP_r5_map_mem_region(u32 addr, u32 size, u32 attrib); +int zynqMP_r5_gic_initialize(); +void zynqMP_r5_irq_isr(); + + +#define INTC_DEVICE_ID XPAR_SCUGIC_0_DEVICE_ID + + +#endif /* _BAREMETAL_H */ diff --git a/lib/sw_apps/openamp_echo_test/src/echo_test.c b/lib/sw_apps/openamp_echo_test/src/echo_test.c new file mode 100644 index 00000000..6130eacd --- /dev/null +++ b/lib/sw_apps/openamp_echo_test/src/echo_test.c @@ -0,0 +1,168 @@ +/* + * Copyright (c) 2014, Mentor Graphics Corporation + * All rights reserved. + * + * Copyright (C) 2015 Xilinx, Inc. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of Mentor Graphics Corporation nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/************************************************************************************** +* This is a sample demonstration application that showcases usage of rpmsg +* This application is meant to run on the remote CPU running bare-metal code. +* It echoes back data that was sent to it by the master core. +* +* The application calls init_system which defines a shared memory region in +* MPU settings for the communication between master and remote using +* zynqMP_r5_map_mem_region API,it also initializes interrupt controller +* GIC and register the interrupt service routine for IPI using +* zynqMP_r5_gic_initialize API. +* +* Echo test calls the remoteproc_resource_init API to create the +* virtio/RPMsg devices required for IPC with the master context. +* Invocation of this API causes remoteproc on the bare-metal to use the +* rpmsg name service announcement feature to advertise the rpmsg channels +* served by the application. +* +* The master receives the advertisement messages and performs the following tasks: +* 1. Invokes the channel created callback registered by the master application +* 2. Responds to remote context with a name service acknowledgement message +* After the acknowledgement is received from master, remoteproc on the bare-metal +* invokes the RPMsg channel-created callback registered by the remote application. +* The RPMsg channel is established at this point. All RPMsg APIs can be used subsequently +* on both sides for run time communications between the master and remote software contexts. +* +* Upon running the master application to send data to remote core, master will +* generate the payload and send to remote (bare-metal) by informing the bare-metal with +* an IPI, the remote will send the data back by master and master will perform a check +* whether the same data is received. Once the application is ran and task by the +* bare-metal application is done, master needs to properly shut down the remote +* processor +* +* To shut down the remote processor, the following steps are performed: +* 1. The master application sends an application-specific shut-down message +* to the remote context +* 2. This bare-metal application cleans up application resources, +* sends a shut-down acknowledge to master, and invokes remoteproc_resource_deinit +* API to de-initialize remoteproc on the bare-metal side. +* 3. On receiving the shut-down acknowledge message, the master application invokes +* the remoteproc_shutdown API to shut down the remote processor and de-initialize +* remoteproc using remoteproc_deinit on its side. +* +**************************************************************************************/ + +#include +#include +#include +#include "open_amp.h" +#include "rsc_table.h" +#include "baremetal.h" +#include "xil_cache.h" +#include "xil_mmu.h" +#include "xstatus.h" +#include "xreg_cortexr5.h" + +#define SHUTDOWN_MSG 0xEF56A55A + +/* + * Shared memory location as defined in linux device tree for remoteproc + * User may need to check with device tree of remoteproc and ensure the + * share memory address is same + */ +#define SHARED_MEMORY 0x3ED00000 +#define SHARED_SIZE 0x400000 /* size of the shared memory*/ + +/* Internal functions */ +static void rpmsg_channel_created(struct rpmsg_channel *rp_chnl); +static void rpmsg_channel_deleted(struct rpmsg_channel *rp_chnl); +static void rpmsg_read_cb(struct rpmsg_channel *, void *, int, void *, unsigned long); +static void init_system(); + +/* Globals */ +static struct rpmsg_channel *app_rp_chnl; +static struct rpmsg_endpoint *rp_ept; +static struct remote_proc *proc = NULL; +static struct rsc_table_info rsc_info; +extern const struct remote_resource_table resources; + +/* Application entry point */ +int main() { + + /* Initialize HW system components */ + init_system(); + + /* + * The data caches are disabled due to some unusual behavior + * Upon running the application second time without rebooting, + * communication channel is not being established. It is a known + * issue and need to be fixed in future. + */ + Xil_DCacheDisable(); + + rsc_info.rsc_tab = (struct resource_table *)&resources; + rsc_info.size = sizeof(resources); + + /* Initialize RPMSG framework */ + remoteproc_resource_init(&rsc_info, rpmsg_channel_created, rpmsg_channel_deleted, rpmsg_read_cb, + &proc); + + while(1) { + __asm__ ( "\ + wfi\n\t" \ + ); + }; + + return 0; +} + +static void rpmsg_channel_created(struct rpmsg_channel *rp_chnl) { + app_rp_chnl = rp_chnl; + rp_ept = rpmsg_create_ept(rp_chnl, rpmsg_read_cb, RPMSG_NULL, + RPMSG_ADDR_ANY); +} + +static void rpmsg_channel_deleted(struct rpmsg_channel *rp_chnl) { + +} + +static void rpmsg_read_cb(struct rpmsg_channel *rp_chnl, void *data, int len, + void * priv, unsigned long src) { + if ((*(int *) data) == SHUTDOWN_MSG) { + remoteproc_resource_deinit(proc); + } else { + /* Send data back to master*/ + rpmsg_send(rp_chnl, data, len); + } +} + +static void init_system() { + + /* configure MPU for shared memory region */ + zynqMP_r5_map_mem_region(SHARED_MEMORY, SHARED_SIZE, NORM_SHARED_NCACHE | PRIV_RW_USER_RW); + + /* Initilaize GIC */ + zynqMP_r5_gic_initialize(); + +} diff --git a/lib/sw_apps/openamp_echo_test/src/lscript.ld b/lib/sw_apps/openamp_echo_test/src/lscript.ld new file mode 100644 index 00000000..8b20e319 --- /dev/null +++ b/lib/sw_apps/openamp_echo_test/src/lscript.ld @@ -0,0 +1,308 @@ +/*******************************************************************/ +/* */ +/* This file is automatically generated by linker script generator.*/ +/* */ +/* Version: */ +/* */ +/* Copyright (c) 2015 Xilinx, Inc. All rights reserved. */ +/* */ +/* Description : Cortex-R5 Linker Script */ +/* */ +/*******************************************************************/ + +_STACK_SIZE = DEFINED(_STACK_SIZE) ? _STACK_SIZE : 0x2000; +_HEAP_SIZE = DEFINED(_HEAP_SIZE) ? _HEAP_SIZE : 0x4000; + +_ABORT_STACK_SIZE = DEFINED(_ABORT_STACK_SIZE) ? _ABORT_STACK_SIZE : 1024; +_SUPERVISOR_STACK_SIZE = DEFINED(_SUPERVISOR_STACK_SIZE) ? _SUPERVISOR_STACK_SIZE : 2048; +_IRQ_STACK_SIZE = DEFINED(_IRQ_STACK_SIZE) ? _IRQ_STACK_SIZE : 1024; +_FIQ_STACK_SIZE = DEFINED(_FIQ_STACK_SIZE) ? _FIQ_STACK_SIZE : 1024; +_UNDEF_STACK_SIZE = DEFINED(_UNDEF_STACK_SIZE) ? _UNDEF_STACK_SIZE : 1024; + +/* Define Memories in the system */ + +MEMORY +{ + ps8_bbram_0_S_AXI_BASEADDR : ORIGIN = 0xFFCC4000, LENGTH = 0x00001000 + ps8_csu_ram_0_S_AXI_BASEADDR : ORIGIN = 0xFFC40000, LENGTH = 0x00008000 + ps8_ocm_ram_0_S_AXI_BASEADDR : ORIGIN = 0xFFFC0000, LENGTH = 0x00020000 + ps8_ocm_ram_1_S_AXI_BASEADDR : ORIGIN = 0xFFFF0000, LENGTH = 0x00010000 + ps8_r5_tcm_ram_0_S_AXI_BASEADDR : ORIGIN = 0x00000050, LENGTH = 0x0001FFB1 +} + +/* Specify the default entry point to the program */ + +/* ENTRY(_boot) */ + +ENTRY(_vector_table) + +/* Define the sections, and where they are mapped in memory */ + +SECTIONS +{ + +.vectors : { + *(.vectors) +} > ps8_ocm_ram_1_S_AXI_BASEADDR + + +_binary_firmware1_start = 0; +_binary_firmware1_end = 0; +_binary_firmware2_start = 0; +_binary_firmware2_end = 0; + +.text : { + *(.boot) + *(.text) + *(.text.*) + *(.gnu.linkonce.t.*) + *(.plt) + *(.gnu_warning) + *(.gcc_execpt_table) + *(.glue_7) + *(.glue_7t) + *(.vfp11_veneer) + *(.ARM.extab) + *(.gnu.linkonce.armextab.*) +} > ps8_ocm_ram_0_S_AXI_BASEADDR + +.init : { + KEEP (*(.init)) +} > ps8_ocm_ram_0_S_AXI_BASEADDR + +.fini : { + KEEP (*(.fini)) +} > ps8_ocm_ram_0_S_AXI_BASEADDR + +.interp : { + KEEP (*(.interp)) +} > ps8_ocm_ram_0_S_AXI_BASEADDR + +.note-ABI-tag : { + KEEP (*(.note-ABI-tag)) +} > ps8_ocm_ram_0_S_AXI_BASEADDR + +.rodata : { + __rodata_start = .; + *(.rodata) + *(.rodata.*) + *(.gnu.linkonce.r.*) + __rodata_end = .; +} > ps8_ocm_ram_0_S_AXI_BASEADDR + +.rodata1 : { + __rodata1_start = .; + *(.rodata1) + *(.rodata1.*) + __rodata1_end = .; +} > ps8_ocm_ram_0_S_AXI_BASEADDR + +.sdata2 : { + __sdata2_start = .; + *(.sdata2) + *(.sdata2.*) + *(.gnu.linkonce.s2.*) + __sdata2_end = .; +} > ps8_ocm_ram_0_S_AXI_BASEADDR + +.sbss2 : { + __sbss2_start = .; + *(.sbss2) + *(.sbss2.*) + *(.gnu.linkonce.sb2.*) + __sbss2_end = .; +} > ps8_ocm_ram_0_S_AXI_BASEADDR + +.data : { + __data_start = .; + *(.data) + *(.data.*) + *(.gnu.linkonce.d.*) + *(.jcr) + *(.got) + *(.got.plt) + __data_end = .; +} > ps8_ocm_ram_0_S_AXI_BASEADDR + +.data1 : { + __data1_start = .; + *(.data1) + *(.data1.*) + __data1_end = .; +} > ps8_ocm_ram_0_S_AXI_BASEADDR + +.got : { + *(.got) +} > ps8_ocm_ram_0_S_AXI_BASEADDR + +.ctors : { + __CTOR_LIST__ = .; + ___CTORS_LIST___ = .; + KEEP (*crtbegin.o(.ctors)) + KEEP (*(EXCLUDE_FILE(*crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + __CTOR_END__ = .; + ___CTORS_END___ = .; +} > ps8_ocm_ram_0_S_AXI_BASEADDR + +.dtors : { + __DTOR_LIST__ = .; + ___DTORS_LIST___ = .; + KEEP (*crtbegin.o(.dtors)) + KEEP (*(EXCLUDE_FILE(*crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + __DTOR_END__ = .; + ___DTORS_END___ = .; +} > ps8_ocm_ram_0_S_AXI_BASEADDR + +.fixup : { + __fixup_start = .; + *(.fixup) + __fixup_end = .; +} > ps8_ocm_ram_0_S_AXI_BASEADDR + +.eh_frame : { + *(.eh_frame) +} > ps8_ocm_ram_0_S_AXI_BASEADDR + +.eh_framehdr : { + __eh_framehdr_start = .; + *(.eh_framehdr) + __eh_framehdr_end = .; +} > ps8_ocm_ram_0_S_AXI_BASEADDR + +.gcc_except_table : { + *(.gcc_except_table) +} > ps8_ocm_ram_0_S_AXI_BASEADDR + +.mmu_tbl (ALIGN(16384)) : { + __mmu_tbl_start = .; + *(.mmu_tbl) + __mmu_tbl_end = .; +} > ps8_ocm_ram_0_S_AXI_BASEADDR + +.ARM.exidx : { + __exidx_start = .; + *(.ARM.exidx*) + *(.gnu.linkonce.armexidix.*.*) + __exidx_end = .; +} > ps8_ocm_ram_0_S_AXI_BASEADDR + +.preinit_array : { + __preinit_array_start = .; + KEEP (*(SORT(.preinit_array.*))) + KEEP (*(.preinit_array)) + __preinit_array_end = .; +} > ps8_ocm_ram_0_S_AXI_BASEADDR + +.init_array : { + __init_array_start = .; + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array)) + __init_array_end = .; +} > ps8_ocm_ram_0_S_AXI_BASEADDR + +.fini_array : { + __fini_array_start = .; + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array)) + __fini_array_end = .; +} > ps8_ocm_ram_0_S_AXI_BASEADDR + +.ARM.attributes : { + __ARM.attributes_start = .; + *(.ARM.attributes) + __ARM.attributes_end = .; +} > ps8_ocm_ram_0_S_AXI_BASEADDR + +.sdata : { + __sdata_start = .; + *(.sdata) + *(.sdata.*) + *(.gnu.linkonce.s.*) + __sdata_end = .; +} > ps8_ocm_ram_0_S_AXI_BASEADDR + +.sbss (NOLOAD) : { + __sbss_start = .; + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.sb.*) + __sbss_end = .; +} > ps8_ocm_ram_0_S_AXI_BASEADDR + +.tdata : { + __tdata_start = .; + *(.tdata) + *(.tdata.*) + *(.gnu.linkonce.td.*) + __tdata_end = .; +} > ps8_ocm_ram_0_S_AXI_BASEADDR + +.tbss : { + __tbss_start = .; + *(.tbss) + *(.tbss.*) + *(.gnu.linkonce.tb.*) + __tbss_end = .; +} > ps8_ocm_ram_0_S_AXI_BASEADDR + +.bss (NOLOAD) : { + . = ALIGN(4); + __bss_start__ = .; + *(.bss) + *(.bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; +} > ps8_ocm_ram_0_S_AXI_BASEADDR + +_SDA_BASE_ = __sdata_start + ((__sbss_end - __sdata_start) / 2 ); + +_SDA2_BASE_ = __sdata2_start + ((__sbss2_end - __sdata2_start) / 2 ); + +/* Generate Stack and Heap definitions */ + +.heap (NOLOAD) : { + . = ALIGN(16); + _heap = .; + HeapBase = .; + _heap_start = .; + . += _HEAP_SIZE; + _heap_end = .; + HeapLimit = .; +} > ps8_ocm_ram_1_S_AXI_BASEADDR + +.stack (NOLOAD) : { + . = ALIGN(16); + _stack_end = .; + . += _STACK_SIZE; + _stack = .; + __stack = _stack; + . = ALIGN(16); + _irq_stack_end = .; + . += _IRQ_STACK_SIZE; + __irq_stack = .; + _supervisor_stack_end = .; + . += _SUPERVISOR_STACK_SIZE; + . = ALIGN(16); + __supervisor_stack = .; + _abort_stack_end = .; + . += _ABORT_STACK_SIZE; + . = ALIGN(16); + __abort_stack = .; + _fiq_stack_end = .; + . += _FIQ_STACK_SIZE; + . = ALIGN(16); + __fiq_stack = .; + _undef_stack_end = .; + . += _UNDEF_STACK_SIZE; + . = ALIGN(16); + __undef_stack = .; +} > ps8_ocm_ram_1_S_AXI_BASEADDR + +_end = .; +} diff --git a/lib/sw_apps/openamp_echo_test/src/platform.c b/lib/sw_apps/openamp_echo_test/src/platform.c new file mode 100644 index 00000000..19e7850a --- /dev/null +++ b/lib/sw_apps/openamp_echo_test/src/platform.c @@ -0,0 +1,119 @@ +/* + * Copyright (c) 2014, Mentor Graphics Corporation + * All rights reserved. + * + * Copyright (C) 2015 Xilinx, Inc. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of Mentor Graphics Corporation nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/************************************************************************** + * FILE NAME + * + * platform.c + * + * DESCRIPTION + * + * This file is the Implementation of IPC hardware layer interface + * for Xilinx ZynqMP platform. + * + **************************************************************************/ + +#include "platform.h" +#include "xil_io.h" +/*--------------------------- Globals ---------------------------------- */ +struct hil_platform_ops proc_ops = { + .enable_interrupt = _enable_interrupt, + .reg_ipi_after_deinit = _reg_ipi_after_deinit, + .notify = _notify, + .boot_cpu = _boot_cpu, + .shutdown_cpu = _shutdown_cpu, +}; + + +int _enable_interrupt(struct proc_vring *vring_hw) { + + if (vring_hw->intr_info.vect_id < 0) + return 0; + + /* Register ISR*/ + env_register_isr(vring_hw->intr_info.vect_id, vring_hw, platform_isr); + + /* Enable IPI interrupt */ + struct ipi_info *chn_ipi_info = (struct ipi_info *)(vring_hw->intr_info.data); + Xil_Out32((chn_ipi_info->ipi_base_addr + IPI_IER_OFFSET), chn_ipi_info->ipi_chn_mask); + /* Enable the interrupts */ + env_enable_interrupt(vring_hw->intr_info.vect_id, + vring_hw->intr_info.priority, + vring_hw->intr_info.trigger_type); + return 0; +} + +void _reg_ipi_after_deinit(struct proc_vring *vring_hw) { + struct ipi_info *chn_ipi_info = (struct ipi_info *)(vring_hw->intr_info.data); + + if (vring_hw->intr_info.vect_id < 0) { + return; + } + env_update_isr(vring_hw->intr_info.vect_id, chn_ipi_info, deinit_isr); + +} + +void _notify(int cpu_id, struct proc_intr *intr_info) { + + struct ipi_info *chn_ipi_info = (struct ipi_info *)(intr_info->data); + if (chn_ipi_info == NULL) + return; + platform_dcache_all_flush(); + /* Trigger IPI */ + Xil_Out32((chn_ipi_info->ipi_base_addr + IPI_TRIG_OFFSET), chn_ipi_info->ipi_chn_mask); +} + +int _boot_cpu(int cpu_id, unsigned int load_addr) { + return -1; +} + +void _shutdown_cpu(int cpu_id) { + return; +} + +void platform_isr(int vect_id, void *data) { + struct proc_vring *vring_hw = (struct proc_vring *) data; + struct ipi_info *chn_ipi_info = (struct ipi_info *)(vring_hw->intr_info.data); + unsigned int ipi_intr_status = (unsigned int)Xil_In32(chn_ipi_info->ipi_base_addr + IPI_ISR_OFFSET); + if ((ipi_intr_status & chn_ipi_info->ipi_chn_mask)) { + platform_dcache_all_flush(); + hil_isr(vring_hw); + Xil_Out32((chn_ipi_info->ipi_base_addr + IPI_ISR_OFFSET), chn_ipi_info->ipi_chn_mask); + } +} + +void deinit_isr(int vect_id, void *data) { + struct ipi_info *chn_ipi_info = (struct ipi_info *)data; + unsigned int ipi_intr_status = (unsigned int)Xil_In32(chn_ipi_info->ipi_base_addr + IPI_ISR_OFFSET); + if ((ipi_intr_status & chn_ipi_info->ipi_chn_mask)) { + Xil_Out32((chn_ipi_info->ipi_base_addr + IPI_ISR_OFFSET), chn_ipi_info->ipi_chn_mask); + } +} diff --git a/lib/sw_apps/openamp_echo_test/src/platform.h b/lib/sw_apps/openamp_echo_test/src/platform.h new file mode 100644 index 00000000..d7204fd9 --- /dev/null +++ b/lib/sw_apps/openamp_echo_test/src/platform.h @@ -0,0 +1,100 @@ +/* + * Copyright (c) 2014, Mentor Graphics Corporation + * All rights reserved. + * + * Copyright (C) 2015 Xilinx, Inc. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of Mentor Graphics Corporation nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef PLATFORM_H_ +#define PLATFORM_H_ + +#include +#include "hil.h" +#include "xil_cache.h" +/* ------------------------- Macros --------------------------*/ + +/********************/ +/* Register offsets */ +/********************/ + +/* -- FIX ME: ipi info is to be defined -- */ +struct ipi_info { + uint32_t ipi_base_addr; + uint32_t ipi_chn_mask; +}; + +int _enable_interrupt(struct proc_vring *vring_hw); +void _reg_ipi_after_deinit(struct proc_vring *vring_hw); +void _notify(int cpu_id, struct proc_intr *intr_info); +int _boot_cpu(int cpu_id, unsigned int load_addr); +void _shutdown_cpu(int cpu_id); +void platform_isr(int vect_id, void *data); +void deinit_isr(int vect_id, void *data); + +/* define function macros for OpenAMP API */ +#define platform_cache_all_flush_invalidate() \ + { \ + Xil_DCacheFlush(); \ + Xil_DCacheInvalidate(); \ + Xil_ICacheInvalidate(); \ + } + +#define platform_cache_disable() \ + { \ + Xil_DCacheDisable(); \ + Xil_ICacheDisable(); \ + } + +#define platform_dcache_all_flush() { Xil_DCacheFlush(); } + +#define platform_dcache_flush_range(addr, len) { Xil_DCacheFlushRange(addr, len); } + +#define platform_interrupt_enable(...) zynqMP_r5_gic_interrupt_enable(__VA_ARGS__) +#define platform_interrupt_disable(...) zynqMP_r5_gic_interrupt_disable(__VA_ARGS__) +#define platform_map_mem_region(...) + +#define platform_vatopa(addr) ((unsigned long)addr) +#define platform_patova(addr) ((void *)addr) +/* IPI REGs OFFSET */ +#define IPI_TRIG_OFFSET 0x00000000 /* IPI trigger register offset */ +#define IPI_OBS_OFFSET 0x00000004 /* IPI observation register offset */ +#define IPI_ISR_OFFSET 0x00000010 /* IPI interrupt status register offset */ +#define IPI_IMR_OFFSET 0x00000014 /* IPI interrupt mask register offset */ +#define IPI_IER_OFFSET 0x00000018 /* IPI interrupt enable register offset */ +#define IPI_IDR_OFFSET 0x0000001C /* IPI interrupt disable register offset */ + +/* IPC Device parameters */ +#define SHM_ADDR (void *)0x3ED08000 +#define SHM_SIZE 0x00200000 +#define IPI_BASEADDR 0xff310000 +#define IPI_CHN_BITMASK 0x00000001 /* IPI channel bit mask APU<->RPU0 */ +#define VRING0_IPI_INTR_VECT -1 +#define VRING1_IPI_INTR_VECT 79 +#define MASTER_CPU_ID 0 +#define REMOTE_CPU_ID 1 + +#endif /* PLATFORM_H_ */ diff --git a/lib/sw_apps/openamp_echo_test/src/platform_info.c b/lib/sw_apps/openamp_echo_test/src/platform_info.c new file mode 100644 index 00000000..6c6e9c7e --- /dev/null +++ b/lib/sw_apps/openamp_echo_test/src/platform_info.c @@ -0,0 +1,229 @@ +/* + * Copyright (c) 2014, Mentor Graphics Corporation + * All rights reserved. + * + * Copyright (C) 2015 Xilinx, Inc. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of Mentor Graphics Corporation nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/************************************************************************** + * FILE NAME + * + * platform_info.c + * + * DESCRIPTION + * + * This file implements APIs to get platform specific + * information for OpenAMP. + * + **************************************************************************/ + +#include "platform.h" + +/* Reference implementation that show cases platform_get_cpu_info and + platform_get_for_firmware API implementation for Bare metal environment */ + +extern struct hil_platform_ops proc_ops; + +static struct ipi_info chn_ipi_info = {IPI_BASEADDR, IPI_CHN_BITMASK}; +/** + * This array provides definition of CPU nodes for master and remote + * context. It contains two nodes because the same file is intended + * to use with both master and remote configurations. On zynq platform + * only one node definition is required for master/remote as there + * are only two cores present in the platform. + * + * Only platform specific info is populated here. Rest of information + * is obtained during resource table parsing.The platform specific + * information includes; + * + * -CPU ID + * -Shared Memory + * -Interrupts + * -Channel info. + * + * Although the channel info is not platform specific information + * but it is convenient to keep it in HIL so that user can easily + * provide it without modifying the generic part. + * + * It is good idea to define hil_proc structure with platform + * specific fields populated as this can be easily copied to hil_proc + * structure passed as parameter in platform_get_processor_info. The + * other option is to populate the required structures individually + * and copy them one by one to hil_proc structure in platform_get_processor_info + * function. The first option is adopted here. + * + * + * 1) First node in the array is intended for the remote contexts and it + * defines Master CPU ID, shared memory, interrupts info, number of channels + * and there names. This node defines only one channel + * "rpmsg-openamp-demo-channel". + * + * 2)Second node is required by the master and it defines remote CPU ID, + * shared memory and interrupts info. In general no channel info is required by the + * Master node, however in bare-metal master and linux remote case the linux + * rpmsg bus driver behaves as master so the rpmsg driver on linux side still needs + * channel info. This information is not required by the masters for bare-metal + * remotes. + * + */ + +struct hil_proc proc_table []= +{ + + /* CPU node for remote context */ + { + /* CPU ID of master */ + MASTER_CPU_ID, + + /* Shared memory info - Last field is not used currently */ + { + SHM_ADDR, SHM_SIZE, 0x00 + }, + + /* VirtIO device info */ + { + /* Leave these three fields empty as these are obtained from rsc + * table. + */ + 0, 0, 0, + + /* Vring info */ + { + + { + /* Provide only vring interrupts info here. Other fields are + * obtained from the resource table so leave them empty. + */ + NULL, NULL, 0, 0, + { + VRING0_IPI_INTR_VECT,0x1006,1,(void *)(&chn_ipi_info), + } + }, + { + NULL, NULL, 0, 0, + { + VRING1_IPI_INTR_VECT,0x1006,1,(void *)(&chn_ipi_info), + } + } + } + }, + + /* Number of RPMSG channels */ + 1, + + /* RPMSG channel info - Only channel name is expected currently */ + { + {"rpmsg-openamp-demo-channel"} + }, + + /* HIL platform ops table. */ + &proc_ops, + + /* Next three fields are for future use only */ + 0, + 0, + NULL + }, + + /* CPU node for remote context */ + { + /* CPU ID of remote */ + REMOTE_CPU_ID, + + /* Shared memory info - Last field is not used currently */ + { + SHM_ADDR, SHM_SIZE, 0x00 + }, + + /* VirtIO device info */ + { + 0, 0, 0, + { + { + /* Provide vring interrupts info here. Other fields are obtained + * from the rsc table so leave them empty. + */ + NULL, NULL, 0, 0, + { + VRING0_IPI_INTR_VECT,0x1006,1,(void *)(&chn_ipi_info) + } + }, + { + NULL, NULL, 0, 0, + { + VRING1_IPI_INTR_VECT,0x1006,1,(void *)(&chn_ipi_info) + } + } + } + }, + + /* Number of RPMSG channels */ + 1, + + /* RPMSG channel info - Only channel name is expected currently */ + { + {"rpmsg-openamp-demo-channel"} + }, + + /* HIL platform ops table. */ + &proc_ops, + + /* Next three fields are for future use only */ + 0, + 0, + NULL + } +}; + +/** + * platform_get_processor_info + * + * Copies the target info from the user defined data structures to + * HIL proc data structure.In case of remote contexts this function + * is called with the reserved CPU ID HIL_RSVD_CPU_ID, because for + * remotes there is only one master. + * + * @param proc - HIL proc to populate + * @param cpu_id - CPU ID + * + * return - status of execution + */ +int platform_get_processor_info(struct hil_proc *proc , int cpu_id) { + int idx; + for(idx = 0; idx < sizeof(proc_table)/sizeof(struct hil_proc); idx++) { + if((cpu_id == HIL_RSVD_CPU_ID) || (proc_table[idx].cpu_id == cpu_id) ) { + env_memcpy(proc,&proc_table[idx], sizeof(struct hil_proc)); + return 0; + } + } + return -1; +} + +int platform_get_processor_for_fw(char *fw_name) { + + return 1; +} diff --git a/lib/sw_apps/openamp_echo_test/src/rsc_table.c b/lib/sw_apps/openamp_echo_test/src/rsc_table.c new file mode 100644 index 00000000..cd1a7897 --- /dev/null +++ b/lib/sw_apps/openamp_echo_test/src/rsc_table.c @@ -0,0 +1,104 @@ +/* + * Copyright (c) 2014, Mentor Graphics Corporation + * All rights reserved. + * + * Copyright (C) 2015 Xilinx, Inc. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of Mentor Graphics Corporation nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* This file populates resource table for BM remote + * for use by the Linux Master */ + +#include "open_amp.h" +#include "rsc_table.h" + +/* Place resource table in special ELF section */ +#define __section(S) __attribute__((__section__(#S))) +#define __resource __section(.resource_table) + +#define RPMSG_IPU_C0_FEATURES 1 + +/* VirtIO rpmsg device id */ +#define VIRTIO_ID_RPMSG_ 7 + +/* Remote supports Name Service announcement */ +#define VIRTIO_RPMSG_F_NS 0 + +#define OCM_0_START 0xFFFC0000 +#define OCM_0_LEN 0x20000 +#define OCM_1_START 0xFFFF0000 +#define OCM_1_LEN 0x10000 +#define TCM_0_START_DA 0x00000000 +#define TCM_0_LEN 0x10000 +#define TCM_0_START_PA 0xFFE00000 +#define TCM_1_START_DA 0x00020000 +#define TCM_1_LEN 0x10000 +#define TCM_1_START_PA 0xFFE40000 +#define NUM_VRINGS 0x02 +#define VRING_ALIGN 0x1000 +#define RING_TX 0x3ED00000 +#define RING_RX 0x3ED04000 +#define VRING_SIZE 256 + +#define NUM_TABLE_ENTRIES 3 +#define CARVEOUT_SRC_OFFSETS offsetof(struct remote_resource_table, ocm_0_cout), \ + offsetof(struct remote_resource_table, ocm_1_cout), + +#define CARVEOUT_SRC {RSC_CARVEOUT, OCM_0_START, OCM_0_START, OCM_0_LEN, 0, 0, "OCM0_COUT",}, \ + {RSC_CARVEOUT, OCM_1_START, OCM_1_START, OCM_1_LEN, 0, 0, "ELF_DATA_COUT",}, + + +const struct remote_resource_table __resource resources = +{ + /* Version */ + 1, + + /* NUmber of table entries */ + NUM_TABLE_ENTRIES, + /* reserved fields */ + { 0, 0,}, + + /* Offsets of rsc entries */ + { + CARVEOUT_SRC_OFFSETS + offsetof(struct remote_resource_table, rpmsg_vdev), + }, + + /* End of ELF file */ + CARVEOUT_SRC + + /* Virtio device entry */ + { RSC_VDEV, VIRTIO_ID_RPMSG_, 0, RPMSG_IPU_C0_FEATURES, 0, 0, 0, NUM_VRINGS, {0, 0}, + }, + + /* Vring rsc entry - part of vdev rsc entry */ + { + RING_TX, VRING_ALIGN, VRING_SIZE, 1, 0 + }, + { + RING_RX, VRING_ALIGN, VRING_SIZE, 2, 0 + }, +}; diff --git a/lib/sw_apps/openamp_echo_test/src/rsc_table.h b/lib/sw_apps/openamp_echo_test/src/rsc_table.h new file mode 100644 index 00000000..258b9e7f --- /dev/null +++ b/lib/sw_apps/openamp_echo_test/src/rsc_table.h @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2014, Mentor Graphics Corporation + * All rights reserved. + * + * Copyright (C) 2015 Xilinx, Inc. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of Mentor Graphics Corporation nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* This file populates resource table for BM remote + * for use by the Linux Master */ + +#include +#include "open_amp.h" + +#define NO_RESOURCE_ENTRIES 8 + +/* Resource table for the given remote */ +struct remote_resource_table { + unsigned int version; + unsigned int num; + unsigned int reserved[2]; + unsigned int offset[NO_RESOURCE_ENTRIES]; + /* text carve out entry */ + + struct fw_rsc_carveout ocm_0_cout; + struct fw_rsc_carveout ocm_1_cout; + /* rpmsg vdev entry */ + struct fw_rsc_vdev rpmsg_vdev; + struct fw_rsc_vdev_vring rpmsg_vring0; + struct fw_rsc_vdev_vring rpmsg_vring1; +};