diff --git a/XilinxProcessorIPLib/drivers/emacps/doc/html/api/annotated.html b/XilinxProcessorIPLib/drivers/emacps/doc/html/api/annotated.html index b41535c9..88d4b488 100755 --- a/XilinxProcessorIPLib/drivers/emacps/doc/html/api/annotated.html +++ b/XilinxProcessorIPLib/drivers/emacps/doc/html/api/annotated.html @@ -2,39 +2,28 @@ - Xilinx Driver emacps v2_1: Class List + Class List - +

Xilinx Processor IP Library

Software Drivers
- - - -
+ +
+
+
+

Class List

Here are the classes, structs, unions and interfaces with brief descriptions:
XEmacPs
XEmacPs_BdRing
XEmacPs_Config
-
-

-Copyright © 1995-2014 Xilinx, Inc. All rights reserved. -

- - +Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. diff --git a/XilinxProcessorIPLib/drivers/emacps/doc/html/api/classes.html b/XilinxProcessorIPLib/drivers/emacps/doc/html/api/classes.html deleted file mode 100755 index bcedaf8d..00000000 --- a/XilinxProcessorIPLib/drivers/emacps/doc/html/api/classes.html +++ /dev/null @@ -1,39 +0,0 @@ - - - - - Xilinx Driver emacps v2_1: Alphabetical List - - - -

Xilinx Processor IP Library

-Software Drivers -
- - - -
-

Class Index

X
- -
  X  
-		XEmacPs   XEmacPs_BdRing   XEmacPs_Config   
X
-
-

-Copyright © 1995-2014 Xilinx, Inc. All rights reserved. -

- - diff --git a/XilinxProcessorIPLib/drivers/emacps/doc/html/api/files.html b/XilinxProcessorIPLib/drivers/emacps/doc/html/api/files.html index 7d2a9ee6..1cb0914c 100755 --- a/XilinxProcessorIPLib/drivers/emacps/doc/html/api/files.html +++ b/XilinxProcessorIPLib/drivers/emacps/doc/html/api/files.html @@ -2,31 +2,25 @@ - Xilinx Driver emacps v2_1: File Index + File Index - +

Xilinx Processor IP Library

Software Drivers
- - - -
+ +
+
+
+

File List

Here is a list of all files with brief descriptions: @@ -40,9 +34,4 @@
xemacps.c
xemacps.h
xemacps_intr.c
xemacps_sinit.c
-
-

-Copyright © 1995-2014 Xilinx, Inc. All rights reserved. -

- - +Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. diff --git a/XilinxProcessorIPLib/drivers/emacps/doc/html/api/functions.html b/XilinxProcessorIPLib/drivers/emacps/doc/html/api/functions.html index 0c725b1c..4fddb3fd 100755 --- a/XilinxProcessorIPLib/drivers/emacps/doc/html/api/functions.html +++ b/XilinxProcessorIPLib/drivers/emacps/doc/html/api/functions.html @@ -2,207 +2,110 @@ - Xilinx Driver emacps v2_1: Class Members + Class Members - +

Xilinx Processor IP Library

Software Drivers
- - -

+

- +
u32 XEmacPs::IsReadyu32 XEmacPs::IsReady
+

+

-
- +

+

- +
u32 XEmacPs::IsStartedu32 XEmacPs::IsStarted
+

+

-
- +

+

- +
u32 XEmacPs::Optionsu32 XEmacPs::Options
+

+

-
- +

+

- +
XEmacPs_Handler XEmacPs::RecvHandlerXEmacPs_Handler XEmacPs::RecvHandler
+

+

-
- +

+

- +
void* XEmacPs::RecvRefvoid* XEmacPs::RecvRef
+

+

-
- +

+

- +
XEmacPs_BdRing XEmacPs::RxBdRingXEmacPs_BdRing XEmacPs::RxBdRing
+

+

-
- +

+

- +
XEmacPs_Handler XEmacPs::SendHandlerXEmacPs_Handler XEmacPs::SendHandler
+

+

-
- +

+

- +
void* XEmacPs::SendRefvoid* XEmacPs::SendRef
+

+

-
- +

+

- +
XEmacPs_BdRing XEmacPs::TxBdRingXEmacPs_BdRing XEmacPs::TxBdRing
+

+

-
-
The documentation for this struct was generated from the following file: - -

-Copyright © 1995-2014 Xilinx, Inc. All rights reserved. -

- - +

+

The documentation for this struct was generated from the following file: +Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. diff --git a/XilinxProcessorIPLib/drivers/emacps/doc/html/api/struct_x_emac_ps___bd_ring-members.html b/XilinxProcessorIPLib/drivers/emacps/doc/html/api/struct_x_emac_ps___bd_ring-members.html index 48f14c87..e4f29afa 100755 --- a/XilinxProcessorIPLib/drivers/emacps/doc/html/api/struct_x_emac_ps___bd_ring-members.html +++ b/XilinxProcessorIPLib/drivers/emacps/doc/html/api/struct_x_emac_ps___bd_ring-members.html @@ -2,52 +2,41 @@ - Xilinx Driver emacps v2_1: Member List + Member List - +

Xilinx Processor IP Library

Software Drivers
- - - -
-

XEmacPs_BdRing Member List

This is the complete list of members for XEmacPs_BdRing, including all inherited members. - - - - - - - - - - - - - - - - - -
AllCntXEmacPs_BdRing
BaseBdAddrXEmacPs_BdRing
BdaRestartXEmacPs_BdRing
FreeCntXEmacPs_BdRing
FreeHeadXEmacPs_BdRing
HighBdAddrXEmacPs_BdRing
HwCntXEmacPs_BdRing
HwHeadXEmacPs_BdRing
HwTailXEmacPs_BdRing
LengthXEmacPs_BdRing
PhysBaseAddrXEmacPs_BdRing
PostCntXEmacPs_BdRing
PostHeadXEmacPs_BdRing
PreCntXEmacPs_BdRing
PreHeadXEmacPs_BdRing
RunStateXEmacPs_BdRing
SeparationXEmacPs_BdRing
-

-Copyright © 1995-2014 Xilinx, Inc. All rights reserved. -

- - + +
+
+
+
+

XEmacPs_BdRing Member List

This is the complete list of members for XEmacPs_BdRing, including all inherited members.

+ + + + + + + + + + + + + + + + + +
AllCntXEmacPs_BdRing
BaseBdAddrXEmacPs_BdRing
BdaRestartXEmacPs_BdRing
FreeCntXEmacPs_BdRing
FreeHeadXEmacPs_BdRing
HighBdAddrXEmacPs_BdRing
HwCntXEmacPs_BdRing
HwHeadXEmacPs_BdRing
HwTailXEmacPs_BdRing
LengthXEmacPs_BdRing
PhysBaseAddrXEmacPs_BdRing
PostCntXEmacPs_BdRing
PostHeadXEmacPs_BdRing
PreCntXEmacPs_BdRing
PreHeadXEmacPs_BdRing
RunStateXEmacPs_BdRing
SeparationXEmacPs_BdRing
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. diff --git a/XilinxProcessorIPLib/drivers/emacps/doc/html/api/struct_x_emac_ps___bd_ring.html b/XilinxProcessorIPLib/drivers/emacps/doc/html/api/struct_x_emac_ps___bd_ring.html index 47ed453b..b6c9dc25 100755 --- a/XilinxProcessorIPLib/drivers/emacps/doc/html/api/struct_x_emac_ps___bd_ring.html +++ b/XilinxProcessorIPLib/drivers/emacps/doc/html/api/struct_x_emac_ps___bd_ring.html @@ -2,303 +2,324 @@ - Xilinx Driver emacps v2_1: XEmacPs_BdRing Struct Reference + XEmacPs_BdRing Struct Reference - +

Xilinx Processor IP Library

Software Drivers
- - - -
-

XEmacPs_BdRing Struct Reference

-

#include <xemacps_bdring.h>

- -

List of all members.

+ +
+
+
+
+

XEmacPs_BdRing Struct Reference

#include <xemacps_bdring.h> +

+List of all members.

Detailed Description

+This is an internal structure used to maintain the DMA list +

- - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

Public Attributes

u32 PhysBaseAddr
u32 BaseBdAddr
u32 HighBdAddr
u32 Length
u32 RunState
u32 Separation
XEmacPs_Bd * FreeHead
XEmacPs_Bd * PreHead
XEmacPs_Bd * HwHead
XEmacPs_Bd * HwTail
XEmacPs_Bd * PostHead
XEmacPs_Bd * BdaRestart
unsigned HwCnt
unsigned PreCnt
unsigned FreeCnt
unsigned PostCnt
unsigned AllCnt

Public Attributes

u32 PhysBaseAddr
u32 BaseBdAddr
u32 HighBdAddr
u32 Length
u32 RunState
u32 Separation
XEmacPs_Bd * FreeHead
XEmacPs_Bd * PreHead
XEmacPs_Bd * HwHead
XEmacPs_Bd * HwTail
XEmacPs_Bd * PostHead
XEmacPs_Bd * BdaRestart
unsigned HwCnt
unsigned PreCnt
unsigned FreeCnt
unsigned PostCnt
unsigned AllCnt
-

Detailed Description

-

This is an internal structure used to maintain the DMA list

-

Member Data Documentation

- +

Member Data Documentation

+
- +
unsigned XEmacPs_BdRing::AllCntunsigned XEmacPs_BdRing::AllCnt
-

Total Number of BDs for channel

+

+Total Number of BDs for channel

-
- +

+

- +
u32 XEmacPs_BdRing::BaseBdAddru32 XEmacPs_BdRing::BaseBdAddr
-

Virtual address of 1st BD in list

+

+Virtual address of 1st BD in list

-
- +

+

- +
XEmacPs_Bd* XEmacPs_BdRing::BdaRestartXEmacPs_Bd* XEmacPs_BdRing::BdaRestart
-

BDA to load when channel is started

+

+BDA to load when channel is started

-
- +

+

- +
unsigned XEmacPs_BdRing::FreeCntunsigned XEmacPs_BdRing::FreeCnt
-

Number of allocatable BDs in the free group

+

+Number of allocatable BDs in the free group

-
- +

+

- +
XEmacPs_Bd* XEmacPs_BdRing::FreeHeadXEmacPs_Bd* XEmacPs_BdRing::FreeHead
-

First BD in the free group

+

+First BD in the free group

-
- +

+

- +
u32 XEmacPs_BdRing::HighBdAddru32 XEmacPs_BdRing::HighBdAddr
-

Virtual address of last BD in the list

+

+Virtual address of last BD in the list

-
- +

+

- +
unsigned XEmacPs_BdRing::HwCntunsigned XEmacPs_BdRing::HwCnt
-

Number of BDs in work group

+

+Number of BDs in work group

-
- +

+

- +
XEmacPs_Bd* XEmacPs_BdRing::HwHeadXEmacPs_Bd* XEmacPs_BdRing::HwHead
-

First BD in the work group

+

+First BD in the work group

-
- +

+

- +
XEmacPs_Bd* XEmacPs_BdRing::HwTailXEmacPs_Bd* XEmacPs_BdRing::HwTail
-

Last BD in the work group

+

+Last BD in the work group

-
- +

+

- +
u32 XEmacPs_BdRing::Lengthu32 XEmacPs_BdRing::Length
-

Total size of ring in bytes

+

+Total size of ring in bytes

-
- +

+

- +
u32 XEmacPs_BdRing::PhysBaseAddru32 XEmacPs_BdRing::PhysBaseAddr
-

Physical address of 1st BD in list

+

+Physical address of 1st BD in list

-
- +

+

- +
unsigned XEmacPs_BdRing::PostCntunsigned XEmacPs_BdRing::PostCnt
-

Number of BDs in post-work group

+

+Number of BDs in post-work group

-
- +

+

- +
XEmacPs_Bd* XEmacPs_BdRing::PostHeadXEmacPs_Bd* XEmacPs_BdRing::PostHead
-

First BD in the post-work group

+

+First BD in the post-work group

-
- +

+

- +
unsigned XEmacPs_BdRing::PreCntunsigned XEmacPs_BdRing::PreCnt
-

Number of BDs in pre-work group

+

+Number of BDs in pre-work group

-
- +

+

- +
XEmacPs_Bd* XEmacPs_BdRing::PreHeadXEmacPs_Bd* XEmacPs_BdRing::PreHead
-

First BD in the pre-work group

+

+First BD in the pre-work group

-
- +

+

- +
u32 XEmacPs_BdRing::RunStateu32 XEmacPs_BdRing::RunState
-

Flag to indicate DMA is started

+

+Flag to indicate DMA is started

-
- +

+

- +
u32 XEmacPs_BdRing::Separationu32 XEmacPs_BdRing::Separation
-

Number of bytes between the starting address of adjacent BDs

+

+Number of bytes between the starting address of adjacent BDs

-
-
The documentation for this struct was generated from the following file: - -

-Copyright © 1995-2014 Xilinx, Inc. All rights reserved. -

- - - +

+

The documentation for this struct was generated from the following file: +Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. diff --git a/XilinxProcessorIPLib/drivers/emacps/doc/html/api/struct_x_emac_ps___config-members.html b/XilinxProcessorIPLib/drivers/emacps/doc/html/api/struct_x_emac_ps___config-members.html index cb91f24e..247c1a18 100755 --- a/XilinxProcessorIPLib/drivers/emacps/doc/html/api/struct_x_emac_ps___config-members.html +++ b/XilinxProcessorIPLib/drivers/emacps/doc/html/api/struct_x_emac_ps___config-members.html @@ -2,37 +2,26 @@ - Xilinx Driver emacps v2_1: Member List + Member List - +

Xilinx Processor IP Library

Software Drivers
- - - -
-

XEmacPs_Config Member List

This is the complete list of members for XEmacPs_Config, including all inherited members. - - -
BaseAddressXEmacPs_Config
DeviceIdXEmacPs_Config
-

-Copyright © 1995-2014 Xilinx, Inc. All rights reserved. -

- - + +
+
+
+
+

XEmacPs_Config Member List

This is the complete list of members for XEmacPs_Config, including all inherited members.

+ + +
BaseAddressXEmacPs_Config
DeviceIdXEmacPs_Config
Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. diff --git a/XilinxProcessorIPLib/drivers/emacps/doc/html/api/struct_x_emac_ps___config.html b/XilinxProcessorIPLib/drivers/emacps/doc/html/api/struct_x_emac_ps___config.html index a13e2660..b7a6d067 100755 --- a/XilinxProcessorIPLib/drivers/emacps/doc/html/api/struct_x_emac_ps___config.html +++ b/XilinxProcessorIPLib/drivers/emacps/doc/html/api/struct_x_emac_ps___config.html @@ -2,78 +2,69 @@ - Xilinx Driver emacps v2_1: XEmacPs_Config Struct Reference + XEmacPs_Config Struct Reference - +

Xilinx Processor IP Library

Software Drivers
- - - -
-

XEmacPs_Config Struct Reference

-

#include <xemacps.h>

- -

List of all members.

+ +
+
+
+
+

XEmacPs_Config Struct Reference

#include <xemacps.h> +

+List of all members.

Detailed Description

+This typedef contains configuration information for a device. +

- - - + + + + + +

Public Attributes

u16 DeviceId
u32 BaseAddress

Public Attributes

u16 DeviceId
u32 BaseAddress
-

Detailed Description

-

This typedef contains configuration information for a device.

-

Member Data Documentation

- +

Member Data Documentation

+
- +
u32 XEmacPs_Config::BaseAddressu32 XEmacPs_Config::BaseAddress
-

Physical base address of IPIF registers

+

+Physical base address of IPIF registers

-
- +

+

- +
u16 XEmacPs_Config::DeviceIdu16 XEmacPs_Config::DeviceId
-

Unique ID of device

+

+Unique ID of device

-
-
The documentation for this struct was generated from the following file: - -

-Copyright © 1995-2014 Xilinx, Inc. All rights reserved. -

- - - +

+

The documentation for this struct was generated from the following file: +Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. diff --git a/XilinxProcessorIPLib/drivers/emacps/doc/html/api/tabs.css b/XilinxProcessorIPLib/drivers/emacps/doc/html/api/tabs.css index a4441634..a61552a6 100755 --- a/XilinxProcessorIPLib/drivers/emacps/doc/html/api/tabs.css +++ b/XilinxProcessorIPLib/drivers/emacps/doc/html/api/tabs.css @@ -32,7 +32,7 @@ DIV.tabs A float : left; background : url("tab_r.gif") no-repeat right top; border-bottom : 1px solid #84B0C7; - font-size : 80%; + font-size : x-small; font-weight : bold; text-decoration : none; } @@ -57,7 +57,7 @@ DIV.tabs SPAN white-space : nowrap; } -DIV.tabs #MSearchBox +DIV.tabs INPUT { float : right; display : inline; @@ -66,7 +66,7 @@ DIV.tabs #MSearchBox DIV.tabs TD { - font-size : 80%; + font-size : x-small; font-weight : bold; text-decoration : none; } @@ -82,24 +82,21 @@ DIV.tabs A:hover SPAN background-position: 0% -150px; } -DIV.tabs LI.current A +DIV.tabs LI#current A { background-position: 100% -150px; border-width : 0px; } -DIV.tabs LI.current SPAN +DIV.tabs LI#current SPAN { background-position: 0% -150px; padding-bottom : 6px; } -DIV.navpath +DIV.nav { background : none; border : none; border-bottom : 1px solid #84B0C7; - text-align : center; - margin : 2px; - padding : 2px; } diff --git a/XilinxProcessorIPLib/drivers/emacps/doc/html/api/xemacps_8c.html b/XilinxProcessorIPLib/drivers/emacps/doc/html/api/xemacps_8c.html index 432ac197..9b82631a 100755 --- a/XilinxProcessorIPLib/drivers/emacps/doc/html/api/xemacps_8c.html +++ b/XilinxProcessorIPLib/drivers/emacps/doc/html/api/xemacps_8c.html @@ -2,53 +2,56 @@ - Xilinx Driver emacps v2_1: xemacps.c File Reference + xemacps.c File Reference - +

Xilinx Processor IP Library

Software Drivers
- - - -
-

xemacps.c File Reference

#include "xemacps.h"
- - - - - - - -

Functions

void XEmacPs_StubHandler (void)
int XEmacPs_CfgInitialize (XEmacPs *InstancePtr, XEmacPs_Config *CfgPtr, u32 EffectiveAddress)
void XEmacPs_Start (XEmacPs *InstancePtr)
void XEmacPs_Stop (XEmacPs *InstancePtr)
void XEmacPs_Reset (XEmacPs *InstancePtr)
-

Detailed Description

-

The XEmacPs driver. Functions in this file are the minimum required functions for this driver. See xemacps.h for a detailed description of the driver.

+ +
+
+
+
+

xemacps.c File Reference

Detailed Description

+The XEmacPs driver. Functions in this file are the minimum required functions for this driver. See xemacps.h for a detailed description of the driver.

- MODIFICATION HISTORY:
 Ver   Who  Date     Changes
+ MODIFICATION HISTORY:

+

 Ver   Who  Date     Changes
  ----- ---- -------- -------------------------------------------------------
  1.00a wsy  01/10/10 First release
-

Function Documentation

- + +

+#include "xemacps.h"
+ + + + + + + + + + + + + +

Functions

void XEmacPs_StubHandler (void)
int XEmacPs_CfgInitialize (XEmacPs *InstancePtr, XEmacPs_Config *CfgPtr, u32 EffectiveAddress)
void XEmacPs_Start (XEmacPs *InstancePtr)
void XEmacPs_Stop (XEmacPs *InstancePtr)
void XEmacPs_Reset (XEmacPs *InstancePtr)
+

Function Documentation

+
- + @@ -68,162 +71,142 @@ - +
int XEmacPs_CfgInitialize int XEmacPs_CfgInitialize ( XEmacPs *  InstancePtr,
)
-

Initialize a specific XEmacPs instance/driver. The initialization entails:

-
    -
  • Initialize fields of the XEmacPs instance structure
    • -
  • Reset hardware and apply default options
    • -
  • Configure the DMA channels
    • -
-

The PHY is setup independently from the device. Use the MII or whatever other interface may be present for setup.

-
Parameters:
+ +

+Initialize a specific XEmacPs instance/driver. The initialization entails:

    +
  • Initialize fields of the XEmacPs instance structure
  • Reset hardware and apply default options
  • Configure the DMA channels
+

+The PHY is setup independently from the device. Use the MII or whatever other interface may be present for setup.

+

Parameters:
InstancePtr is a pointer to the instance to be worked on.
CfgPtr is the device configuration structure containing required hardware build data.
EffectiveAddress is the base address of the device. If address translation is not utilized, this parameter can be passed in using CfgPtr->Config.BaseAddress to specify the physical base address.
-
-
Returns:
    -
  • XST_SUCCESS if initialization was successful
    • -
+
Returns:
    +
  • XST_SUCCESS if initialization was successful
-
- +

+

- + - + - +
void XEmacPs_Reset void XEmacPs_Reset ( XEmacPs *  InstancePtr InstancePtr  ) 
-

Perform a graceful reset of the Ethernet MAC. Resets the DMA channels, the transmitter, and the receiver.

-

Steps to reset

- -

All options are placed in their default state. Any frames in the descriptor lists will remain in the lists. The side effect of doing this is that after a reset and following a restart of the device, frames were in the list before the reset may be transmitted or received.

-

The upper layer software is responsible for re-configuring (if necessary) and restarting the MAC after the reset. Note also that driver statistics are not cleared on reset. It is up to the upper layer software to clear the statistics if needed.

-

When a reset is required, the driver notifies the upper layer software of this need through the ErrorHandler callback and specific status codes. The upper layer software is responsible for calling this Reset function and then re-configuring the device.

-
Parameters:
+ +

+Perform a graceful reset of the Ethernet MAC. Resets the DMA channels, the transmitter, and the receiver.

+Steps to reset

    +
  • Stops transmit and receive channels
  • Stops DMA
  • Configure transmit and receive buffer size to default
  • Clear transmit and receive status register and counters
  • Clear all interrupt sources
  • Clear phy (if there is any previously detected) address
  • Clear MAC addresses (1-4) as well as Type IDs and hash value
+

+All options are placed in their default state. Any frames in the descriptor lists will remain in the lists. The side effect of doing this is that after a reset and following a restart of the device, frames were in the list before the reset may be transmitted or received.

+The upper layer software is responsible for re-configuring (if necessary) and restarting the MAC after the reset. Note also that driver statistics are not cleared on reset. It is up to the upper layer software to clear the statistics if needed.

+When a reset is required, the driver notifies the upper layer software of this need through the ErrorHandler callback and specific status codes. The upper layer software is responsible for calling this Reset function and then re-configuring the device.

+

Parameters:
InstancePtr is a pointer to the instance to be worked on.
-
-
- +

+

- + - + - +
void XEmacPs_Start void XEmacPs_Start ( XEmacPs *  InstancePtr InstancePtr  ) 
-

Start the Ethernet controller as follows:

- -
Parameters:
+ +

+Start the Ethernet controller as follows:

    +
  • Enable transmitter if XTE_TRANSMIT_ENABLE_OPTION is set
  • Enable receiver if XTE_RECEIVER_ENABLE_OPTION is set
  • Start the SG DMA send and receive channels and enable the device interrupt
+

+

Parameters:
InstancePtr is a pointer to the instance to be worked on.
-
-
Returns:
N/A
-
Note:
Hardware is configured with scatter-gather DMA, the driver expects to start the scatter-gather channels and expects that the user has previously set up the buffer descriptor lists.
-

This function makes use of internal resources that are shared between the Start, Stop, and Set/ClearOptions functions. So if one task might be setting device options while another is trying to start the device, the user is required to provide protection of this shared data (typically using a semaphore).

-

This function must not be preempted by an interrupt that may service the device.

- +
Returns:
N/A
+
Note:
Hardware is configured with scatter-gather DMA, the driver expects to start the scatter-gather channels and expects that the user has previously set up the buffer descriptor lists.
+This function makes use of internal resources that are shared between the Start, Stop, and Set/ClearOptions functions. So if one task might be setting device options while another is trying to start the device, the user is required to provide protection of this shared data (typically using a semaphore).

+This function must not be preempted by an interrupt that may service the device.

-
- +

+

- + - + - +
void XEmacPs_Stop void XEmacPs_Stop ( XEmacPs *  InstancePtr InstancePtr  ) 
-

Gracefully stop the Ethernet MAC as follows:

- -

Device options currently in effect are not changed.

-

This function will disable all interrupts. Default interrupts settings that had been enabled will be restored when XEmacPs_Start() is called.

-
Parameters:
+ +

+Gracefully stop the Ethernet MAC as follows:

    +
  • Disable all interrupts from this device
  • Stop DMA channels
  • Disable the tansmitter and receiver
+

+Device options currently in effect are not changed.

+This function will disable all interrupts. Default interrupts settings that had been enabled will be restored when XEmacPs_Start() is called.

+

Parameters:
InstancePtr is a pointer to the instance to be worked on.
-
-
Note:
This function makes use of internal resources that are shared between the Start, Stop, SetOptions, and ClearOptions functions. So if one task might be setting device options while another is trying to start the device, the user is required to provide protection of this shared data (typically using a semaphore).
-

Stopping the DMA channels causes this function to block until the DMA operation is complete.

- +
Note:
This function makes use of internal resources that are shared between the Start, Stop, SetOptions, and ClearOptions functions. So if one task might be setting device options while another is trying to start the device, the user is required to provide protection of this shared data (typically using a semaphore).
+Stopping the DMA channels causes this function to block until the DMA operation is complete.
-
- +

+

- + - + - +
void XEmacPs_StubHandler void XEmacPs_StubHandler ( void   ) 
-

This is a stub for the asynchronous callbacks. The stub is here in case the upper layer forgot to set the handler(s). On initialization, all handlers are set to this callback. It is considered an error for this handler to be invoked.

+

+This is a stub for the asynchronous callbacks. The stub is here in case the upper layer forgot to set the handler(s). On initialization, all handlers are set to this callback. It is considered an error for this handler to be invoked.

-
- -

-Copyright © 1995-2014 Xilinx, Inc. All rights reserved. -

- - - +

+Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. diff --git a/XilinxProcessorIPLib/drivers/emacps/doc/html/api/xemacps_8h.html b/XilinxProcessorIPLib/drivers/emacps/doc/html/api/xemacps_8h.html index 8758de41..28a95efc 100755 --- a/XilinxProcessorIPLib/drivers/emacps/doc/html/api/xemacps_8h.html +++ b/XilinxProcessorIPLib/drivers/emacps/doc/html/api/xemacps_8h.html @@ -2,837 +2,946 @@ - Xilinx Driver emacps v2_1: xemacps.h File Reference + xemacps.h File Reference - +

Xilinx Processor IP Library

Software Drivers
- - - -
-

xemacps.h File Reference

#include "xil_types.h"
-#include "xil_assert.h"
-#include "xstatus.h"
-#include "xemacps_hw.h"
-#include "xemacps_bd.h"
-#include "xemacps_bdring.h"
+ +
+
+
+
+

xemacps.h File Reference

+

+#include "xil_types.h"
+#include "xil_assert.h"
+#include "xstatus.h"
+#include "xemacps_hw.h"
+#include "xemacps_bd.h"
+#include "xemacps_bdring.h"
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

Classes

struct  XEmacPs_Config
struct  XEmacPs

Defines

#define XEMACPS_H
#define XEMACPS_DEVICE_NAME   "xemacps"
#define XEMACPS_DEVICE_DESC   "Xilinx PS 10/100/1000 MAC"
#define XEMACPS_MDIO_DIV_DFT   MDC_DIV_32
#define XEMACPS_MAC_ADDR_SIZE   6
#define XEMACPS_MTU   1500
#define XEMACPS_HDR_SIZE   14
#define XEMACPS_HDR_VLAN_SIZE   18
#define XEMACPS_TRL_SIZE   4
#define XEMACPS_MAX_FRAME_SIZE
#define XEMACPS_MAX_VLAN_FRAME_SIZE
#define XEMACPS_SINGLE_BURST   1
#define XEMACPS_4BYTE_BURST   4
#define XEMACPS_8BYTE_BURST   8
#define XEMACPS_16BYTE_BURST   16
#define XEmacPs_GetTxRing(InstancePtr)   ((InstancePtr)->TxBdRing)
#define XEmacPs_GetRxRing(InstancePtr)   ((InstancePtr)->RxBdRing)
#define XEmacPs_IntEnable(InstancePtr, Mask)
#define XEmacPs_IntDisable(InstancePtr, Mask)
#define XEmacPs_Transmit(InstancePtr)
#define XEmacPs_IsRxCsum(InstancePtr)
#define XEmacPs_IsTxCsum(InstancePtr)
Configuration options

Device configuration options. See the XEmacPs_SetOptions(), XEmacPs_ClearOptions() and XEmacPs_GetOptions() for information on how to use options.

-

The default state of the options are noted and are what the device and driver will be set to after calling XEmacPs_Reset() or XEmacPs_Initialize().

-

#define XEMACPS_PROMISC_OPTION   0x00000001
#define XEMACPS_FRAME1536_OPTION   0x00000002
#define XEMACPS_VLAN_OPTION   0x00000004
#define XEMACPS_FLOW_CONTROL_OPTION   0x00000010
#define XEMACPS_FCS_STRIP_OPTION   0x00000020
#define XEMACPS_FCS_INSERT_OPTION   0x00000040
#define XEMACPS_LENTYPE_ERR_OPTION   0x00000080
#define XEMACPS_TRANSMITTER_ENABLE_OPTION   0x00000100
#define XEMACPS_RECEIVER_ENABLE_OPTION   0x00000200
#define XEMACPS_BROADCAST_OPTION   0x00000400
#define XEMACPS_MULTICAST_OPTION   0x00000800
#define XEMACPS_RX_CHKSUM_ENABLE_OPTION   0x00001000
#define XEMACPS_TX_CHKSUM_ENABLE_OPTION   0x00002000
#define XEMACPS_DEFAULT_OPTIONS
Callback identifiers

These constants are used as parameters to XEmacPs_SetHandler()

-

#define XEMACPS_HANDLER_DMASEND   1
#define XEMACPS_HANDLER_DMARECV   2
#define XEMACPS_HANDLER_ERROR   3

Typedefs

Typedefs for callback functions

These callbacks are invoked in interrupt context.

-

typedef void(* XEmacPs_Handler )(void *CallBackRef)
typedef void(* XEmacPs_ErrHandler )(void *CallBackRef, u8 Direction, u32 ErrorWord)

Functions

int XEmacPs_CfgInitialize (XEmacPs *InstancePtr, XEmacPs_Config *CfgPtr, u32 EffectiveAddress)
void XEmacPs_Start (XEmacPs *InstancePtr)
void XEmacPs_Stop (XEmacPs *InstancePtr)
void XEmacPs_Reset (XEmacPs *InstancePtr)
XEmacPs_Config * XEmacPs_LookupConfig (u16 DeviceId)
int XEmacPs_SetHandler (XEmacPs *InstancePtr, u32 HandlerType, void *FuncPtr, void *CallBackRef)
void XEmacPs_IntrHandler (void *InstancePtr)
int XEmacPs_SetOptions (XEmacPs *InstancePtr, u32 Options)
int XEmacPs_ClearOptions (XEmacPs *InstancePtr, u32 Options)
u32 XEmacPs_GetOptions (XEmacPs *InstancePtr)
int XEmacPs_SetMacAddress (XEmacPs *InstancePtr, void *AddressPtr, u8 Index)
void XEmacPs_GetMacAddress (XEmacPs *InstancePtr, void *AddressPtr, u8 Index)
int XEmacPs_SetHash (XEmacPs *InstancePtr, void *AddressPtr)
void XEmacPs_ClearHash (XEmacPs *InstancePtr)
void XEmacPs_GetHash (XEmacPs *InstancePtr, void *AddressPtr)
void XEmacPs_SetMdioDivisor (XEmacPs *InstancePtr, XEmacPs_MdcDiv Divisor)
void XEmacPs_SetOperatingSpeed (XEmacPs *InstancePtr, u16 Speed)
u16 XEmacPs_GetOperatingSpeed (XEmacPs *InstancePtr)
int XEmacPs_PhyRead (XEmacPs *InstancePtr, u32 PhyAddress, u32 RegisterNum, u16 *PhyDataPtr)
int XEmacPs_PhyWrite (XEmacPs *InstancePtr, u32 PhyAddress, u32 RegisterNum, u16 PhyData)
int XEmacPs_SetTypeIdCheck (XEmacPs *InstancePtr, u32 Id_Check, u8 Index)
int XEmacPs_SendPausePacket (XEmacPs *InstancePtr)
void XEmacPs_DMABLengthUpdate (XEmacPs *InstancePtr, int BLength)

Classes

struct  XEmacPs_Config
struct  XEmacPs

Configuration options

Device configuration options. See the XEmacPs_SetOptions(), XEmacPs_ClearOptions() and XEmacPs_GetOptions() for information on how to use options.

+The default state of the options are noted and are what the device and driver will be set to after calling XEmacPs_Reset() or XEmacPs_Initialize().

#define XEMACPS_PROMISC_OPTION   0x00000001
#define XEMACPS_FRAME1536_OPTION   0x00000002
#define XEMACPS_VLAN_OPTION   0x00000004
#define XEMACPS_FLOW_CONTROL_OPTION   0x00000010
#define XEMACPS_FCS_STRIP_OPTION   0x00000020
#define XEMACPS_FCS_INSERT_OPTION   0x00000040
#define XEMACPS_LENTYPE_ERR_OPTION   0x00000080
#define XEMACPS_TRANSMITTER_ENABLE_OPTION   0x00000100
#define XEMACPS_RECEIVER_ENABLE_OPTION   0x00000200
#define XEMACPS_BROADCAST_OPTION   0x00000400
#define XEMACPS_MULTICAST_OPTION   0x00000800
#define XEMACPS_RX_CHKSUM_ENABLE_OPTION   0x00001000
#define XEMACPS_TX_CHKSUM_ENABLE_OPTION   0x00002000
#define XEMACPS_DEFAULT_OPTIONS

Callback identifiers

These constants are used as parameters to XEmacPs_SetHandler()

#define XEMACPS_HANDLER_DMASEND   1
#define XEMACPS_HANDLER_DMARECV   2
#define XEMACPS_HANDLER_ERROR   3

Typedefs for callback functions

These callbacks are invoked in interrupt context.

typedef void(*) XEmacPs_Handler (void *CallBackRef)
typedef void(*) XEmacPs_ErrHandler (void *CallBackRef, u8 Direction, u32 ErrorWord)

Defines

#define XEMACPS_H
#define XEMACPS_DEVICE_NAME   "xemacps"
#define XEMACPS_DEVICE_DESC   "Xilinx PS 10/100/1000 MAC"
#define XEMACPS_MDIO_DIV_DFT   MDC_DIV_32
#define XEMACPS_MAC_ADDR_SIZE   6
#define XEMACPS_MTU   1500
#define XEMACPS_HDR_SIZE   14
#define XEMACPS_HDR_VLAN_SIZE   18
#define XEMACPS_TRL_SIZE   4
#define XEMACPS_MAX_FRAME_SIZE
#define XEMACPS_MAX_VLAN_FRAME_SIZE
#define XEMACPS_SINGLE_BURST   1
#define XEMACPS_4BYTE_BURST   4
#define XEMACPS_8BYTE_BURST   8
#define XEMACPS_16BYTE_BURST   16
#define XEmacPs_GetTxRing(InstancePtr)   ((InstancePtr)->TxBdRing)
#define XEmacPs_GetRxRing(InstancePtr)   ((InstancePtr)->RxBdRing)
#define XEmacPs_IntEnable(InstancePtr, Mask)
#define XEmacPs_IntDisable(InstancePtr, Mask)
#define XEmacPs_Transmit(InstancePtr)
#define XEmacPs_IsRxCsum(InstancePtr)
#define XEmacPs_IsTxCsum(InstancePtr)

Functions

int XEmacPs_CfgInitialize (XEmacPs *InstancePtr, XEmacPs_Config *CfgPtr, u32 EffectiveAddress)
void XEmacPs_Start (XEmacPs *InstancePtr)
void XEmacPs_Stop (XEmacPs *InstancePtr)
void XEmacPs_Reset (XEmacPs *InstancePtr)
XEmacPs_Config * XEmacPs_LookupConfig (u16 DeviceId)
int XEmacPs_SetHandler (XEmacPs *InstancePtr, u32 HandlerType, void *FuncPtr, void *CallBackRef)
void XEmacPs_IntrHandler (void *InstancePtr)
int XEmacPs_SetOptions (XEmacPs *InstancePtr, u32 Options)
int XEmacPs_ClearOptions (XEmacPs *InstancePtr, u32 Options)
u32 XEmacPs_GetOptions (XEmacPs *InstancePtr)
int XEmacPs_SetMacAddress (XEmacPs *InstancePtr, void *AddressPtr, u8 Index)
void XEmacPs_GetMacAddress (XEmacPs *InstancePtr, void *AddressPtr, u8 Index)
int XEmacPs_SetHash (XEmacPs *InstancePtr, void *AddressPtr)
void XEmacPs_ClearHash (XEmacPs *InstancePtr)
void XEmacPs_GetHash (XEmacPs *InstancePtr, void *AddressPtr)
void XEmacPs_SetMdioDivisor (XEmacPs *InstancePtr, XEmacPs_MdcDiv Divisor)
void XEmacPs_SetOperatingSpeed (XEmacPs *InstancePtr, u16 Speed)
u16 XEmacPs_GetOperatingSpeed (XEmacPs *InstancePtr)
int XEmacPs_PhyRead (XEmacPs *InstancePtr, u32 PhyAddress, u32 RegisterNum, u16 *PhyDataPtr)
int XEmacPs_PhyWrite (XEmacPs *InstancePtr, u32 PhyAddress, u32 RegisterNum, u16 PhyData)
int XEmacPs_SetTypeIdCheck (XEmacPs *InstancePtr, u32 Id_Check, u8 Index)
int XEmacPs_SendPausePacket (XEmacPs *InstancePtr)
void XEmacPs_DMABLengthUpdate (XEmacPs *InstancePtr, int BLength)
-

Detailed Description

-

Define Documentation

- +

Define Documentation

+
- +
#define XEMACPS_16BYTE_BURST   16#define XEMACPS_16BYTE_BURST   16
+

+

-
- +

+

- +
#define XEMACPS_4BYTE_BURST   4#define XEMACPS_4BYTE_BURST   4
+

+

-
- +

+

- +
#define XEMACPS_8BYTE_BURST   8#define XEMACPS_8BYTE_BURST   8
-
-
- -
-
- - - - -
#define XEMACPS_BROADCAST_OPTION   0x00000400
-
-
-

Allow reception of the broadcast address This option defaults to enabled (set)

+

-
- +

+

- - -
#define XEMACPS_DEFAULT_OPTIONS
-
-
-Value:
(XEMACPS_FLOW_CONTROL_OPTION |                  \
-     XEMACPS_FCS_INSERT_OPTION |                    \
-     XEMACPS_FCS_STRIP_OPTION |                     \
-     XEMACPS_BROADCAST_OPTION |                     \
-     XEMACPS_LENTYPE_ERR_OPTION |                   \
-     XEMACPS_TRANSMITTER_ENABLE_OPTION |            \
-     XEMACPS_RECEIVER_ENABLE_OPTION |               \
-     XEMACPS_RX_CHKSUM_ENABLE_OPTION |              \
-     XEMACPS_TX_CHKSUM_ENABLE_OPTION)
-

Default options set when device is initialized or reset

- -
-
- -
-
- - - +
#define XEMACPS_DEVICE_DESC   "Xilinx PS 10/100/1000 MAC"#define XEMACPS_BROADCAST_OPTION   0x00000400
+

+Allow reception of the broadcast address This option defaults to enabled (set)

-
- +

+

- +
#define XEMACPS_DEVICE_NAME   "xemacps"#define XEMACPS_DEFAULT_OPTIONS
+

+Value:

(XEMACPS_FLOW_CONTROL_OPTION |                  \
+     XEMACPS_FCS_INSERT_OPTION |                    \
+     XEMACPS_FCS_STRIP_OPTION |                     \
+     XEMACPS_BROADCAST_OPTION |                     \
+     XEMACPS_LENTYPE_ERR_OPTION |                   \
+     XEMACPS_TRANSMITTER_ENABLE_OPTION |            \
+     XEMACPS_RECEIVER_ENABLE_OPTION |               \
+     XEMACPS_RX_CHKSUM_ENABLE_OPTION |              \
+     XEMACPS_TX_CHKSUM_ENABLE_OPTION)
+
Default options set when device is initialized or reset
-
- +

+

- +
#define XEMACPS_FCS_INSERT_OPTION   0x00000040#define XEMACPS_DEVICE_DESC   "Xilinx PS 10/100/1000 MAC"
-

Generate FCS field and add PAD automatically for outgoing frames. This option defaults to disabled (cleared)

+ +

-
- +

+

- +
#define XEMACPS_FCS_STRIP_OPTION   0x00000020#define XEMACPS_DEVICE_NAME   "xemacps"
-

Strip FCS and PAD from incoming frames. Note: PAD from VLAN frames is not stripped. This option defaults to enabled (set)

+ +

-
- +

+

- +
#define XEMACPS_FLOW_CONTROL_OPTION   0x00000010#define XEMACPS_FCS_INSERT_OPTION   0x00000040
-

Enable recognition of flow control frames on Rx This option defaults to enabled (set)

+

+Generate FCS field and add PAD automatically for outgoing frames. This option defaults to disabled (cleared)

-
- +

+

- +
#define XEMACPS_FRAME1536_OPTION   0x00000002#define XEMACPS_FCS_STRIP_OPTION   0x00000020
-

Frame larger than 1516 support for Tx & Rx. This option defaults to disabled (cleared)

+

+Strip FCS and PAD from incoming frames. Note: PAD from VLAN frames is not stripped. This option defaults to enabled (set)

-
- +

+

- + + +
#define XEmacPs_GetRxRing#define XEMACPS_FLOW_CONTROL_OPTION   0x00000010
+
+
+ +

+Enable recognition of flow control frames on Rx This option defaults to enabled (set) +

+

+ +

+
+ + + + +
#define XEMACPS_FRAME1536_OPTION   0x00000002
+
+
+ +

+Frame larger than 1516 support for Tx & Rx. This option defaults to disabled (cleared) +

+

+ +

+
+ + + - + - +
#define XEmacPs_GetRxRing ( InstancePtr   )    ((InstancePtr)->RxBdRing)   ((InstancePtr)->RxBdRing)
-

Retrieve the Rx ring object. This object can be used in the various Ring API functions.

-
Parameters:
+ +

+Retrieve the Rx ring object. This object can be used in the various Ring API functions.

+

Parameters:
InstancePtr is the DMA channel to operate on.
-
-
Returns:
RxBdRing attribute
-
Note:
C-style signature: XEmacPs_BdRing XEmacPs_GetRxRing(XEmacPs *InstancePtr)
+
Returns:
RxBdRing attribute
+
Note:
C-style signature: XEmacPs_BdRing XEmacPs_GetRxRing(XEmacPs *InstancePtr)
-
- +

+

- + - + - +
#define XEmacPs_GetTxRing#define XEmacPs_GetTxRing ( InstancePtr   )    ((InstancePtr)->TxBdRing)   ((InstancePtr)->TxBdRing)
-

Retrieve the Tx ring object. This object can be used in the various Ring API functions.

-
Parameters:
+ +

+Retrieve the Tx ring object. This object can be used in the various Ring API functions.

+

Parameters:
InstancePtr is the DMA channel to operate on.
-
-
Returns:
TxBdRing attribute
-
Note:
C-style signature: XEmacPs_BdRing XEmacPs_GetTxRing(XEmacPs *InstancePtr)
+
Returns:
TxBdRing attribute
+
Note:
C-style signature: XEmacPs_BdRing XEmacPs_GetTxRing(XEmacPs *InstancePtr)
-
- +

+

- +
#define XEMACPS_H#define XEMACPS_H
+

+

-
- +

+

- +
#define XEMACPS_HANDLER_DMARECV   2#define XEMACPS_HANDLER_DMARECV   2
+

+

-
- +

+

- +
#define XEMACPS_HANDLER_DMASEND   1#define XEMACPS_HANDLER_DMASEND   1
+

+

-
- +

+

- +
#define XEMACPS_HANDLER_ERROR   3#define XEMACPS_HANDLER_ERROR   3
+

+

-
- +

+

- +
#define XEMACPS_HDR_SIZE   14#define XEMACPS_HDR_SIZE   14
+

+

-
- +

+

- +
#define XEMACPS_HDR_VLAN_SIZE   18#define XEMACPS_HDR_VLAN_SIZE   18
+

+

-
- +

+

- + - - - + - + - +
#define XEmacPs_IntDisable#define XEmacPs_IntDisable (InstancePtr,
InstancePtr,
Mask   ) 
-Value:
XEmacPs_WriteReg((InstancePtr)->Config.BaseAddress,             \
-                XEMACPS_IDR_OFFSET,                                     \
-                (Mask & XEMACPS_IXR_ALL_MASK));
-

Disable interrupts specified in Mask. The corresponding interrupt for each bit set to 1 in Mask, will be enabled.

-
Parameters:
+ +

+Value:

XEmacPs_WriteReg((InstancePtr)->Config.BaseAddress,             \
+                XEMACPS_IDR_OFFSET,                                     \
+                (Mask & XEMACPS_IXR_ALL_MASK));
+
Disable interrupts specified in Mask. The corresponding interrupt for each bit set to 1 in Mask, will be enabled.

+

Parameters:
InstancePtr is a pointer to the instance to be worked on.
Mask contains a bit mask of interrupts to disable. The mask can be formed using a set of bitwise or'd values.
-
-
Note:
The state of the transmitter and receiver are not modified by this function. C-style signature void XEmacPs_IntDisable(XEmacPs *InstancePtr, u32 Mask)
+
Note:
The state of the transmitter and receiver are not modified by this function. C-style signature void XEmacPs_IntDisable(XEmacPs *InstancePtr, u32 Mask)
-
- +

+

- + - - - + - + - +
#define XEmacPs_IntEnable#define XEmacPs_IntEnable (InstancePtr,
InstancePtr,
Mask   ) 
-Value:
XEmacPs_WriteReg((InstancePtr)->Config.BaseAddress,             \
-                XEMACPS_IER_OFFSET,                                     \
-                (Mask & XEMACPS_IXR_ALL_MASK));
-

Enable interrupts specified in Mask. The corresponding interrupt for each bit set to 1 in Mask, will be enabled.

-
Parameters:
+ +

+Value:

XEmacPs_WriteReg((InstancePtr)->Config.BaseAddress,             \
+                XEMACPS_IER_OFFSET,                                     \
+                (Mask & XEMACPS_IXR_ALL_MASK));
+
Enable interrupts specified in Mask. The corresponding interrupt for each bit set to 1 in Mask, will be enabled.

+

Parameters:
InstancePtr is a pointer to the instance to be worked on.
Mask contains a bit mask of interrupts to enable. The mask can be formed using a set of bitwise or'd values.
-
-
Note:
The state of the transmitter and receiver are not modified by this function. C-style signature void XEmacPs_IntEnable(XEmacPs *InstancePtr, u32 Mask)
+
Note:
The state of the transmitter and receiver are not modified by this function. C-style signature void XEmacPs_IntEnable(XEmacPs *InstancePtr, u32 Mask)
-
- +

+

- + - + - +
#define XEmacPs_IsRxCsum#define XEmacPs_IsRxCsum ( InstancePtr   ) 
-Value:
((XEmacPs_ReadReg((InstancePtr)->Config.BaseAddress,             \
-          XEMACPS_NWCFG_OFFSET) & XEMACPS_NWCFG_RXCHKSUMEN_MASK)         \
+
+

+Value:
((XEmacPs_ReadReg((InstancePtr)->Config.BaseAddress,             \
+          XEMACPS_NWCFG_OFFSET) & XEMACPS_NWCFG_RXCHKSUMEN_MASK)         \
           ? TRUE : FALSE)
-
This macro determines if the device is configured with checksum offloading on the receive channel

-
Parameters:

+
This macro determines if the device is configured with checksum offloading on the receive channel

+

Parameters:
InstancePtr is a pointer to the XEmacPs instance to be worked on.
-
-
Returns:
-

Boolean TRUE if the device is configured with checksum offloading, or FALSE otherwise.

-
Note:
-

Signature: u32 XEmacPs_IsRxCsum(XEmacPs *InstancePtr)

- +
Returns:
+Boolean TRUE if the device is configured with checksum offloading, or FALSE otherwise.

+

Note:
+Signature: u32 XEmacPs_IsRxCsum(XEmacPs *InstancePtr)
-
- +

+

- + - + - +
#define XEmacPs_IsTxCsum#define XEmacPs_IsTxCsum ( InstancePtr   ) 
-Value:
((XEmacPs_ReadReg((InstancePtr)->Config.BaseAddress,              \
-          XEMACPS_DMACR_OFFSET) & XEMACPS_DMACR_TCPCKSUM_MASK)           \
+
+

+Value:
((XEmacPs_ReadReg((InstancePtr)->Config.BaseAddress,              \
+          XEMACPS_DMACR_OFFSET) & XEMACPS_DMACR_TCPCKSUM_MASK)           \
           ? TRUE : FALSE)
-
This macro determines if the device is configured with checksum offloading on the transmit channel

-
Parameters:

+
This macro determines if the device is configured with checksum offloading on the transmit channel

+

Parameters:
InstancePtr is a pointer to the XEmacPs instance to be worked on.
-
-
Returns:
-

Boolean TRUE if the device is configured with checksum offloading, or FALSE otherwise.

-
Note:
-

Signature: u32 XEmacPs_IsTxCsum(XEmacPs *InstancePtr)

- +
Returns:
+Boolean TRUE if the device is configured with checksum offloading, or FALSE otherwise.

+

Note:
+Signature: u32 XEmacPs_IsTxCsum(XEmacPs *InstancePtr)
-
- +

+

- - -
#define XEMACPS_LENTYPE_ERR_OPTION   0x00000080
-
-
-

Enable Length/Type error checking for incoming frames. When this option is set, the MAC will filter frames that have a mismatched type/length field and if XEMACPS_REPORT_RXERR_OPTION is set, the user is notified when these types of frames are encountered. When this option is cleared, the MAC will allow these types of frames to be received.

-

This option defaults to disabled (cleared)

- -
-
- -
-
- - - +
#define XEMACPS_MAC_ADDR_SIZE   6#define XEMACPS_LENTYPE_ERR_OPTION   0x00000080
+

+Enable Length/Type error checking for incoming frames. When this option is set, the MAC will filter frames that have a mismatched type/length field and if XEMACPS_REPORT_RXERR_OPTION is set, the user is notified when these types of frames are encountered. When this option is cleared, the MAC will allow these types of frames to be received.

+This option defaults to disabled (cleared)

-
- +

+

- +
#define XEMACPS_MAX_FRAME_SIZE#define XEMACPS_MAC_ADDR_SIZE   6
-Value:
(XEMACPS_MTU + XEMACPS_HDR_SIZE + \
-        XEMACPS_TRL_SIZE)
+
+

+
+
+

+ +

+
+ + + + +
#define XEMACPS_MAX_FRAME_SIZE
+
+
+ +

+Value:

(XEMACPS_MTU + XEMACPS_HDR_SIZE + \
+        XEMACPS_TRL_SIZE)
-
- +

+

- +
#define XEMACPS_MAX_VLAN_FRAME_SIZE#define XEMACPS_MAX_VLAN_FRAME_SIZE
-Value:
(XEMACPS_MTU + XEMACPS_HDR_SIZE + \
-        XEMACPS_HDR_VLAN_SIZE + XEMACPS_TRL_SIZE)
+
+

+Value:
(XEMACPS_MTU + XEMACPS_HDR_SIZE + \
+        XEMACPS_HDR_VLAN_SIZE + XEMACPS_TRL_SIZE)
-
- +

+

- - -
#define XEMACPS_MDIO_DIV_DFT   MDC_DIV_32
-
-
-

Default MDIO clock divisor

- -
-
- -
-
- - - +
#define XEMACPS_MTU   1500#define XEMACPS_MDIO_DIV_DFT   MDC_DIV_32
+

+Default MDIO clock divisor

-
- +

+

- - -
#define XEMACPS_MULTICAST_OPTION   0x00000800
-
-
-

Allows reception of multicast addresses programmed into hash This option defaults to disabled (clear)

- -
-
- -
-
- - - - -
#define XEMACPS_PROMISC_OPTION   0x00000001
-
-
-

Accept all incoming packets. This option defaults to disabled (cleared)

- -
-
- -
-
- - - - -
#define XEMACPS_RECEIVER_ENABLE_OPTION   0x00000200
-
-
-

Enable the receiver This option defaults to enabled (set)

- -
-
- -
-
- - - - -
#define XEMACPS_RX_CHKSUM_ENABLE_OPTION   0x00001000
-
-
-

Enable the RX checksum offload This option defaults to enabled (set)

- -
-
- -
-
- - - +
#define XEMACPS_SINGLE_BURST   1#define XEMACPS_MTU   1500
+

+

-
- +

+

- + + +
#define XEmacPs_Transmit#define XEMACPS_MULTICAST_OPTION   0x00000800
+
+
+ +

+Allows reception of multicast addresses programmed into hash This option defaults to disabled (clear) +

+

+ +

+
+ + + + +
#define XEMACPS_PROMISC_OPTION   0x00000001
+
+
+ +

+Accept all incoming packets. This option defaults to disabled (cleared) +

+

+ +

+
+ + + + +
#define XEMACPS_RECEIVER_ENABLE_OPTION   0x00000200
+
+
+ +

+Enable the receiver This option defaults to enabled (set) +

+

+ +

+
+ + + + +
#define XEMACPS_RX_CHKSUM_ENABLE_OPTION   0x00001000
+
+
+ +

+Enable the RX checksum offload This option defaults to enabled (set) +

+

+ +

+
+ + + + +
#define XEMACPS_SINGLE_BURST   1
+
+
+ +

+ +

+

+ +

+
+ + + - + - +
#define XEmacPs_Transmit ( InstancePtr   ) 
-Value:
XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,          \
-        XEMACPS_NWCTRL_OFFSET,                                     \
-        (XEmacPs_ReadReg(InstancePtr->Config.BaseAddress,          \
-        XEMACPS_NWCTRL_OFFSET) | XEMACPS_NWCTRL_STARTTX_MASK))
-

This macro triggers trasmit circuit to send data currently in TX buffer(s).

-
Parameters:
+ +

+Value:

XEmacPs_WriteReg(InstancePtr->Config.BaseAddress,          \
+        XEMACPS_NWCTRL_OFFSET,                                     \
+        (XEmacPs_ReadReg(InstancePtr->Config.BaseAddress,          \
+        XEMACPS_NWCTRL_OFFSET) | XEMACPS_NWCTRL_STARTTX_MASK))
+
This macro triggers trasmit circuit to send data currently in TX buffer(s).

+

Parameters:
InstancePtr is a pointer to the XEmacPs instance to be worked on.
-
-
Returns:
-
Note:
-

Signature: void XEmacPs_Transmit(XEmacPs *InstancePtr)

- +
Returns:
+
Note:
+Signature: void XEmacPs_Transmit(XEmacPs *InstancePtr)
-
- +

+

- - -
#define XEMACPS_TRANSMITTER_ENABLE_OPTION   0x00000100
-
-
-

Enable the transmitter. This option defaults to enabled (set)

- -
-
- -
-
- - - +
#define XEMACPS_TRL_SIZE   4#define XEMACPS_TRANSMITTER_ENABLE_OPTION   0x00000100
+

+Enable the transmitter. This option defaults to enabled (set)

-
- +

+

- +
#define XEMACPS_TX_CHKSUM_ENABLE_OPTION   0x00002000#define XEMACPS_TRL_SIZE   4
-

Enable the TX checksum offload This option defaults to enabled (set)

+ +

-
- +

+

- +
#define XEMACPS_VLAN_OPTION   0x00000004#define XEMACPS_TX_CHKSUM_ENABLE_OPTION   0x00002000
-

VLAN Rx & Tx frame support. This option defaults to disabled (cleared)

+

+Enable the TX checksum offload This option defaults to enabled (set)

-
-

Typedef Documentation

- +

+

- +
typedef void(* XEmacPs_ErrHandler)(void *CallBackRef, u8 Direction, u32 ErrorWord)#define XEMACPS_VLAN_OPTION   0x00000004
-

Callback when an asynchronous error occurs. To set this callback, invoke XEmacPs_SetHandler() with XEMACPS_HANDLER_ERROR in the HandlerType paramter.

-
Parameters:
+ +

+VLAN Rx & Tx frame support. This option defaults to disabled (cleared) +

+

+

Typedef Documentation

+ +
+
+ + + + +
typedef void(*) XEmacPs_ErrHandler(void *CallBackRef, u8 Direction, u32 ErrorWord)
+
+
+ +

+Callback when an asynchronous error occurs. To set this callback, invoke XEmacPs_SetHandler() with XEMACPS_HANDLER_ERROR in the HandlerType paramter.

+

Parameters:
CallBackRef is user data assigned when the callback was set.
Direction defines either receive or transmit error(s) has occurred.
ErrorWord definition varies with Direction
-
-
- +

+

- +
typedef void(* XEmacPs_Handler)(void *CallBackRef)typedef void(*) XEmacPs_Handler(void *CallBackRef)
-

Callback invoked when frame(s) have been sent or received in interrupt driven DMA mode. To set the send callback, invoke XEmacPs_SetHandler().

-
Parameters:
+ +

+Callback invoked when frame(s) have been sent or received in interrupt driven DMA mode. To set the send callback, invoke XEmacPs_SetHandler().

+

Parameters:
CallBackRef is user data assigned when the callback was set.
-
-
Note:
See xemacps_hw.h for bitmasks definitions and the device hardware spec for further information on their meaning.
+
Note:
See xemacps_hw.h for bitmasks definitions and the device hardware spec for further information on their meaning.
-
-

Function Documentation

- +

+

Function Documentation

+
- + @@ -852,64 +961,62 @@ - +
int XEmacPs_CfgInitialize int XEmacPs_CfgInitialize ( XEmacPs *  InstancePtr,
)
-

Initialize a specific XEmacPs instance/driver. The initialization entails:

- -

The PHY is setup independently from the device. Use the MII or whatever other interface may be present for setup.

-
Parameters:
+ +

+Initialize a specific XEmacPs instance/driver. The initialization entails:

    +
  • Initialize fields of the XEmacPs instance structure
  • Reset hardware and apply default options
  • Configure the DMA channels
+

+The PHY is setup independently from the device. Use the MII or whatever other interface may be present for setup.

+

Parameters:
InstancePtr is a pointer to the instance to be worked on.
CfgPtr is the device configuration structure containing required hardware build data.
EffectiveAddress is the base address of the device. If address translation is not utilized, this parameter can be passed in using CfgPtr->Config.BaseAddress to specify the physical base address.
-
-
Returns:
    -
  • XST_SUCCESS if initialization was successful
    • -
+
Returns:
    +
  • XST_SUCCESS if initialization was successful
-
- +

+

- + - + - +
void XEmacPs_ClearHash void XEmacPs_ClearHash ( XEmacPs *  InstancePtr InstancePtr  ) 
-

Clear the Hash registers for the mac address pointed by AddressPtr.

-
Parameters:
+ +

+Clear the Hash registers for the mac address pointed by AddressPtr.

+

Parameters:
InstancePtr is a pointer to the instance to be worked on.
-
-
- +

+

- + @@ -923,34 +1030,33 @@ - +
int XEmacPs_ClearOptions int XEmacPs_ClearOptions ( XEmacPs *  InstancePtr,
)
-

Clear options for the driver/device

-
Parameters:
+ +

+Clear options for the driver/device

+

Parameters:
InstancePtr is a pointer to the instance to be worked on.
Options are the options to clear. Multiple options can be cleared by OR'ing XEMACPS_*_OPTIONS constants together. Options not specified are not affected.
-
-
Returns:
    -
  • XST_SUCCESS if the options were set successfully
    • -
  • XST_DEVICE_IS_STARTED if the device has not yet been stopped
    • -
+
Returns:
    +
  • XST_SUCCESS if the options were set successfully
  • XST_DEVICE_IS_STARTED if the device has not yet been stopped
-
Note:
See xemacps.h for a description of the available options.
+
Note:
See xemacps.h for a description of the available options.
-
- +

+

- + @@ -964,29 +1070,30 @@ - +
void XEmacPs_DMABLengthUpdate void XEmacPs_DMABLengthUpdate ( XEmacPs *  InstancePtr,
)
-

API to update the Burst length in the DMACR register.

-
Parameters:
+ +

+API to update the Burst length in the DMACR register.

+

Parameters:
InstancePtr is a pointer to the XEmacPs instance to be worked on.
BLength is the length in bytes for the dma burst.
-
-
Returns:
None
+
Returns:
None
-
- +

+

- + @@ -1000,28 +1107,29 @@ - +
void XEmacPs_GetHash void XEmacPs_GetHash ( XEmacPs *  InstancePtr,
)
-

Get the Hash address for this driver/device.

-
Parameters:
+ +

+Get the Hash address for this driver/device.

+

Parameters:
InstancePtr is a pointer to the instance to be worked on.
AddressPtr is an output parameter, and is a pointer to a buffer into which the current HASH MAC address will be copied.
-
-
- +

+

- + @@ -1041,135 +1149,140 @@ - +
void XEmacPs_GetMacAddress void XEmacPs_GetMacAddress ( XEmacPs *  InstancePtr,
)
-

Get the MAC address for this driver/device.

-
Parameters:
+ +

+Get the MAC address for this driver/device.

+

Parameters:
InstancePtr is a pointer to the instance to be worked on.
AddressPtr is an output parameter, and is a pointer to a buffer into which the current MAC address will be copied.
Index is a index to which MAC (1-4) address.
-
-
- +

+

- + - + - +
u16 XEmacPs_GetOperatingSpeed u16 XEmacPs_GetOperatingSpeed ( XEmacPs *  InstancePtr InstancePtr  ) 
-

XEmacPs_GetOperatingSpeed gets the current operating link speed. This may be the value set by XEmacPs_SetOperatingSpeed() or a hardware default.

-
Parameters:
+ +

+XEmacPs_GetOperatingSpeed gets the current operating link speed. This may be the value set by XEmacPs_SetOperatingSpeed() or a hardware default.

+

Parameters:
InstancePtr references the TEMAC channel on which to operate.
-
-
Returns:
XEmacPs_GetOperatingSpeed returns the link speed in units of megabits per second.
-
Note:
+
Returns:
XEmacPs_GetOperatingSpeed returns the link speed in units of megabits per second.
+
Note:
-
- +

+

- + - + - +
u32 XEmacPs_GetOptions u32 XEmacPs_GetOptions ( XEmacPs *  InstancePtr InstancePtr  ) 
-

Get current option settings

-
Parameters:
+ +

+Get current option settings

+

Parameters:
InstancePtr is a pointer to the instance to be worked on.
-
-
Returns:
A bitmask of XTE_*_OPTION constants. Any bit set to 1 is to be interpreted as a set opion.
-
Note:
See xemacps.h for a description of the available options.
+
Returns:
A bitmask of XTE_*_OPTION constants. Any bit set to 1 is to be interpreted as a set opion.
+
Note:
See xemacps.h for a description of the available options.
-
- +

+

- + - + - +
void XEmacPs_IntrHandler void XEmacPs_IntrHandler ( void *  XEmacPsPtr XEmacPsPtr  ) 
-

Master interrupt handler for EMAC driver. This routine will query the status of the device, bump statistics, and invoke user callbacks.

-

This routine must be connected to an interrupt controller using OS/BSP specific methods.

-
Parameters:
+ +

+Master interrupt handler for EMAC driver. This routine will query the status of the device, bump statistics, and invoke user callbacks.

+This routine must be connected to an interrupt controller using OS/BSP specific methods.

+

Parameters:
XEmacPsPtr is a pointer to the XEMACPS instance that has caused the interrupt.
-
-
- +

+

- + - + - +
XEmacPs_Config* XEmacPs_LookupConfig XEmacPs_Config* XEmacPs_LookupConfig ( u16  DeviceId DeviceId  ) 
-

Lookup the device configuration based on the unique device ID. The table contains the configuration info for each device in the system.

-
Parameters:
+ +

+Lookup the device configuration based on the unique device ID. The table contains the configuration info for each device in the system.

+

Parameters:
DeviceId is the unique device ID of the device being looked up.
-
-
Returns:
A pointer to the configuration table entry corresponding to the given device ID, or NULL if no match is found.
+
Returns:
A pointer to the configuration table entry corresponding to the given device ID, or NULL if no match is found.
-
- +

+

- + @@ -1195,40 +1308,39 @@ - +
int XEmacPs_PhyRead int XEmacPs_PhyRead ( XEmacPs *  InstancePtr,
)
-

Read the current value of the PHY register indicated by the PhyAddress and the RegisterNum parameters. The MAC provides the driver with the ability to talk to a PHY that adheres to the Media Independent Interface (MII) as defined in the IEEE 802.3 standard.

-

Prior to PHY access with this function, the user should have setup the MDIO clock with XEmacPs_SetMdioDivisor().

-
Parameters:
+ +

+Read the current value of the PHY register indicated by the PhyAddress and the RegisterNum parameters. The MAC provides the driver with the ability to talk to a PHY that adheres to the Media Independent Interface (MII) as defined in the IEEE 802.3 standard.

+Prior to PHY access with this function, the user should have setup the MDIO clock with XEmacPs_SetMdioDivisor().

+

Parameters:
InstancePtr is a pointer to the XEmacPs instance to be worked on.
PhyAddress is the address of the PHY to be read (supports multiple PHYs)
RegisterNum is the register number, 0-31, of the specific PHY register to read
PhyDataPtr is an output parameter, and points to a 16-bit buffer into which the current value of the register will be copied.
-
-
Returns:
+
Returns:
    -
  • XST_SUCCESS if the PHY was read from successfully
    • -
  • XST_EMAC_MII_BUSY if there is another PHY operation in progress
    • -
-
Note:
-

This function is not thread-safe. The user must provide mutually exclusive access to this function if there are to be multiple threads that can call it.

-

There is the possibility that this function will not return if the hardware is broken (i.e., it never sets the status bit indicating that the read is done). If this is of concern to the user, the user should provide a mechanism suitable to their needs for recovery.

-

For the duration of this function, all host interface reads and writes are blocked to the current XEmacPs instance.

- +
  • XST_SUCCESS if the PHY was read from successfully
  • XST_EMAC_MII_BUSY if there is another PHY operation in progress
    • +

    +

    Note:
    +This function is not thread-safe. The user must provide mutually exclusive access to this function if there are to be multiple threads that can call it.

    +There is the possibility that this function will not return if the hardware is broken (i.e., it never sets the status bit indicating that the read is done). If this is of concern to the user, the user should provide a mechanism suitable to their needs for recovery.

    +For the duration of this function, all host interface reads and writes are blocked to the current XEmacPs instance.

    -
    - +

    +

    - + @@ -1254,108 +1366,100 @@ - +
    int XEmacPs_PhyWrite int XEmacPs_PhyWrite ( XEmacPs *  InstancePtr,
    )
    -

    Write data to the specified PHY register. The Ethernet driver does not require the device to be stopped before writing to the PHY. Although it is probably a good idea to stop the device, it is the responsibility of the application to deem this necessary. The MAC provides the driver with the ability to talk to a PHY that adheres to the Media Independent Interface (MII) as defined in the IEEE 802.3 standard.

    -

    Prior to PHY access with this function, the user should have setup the MDIO clock with XEmacPs_SetMdioDivisor().

    -
    Parameters:
    + +

    +Write data to the specified PHY register. The Ethernet driver does not require the device to be stopped before writing to the PHY. Although it is probably a good idea to stop the device, it is the responsibility of the application to deem this necessary. The MAC provides the driver with the ability to talk to a PHY that adheres to the Media Independent Interface (MII) as defined in the IEEE 802.3 standard.

    +Prior to PHY access with this function, the user should have setup the MDIO clock with XEmacPs_SetMdioDivisor().

    +

    Parameters:
    InstancePtr is a pointer to the XEmacPs instance to be worked on.
    PhyAddress is the address of the PHY to be written (supports multiple PHYs)
    RegisterNum is the register number, 0-31, of the specific PHY register to write
    PhyData is the 16-bit value that will be written to the register
    -
    -
    Returns:
    +
    Returns:
      -
    • XST_SUCCESS if the PHY was written to successfully. Since there is no error status from the MAC on a write, the user should read the PHY to verify the write was successful.
      • -
    • XST_EMAC_MII_BUSY if there is another PHY operation in progress
      • -
    -
    Note:
    -

    This function is not thread-safe. The user must provide mutually exclusive access to this function if there are to be multiple threads that can call it.

    -

    There is the possibility that this function will not return if the hardware is broken (i.e., it never sets the status bit indicating that the write is done). If this is of concern to the user, the user should provide a mechanism suitable to their needs for recovery.

    -

    For the duration of this function, all host interface reads and writes are blocked to the current XEmacPs instance.

    - +
  • XST_SUCCESS if the PHY was written to successfully. Since there is no error status from the MAC on a write, the user should read the PHY to verify the write was successful.
  • XST_EMAC_MII_BUSY if there is another PHY operation in progress
    • +

    +

    Note:
    +This function is not thread-safe. The user must provide mutually exclusive access to this function if there are to be multiple threads that can call it.

    +There is the possibility that this function will not return if the hardware is broken (i.e., it never sets the status bit indicating that the write is done). If this is of concern to the user, the user should provide a mechanism suitable to their needs for recovery.

    +For the duration of this function, all host interface reads and writes are blocked to the current XEmacPs instance.

    -
    - +

    +

    - + - + - +
    void XEmacPs_Reset void XEmacPs_Reset ( XEmacPs *  InstancePtr InstancePtr  ) 
    -

    Perform a graceful reset of the Ethernet MAC. Resets the DMA channels, the transmitter, and the receiver.

    -

    Steps to reset

    - -

    All options are placed in their default state. Any frames in the descriptor lists will remain in the lists. The side effect of doing this is that after a reset and following a restart of the device, frames were in the list before the reset may be transmitted or received.

    -

    The upper layer software is responsible for re-configuring (if necessary) and restarting the MAC after the reset. Note also that driver statistics are not cleared on reset. It is up to the upper layer software to clear the statistics if needed.

    -

    When a reset is required, the driver notifies the upper layer software of this need through the ErrorHandler callback and specific status codes. The upper layer software is responsible for calling this Reset function and then re-configuring the device.

    -
    Parameters:
    + +

    +Perform a graceful reset of the Ethernet MAC. Resets the DMA channels, the transmitter, and the receiver.

    +Steps to reset

      +
    • Stops transmit and receive channels
    • Stops DMA
    • Configure transmit and receive buffer size to default
    • Clear transmit and receive status register and counters
    • Clear all interrupt sources
    • Clear phy (if there is any previously detected) address
    • Clear MAC addresses (1-4) as well as Type IDs and hash value
    +

    +All options are placed in their default state. Any frames in the descriptor lists will remain in the lists. The side effect of doing this is that after a reset and following a restart of the device, frames were in the list before the reset may be transmitted or received.

    +The upper layer software is responsible for re-configuring (if necessary) and restarting the MAC after the reset. Note also that driver statistics are not cleared on reset. It is up to the upper layer software to clear the statistics if needed.

    +When a reset is required, the driver notifies the upper layer software of this need through the ErrorHandler callback and specific status codes. The upper layer software is responsible for calling this Reset function and then re-configuring the device.

    +

    Parameters:
    InstancePtr is a pointer to the instance to be worked on.
    -
    -
    - +

    +

    - + - + - +
    int XEmacPs_SendPausePacket int XEmacPs_SendPausePacket ( XEmacPs *  InstancePtr InstancePtr  ) 
    -

    Send a pause packet

    -
    Parameters:
    + +

    +Send a pause packet

    +

    Parameters:
    InstancePtr is a pointer to the instance to be worked on.
    -
    -
    Returns:
      -
    • XST_SUCCESS if pause frame transmission was initiated
      • -
    • XST_DEVICE_IS_STOPPED if the device has not been started.
      • -
    +
    Returns:
      +
    • XST_SUCCESS if pause frame transmission was initiated
    • XST_DEVICE_IS_STOPPED if the device has not been started.
    -
    - +

    +

    - + @@ -1381,33 +1485,34 @@ - +
    int XEmacPs_SetHandler int XEmacPs_SetHandler ( XEmacPs *  InstancePtr,
    )
    -

    Install an asynchronious handler function for the given HandlerType:

    -
    Parameters:
    + +

    +Install an asynchronious handler function for the given HandlerType:

    +

    Parameters:
    InstancePtr is a pointer to the instance to be worked on.
    HandlerType indicates what interrupt handler type is. XEMACPS_HANDLER_DMASEND, XEMACPS_HANDLER_DMARECV and XEMACPS_HANDLER_ERROR.
    FuncPtr is the pointer to the callback function
    CallBackRef is the upper layer callback reference passed back when when the callback function is invoked.
    -
    -
    Returns:
    -

    None.

    -
    Note:
    There is no assert on the CallBackRef since the driver doesn't know what it is.
    +
    Returns:
    +None.

    +

    Note:
    There is no assert on the CallBackRef since the driver doesn't know what it is.
    -
    - +

    +

    - + @@ -1421,14 +1526,16 @@ - +
    int XEmacPs_SetHash int XEmacPs_SetHash ( XEmacPs *  InstancePtr,
    )
    -

    Set 48-bit MAC addresses in hash table. The device must be stopped before calling this function.

    -

    The hash address register is 64 bits long and takes up two locations in the memory map. The least significant bits are stored in hash register bottom and the most significant bits in hash register top.

    -

    The unicast hash enable and the multicast hash enable bits in the network configuration register enable the reception of hash matched frames. The destination address is reduced to a 6 bit index into the 64 bit hash register using the following hash function. The hash function is an XOR of every sixth bit of the destination address.

    + +

    +Set 48-bit MAC addresses in hash table. The device must be stopped before calling this function.

    +The hash address register is 64 bits long and takes up two locations in the memory map. The least significant bits are stored in hash register bottom and the most significant bits in hash register top.

    +The unicast hash enable and the multicast hash enable bits in the network configuration register enable the reception of hash matched frames. The destination address is reduced to a 6 bit index into the 64 bit hash register using the following hash function. The hash function is an XOR of every sixth bit of the destination address.

      hash_index[05] = da[05]^da[11]^da[17]^da[23]^da[29]^da[35]^da[41]^da[47]
  hash_index[04] = da[04]^da[10]^da[16]^da[22]^da[28]^da[34]^da[40]^da[46]
@@ -1436,34 +1543,31 @@
  hash_index[02] = da[02]^da[08]^da[14]^da[20]^da[26]^da[32]^da[38]^da[44]
  hash_index[01] = da[01]^da[07]^da[13]^da[19]^da[25]^da[31]^da[37]^da[43]
  hash_index[00] = da[00]^da[06]^da[12]^da[18]^da[24]^da[30]^da[36]^da[42]
-

    da[0] represents the least significant bit of the first byte received, that is, the multicast/unicast indicator, and da[47] represents the most significant bit of the last byte received.

    -

    If the hash index points to a bit that is set in the hash register then the frame will be matched according to whether the frame is multicast or unicast.

    -

    A multicast match will be signaled if the multicast hash enable bit is set, da[0] is logic 1 and the hash index points to a bit set in the hash register.

    -

    A unicast match will be signaled if the unicast hash enable bit is set, da[0] is logic 0 and the hash index points to a bit set in the hash register.

    -

    To receive all multicast frames, the hash register should be set with all ones and the multicast hash enable bit should be set in the network configuration register.

    -
    Parameters:
    +

    +da[0] represents the least significant bit of the first byte received, that is, the multicast/unicast indicator, and da[47] represents the most significant bit of the last byte received.

    +If the hash index points to a bit that is set in the hash register then the frame will be matched according to whether the frame is multicast or unicast.

    +A multicast match will be signaled if the multicast hash enable bit is set, da[0] is logic 1 and the hash index points to a bit set in the hash register.

    +A unicast match will be signaled if the unicast hash enable bit is set, da[0] is logic 0 and the hash index points to a bit set in the hash register.

    +To receive all multicast frames, the hash register should be set with all ones and the multicast hash enable bit should be set in the network configuration register.

    +

    Parameters:
    InstancePtr is a pointer to the instance to be worked on.
    AddressPtr is a pointer to a 6-byte MAC address.
    -
    -
    Returns:
      -
    • XST_SUCCESS if the HASH MAC address was set successfully
      • -
    • XST_DEVICE_IS_STARTED if the device has not yet been stopped
      • -
    • XST_INVALID_PARAM if the HASH MAC address passed in does not meet requirement after calculation
      • -
    +
    Returns:
      +
    • XST_SUCCESS if the HASH MAC address was set successfully
    • XST_DEVICE_IS_STARTED if the device has not yet been stopped
    • XST_INVALID_PARAM if the HASH MAC address passed in does not meet requirement after calculation
    -
    Note:
    Having Aptr be unsigned type prevents the following operations from sign extending.
    +
    Note:
    Having Aptr be unsigned type prevents the following operations from sign extending.
    -
    - +

    +

    - + @@ -1483,34 +1587,33 @@ - +
    int XEmacPs_SetMacAddress int XEmacPs_SetMacAddress ( XEmacPs *  InstancePtr,
    )
    -

    Set the MAC address for this driver/device. The address is a 48-bit value. The device must be stopped before calling this function.

    -
    Parameters:
    + +

    +Set the MAC address for this driver/device. The address is a 48-bit value. The device must be stopped before calling this function.

    +

    Parameters:
    InstancePtr is a pointer to the instance to be worked on.
    AddressPtr is a pointer to a 6-byte MAC address.
    Index is a index to which MAC (1-4) address.
    -
    -
    Returns:
      -
    • XST_SUCCESS if the MAC address was set successfully
      • -
    • XST_DEVICE_IS_STARTED if the device has not yet been stopped
      • -
    +
    Returns:
      +
    • XST_SUCCESS if the MAC address was set successfully
    • XST_DEVICE_IS_STARTED if the device has not yet been stopped
    -
    - +

    +

    - + @@ -1518,24 +1621,27 @@ - + - +
    void XEmacPs_SetMdioDivisor void XEmacPs_SetMdioDivisor ( XEmacPs *  InstancePtr,
    XEmacPs_MdcDiv XEmacPs_MdcDiv  Divisor 
    )
    -

    Set the MDIO clock divisor.

    -

    Calculating the divisor:

    + +

    +Set the MDIO clock divisor.

    +Calculating the divisor:

                   f[HOSTCLK]
    f[MDC] = -----------------
             (1 + Divisor) * 2
-

    where f[HOSTCLK] is the bus clock frequency in MHz, and f[MDC] is the MDIO clock frequency in MHz to the PHY. Typically, f[MDC] should not exceed 2.5 MHz. Some PHYs can tolerate faster speeds which means faster access. Here is the table to show values to generate MDC,

    +

    +where f[HOSTCLK] is the bus clock frequency in MHz, and f[MDC] is the MDIO clock frequency in MHz to the PHY. Typically, f[MDC] should not exceed 2.5 MHz. Some PHYs can tolerate faster speeds which means faster access. Here is the table to show values to generate MDC,

      000 : divide pclk by   8 (pclk up to  20 MHz)
  001 : divide pclk by  16 (pclk up to  40 MHz)
@@ -1545,22 +1651,22 @@
  101 : divide pclk by  96 (pclk up to 240 MHz)
  110 : divide pclk by 128 (pclk up to 320 MHz)
  111 : divide pclk by 224 (pclk up to 540 MHz)
-
    Parameters:
    +

    +

    Parameters:
    InstancePtr is a pointer to the instance to be worked on.
    Divisor is the divisor to set. Range is 0b000 to 0b111.
    -
    -
    - +

    +

    - + @@ -1574,29 +1680,30 @@ - +
    void XEmacPs_SetOperatingSpeed void XEmacPs_SetOperatingSpeed ( XEmacPs *  InstancePtr,
    )
    -

    XEmacPs_SetOperatingSpeed sets the current operating link speed. For any traffic to be passed, this speed must match the current MII/GMII/SGMII/RGMII link speed.

    -
    Parameters:
    + +

    +XEmacPs_SetOperatingSpeed sets the current operating link speed. For any traffic to be passed, this speed must match the current MII/GMII/SGMII/RGMII link speed.

    +

    Parameters:
    InstancePtr references the TEMAC channel on which to operate.
    Speed is the speed to set in units of Mbps. Valid values are 10, 100, or 1000. XEmacPs_SetOperatingSpeed ignores invalid values.
    -
    -
    Note:
    +
    Note:
    -
    - +

    +

    - + @@ -1610,34 +1717,33 @@ - +
    int XEmacPs_SetOptions int XEmacPs_SetOptions ( XEmacPs *  InstancePtr,
    )
    -

    Set options for the driver/device. The driver should be stopped with XEmacPs_Stop() before changing options.

    -
    Parameters:
    + +

    +Set options for the driver/device. The driver should be stopped with XEmacPs_Stop() before changing options.

    +

    Parameters:
    InstancePtr is a pointer to the instance to be worked on.
    Options are the options to set. Multiple options can be set by OR'ing XTE_*_OPTIONS constants together. Options not specified are not affected.
    -
    -
    Returns:
      -
    • XST_SUCCESS if the options were set successfully
      • -
    • XST_DEVICE_IS_STARTED if the device has not yet been stopped
      • -
    +
    Returns:
      +
    • XST_SUCCESS if the options were set successfully
    • XST_DEVICE_IS_STARTED if the device has not yet been stopped
    -
    Note:
    See xemacps.h for a description of the available options.
    +
    Note:
    See xemacps.h for a description of the available options.
    -
    - +

    +

    - + @@ -1657,99 +1763,87 @@ - +
    int XEmacPs_SetTypeIdCheck int XEmacPs_SetTypeIdCheck ( XEmacPs *  InstancePtr,
    )
    -

    Set the Type ID match for this driver/device. The register is a 32-bit value. The device must be stopped before calling this function.

    -
    Parameters:
    + +

    +Set the Type ID match for this driver/device. The register is a 32-bit value. The device must be stopped before calling this function.

    +

    Parameters:
    InstancePtr is a pointer to the instance to be worked on.
    Id_Check is type ID to be configured.
    Index is a index to which Type ID (1-4).
    -
    -
    Returns:
      -
    • XST_SUCCESS if the MAC address was set successfully
      • -
    • XST_DEVICE_IS_STARTED if the device has not yet been stopped
      • -
    +
    Returns:
      +
    • XST_SUCCESS if the MAC address was set successfully
    • XST_DEVICE_IS_STARTED if the device has not yet been stopped
    -
    - +

    +

    - + - + - +
    void XEmacPs_Start void XEmacPs_Start ( XEmacPs *  InstancePtr InstancePtr  ) 
    -

    Start the Ethernet controller as follows:

    - -
    Parameters:
    + +

    +Start the Ethernet controller as follows:

      +
    • Enable transmitter if XTE_TRANSMIT_ENABLE_OPTION is set
    • Enable receiver if XTE_RECEIVER_ENABLE_OPTION is set
    • Start the SG DMA send and receive channels and enable the device interrupt
    +

    +

    Parameters:
    InstancePtr is a pointer to the instance to be worked on.
    -
    -
    Returns:
    N/A
    -
    Note:
    Hardware is configured with scatter-gather DMA, the driver expects to start the scatter-gather channels and expects that the user has previously set up the buffer descriptor lists.
    -

    This function makes use of internal resources that are shared between the Start, Stop, and Set/ClearOptions functions. So if one task might be setting device options while another is trying to start the device, the user is required to provide protection of this shared data (typically using a semaphore).

    -

    This function must not be preempted by an interrupt that may service the device.

    - +
    Returns:
    N/A
    +
    Note:
    Hardware is configured with scatter-gather DMA, the driver expects to start the scatter-gather channels and expects that the user has previously set up the buffer descriptor lists.
    +This function makes use of internal resources that are shared between the Start, Stop, and Set/ClearOptions functions. So if one task might be setting device options while another is trying to start the device, the user is required to provide protection of this shared data (typically using a semaphore).

    +This function must not be preempted by an interrupt that may service the device.

    -
    - +

    +

    - + - + - +
    void XEmacPs_Stop void XEmacPs_Stop ( XEmacPs *  InstancePtr InstancePtr  ) 
    -

    Gracefully stop the Ethernet MAC as follows:

    - -

    Device options currently in effect are not changed.

    -

    This function will disable all interrupts. Default interrupts settings that had been enabled will be restored when XEmacPs_Start() is called.

    -
    Parameters:
    + +

    +Gracefully stop the Ethernet MAC as follows:

      +
    • Disable all interrupts from this device
    • Stop DMA channels
    • Disable the tansmitter and receiver
    +

    +Device options currently in effect are not changed.

    +This function will disable all interrupts. Default interrupts settings that had been enabled will be restored when XEmacPs_Start() is called.

    +

    Parameters:
    InstancePtr is a pointer to the instance to be worked on.
    -
    -
    Note:
    This function makes use of internal resources that are shared between the Start, Stop, SetOptions, and ClearOptions functions. So if one task might be setting device options while another is trying to start the device, the user is required to provide protection of this shared data (typically using a semaphore).
    -

    Stopping the DMA channels causes this function to block until the DMA operation is complete.

    - +
    Note:
    This function makes use of internal resources that are shared between the Start, Stop, SetOptions, and ClearOptions functions. So if one task might be setting device options while another is trying to start the device, the user is required to provide protection of this shared data (typically using a semaphore).
    +Stopping the DMA channels causes this function to block until the DMA operation is complete.
    -
    - -

    -Copyright © 1995-2014 Xilinx, Inc. All rights reserved. -

    - - +

    +Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. diff --git a/XilinxProcessorIPLib/drivers/emacps/doc/html/api/xemacps__bd_8h.html b/XilinxProcessorIPLib/drivers/emacps/doc/html/api/xemacps__bd_8h.html index b165d286..70fafbf4 100755 --- a/XilinxProcessorIPLib/drivers/emacps/doc/html/api/xemacps__bd_8h.html +++ b/XilinxProcessorIPLib/drivers/emacps/doc/html/api/xemacps__bd_8h.html @@ -2,1174 +2,1230 @@ - Xilinx Driver emacps v2_1: xemacps_bd.h File Reference + xemacps_bd.h File Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - - - -
    -

    xemacps_bd.h File Reference

    #include <string.h>
    -#include "xil_types.h"
    -#include "xil_assert.h"
    - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -

    Defines

    #define XEMACPS_BD_H
    #define XEMACPS_DMABD_MINIMUM_ALIGNMENT   4
    #define XEMACPS_BD_NUM_WORDS   2
    #define XEmacPs_BdClear(BdPtr)   memset((BdPtr), 0, sizeof(XEmacPs_Bd))
    #define XEmacPs_BdRead(BaseAddress, Offset)   (*(u32*)((u32)(BaseAddress) + (u32)(Offset)))
    #define XEmacPs_BdWrite(BaseAddress, Offset, Data)   (*(u32*)((u32)(BaseAddress) + (u32)(Offset)) = (Data))
    #define XEmacPs_BdSetAddressTx(BdPtr, Addr)   (XEmacPs_BdWrite((BdPtr), XEMACPS_BD_ADDR_OFFSET, (u32)(Addr)))
    #define XEmacPs_BdSetAddressRx(BdPtr, Addr)
    #define XEmacPs_BdSetStatus(BdPtr, Data)
    #define XEmacPs_BdGetStatus(BdPtr)   XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET)
    #define XEmacPs_BdGetBufAddr(BdPtr)   (XEmacPs_BdRead((BdPtr), XEMACPS_BD_ADDR_OFFSET))
    #define XEmacPs_BdSetLength(BdPtr, LenBytes)
    #define XEmacPs_BdGetLength(BdPtr)
    #define XEmacPs_BdIsLast(BdPtr)
    #define XEmacPs_BdSetLast(BdPtr)
    #define XEmacPs_BdClearLast(BdPtr)
    #define XEmacPs_BdSetRxWrap(BdPtr)
    #define XEmacPs_BdIsRxWrap(BdPtr)
    #define XEmacPs_BdSetTxWrap(BdPtr)
    #define XEmacPs_BdIsTxWrap(BdPtr)
    #define XEmacPs_BdClearRxNew(BdPtr)
    #define XEmacPs_BdIsRxNew(BdPtr)
    #define XEmacPs_BdSetTxUsed(BdPtr)
    #define XEmacPs_BdClearTxUsed(BdPtr)
    #define XEmacPs_BdIsTxUsed(BdPtr)
    #define XEmacPs_BdIsTxRetry(BdPtr)
    #define XEmacPs_BdIsTxUrun(BdPtr)
    #define XEmacPs_BdIsTxExh(BdPtr)
    #define XEmacPs_BdSetTxNoCRC(BdPtr)
    #define XEmacPs_BdClearTxNoCRC(BdPtr)
    #define XEmacPs_BdIsRxBcast(BdPtr)
    #define XEmacPs_BdIsRxMultiHash(BdPtr)
    #define XEmacPs_BdIsRxUniHash(BdPtr)
    #define XEmacPs_BdIsRxVlan(BdPtr)
    #define XEmacPs_BdIsRxPri(BdPtr)
    #define XEmacPs_BdIsRxCFI(BdPtr)
    #define XEmacPs_BdIsRxEOF(BdPtr)
    #define XEmacPs_BdIsRxSOF(BdPtr)

    Typedefs

    typedef u32 XEmacPs_Bd [XEMACPS_BD_NUM_WORDS]
    -

    Detailed Description

    -

    This header provides operations to manage buffer descriptors in support of scatter-gather DMA.

    -

    The API exported by this header defines abstracted macros that allow the user to read/write specific BD fields.

    -

    Buffer Descriptors

    -

    A buffer descriptor (BD) defines a DMA transaction. The macros defined by this header file allow access to most fields within a BD to tailor a DMA transaction according to user and hardware requirements. See the hardware IP DMA spec for more information on BD fields and how they affect transfers.

    -

    The XEmacPs_Bd structure defines a BD. The organization of this structure is driven mainly by the hardware for use in scatter-gather DMA transfers.

    -

    Performance

    -

    Limiting I/O to BDs can improve overall performance of the DMA channel.

    + +
    +
    +
    +
    +

    xemacps_bd.h File Reference

    Detailed Description

    +This header provides operations to manage buffer descriptors in support of scatter-gather DMA.

    +The API exported by this header defines abstracted macros that allow the user to read/write specific BD fields.

    +Buffer Descriptors

    +A buffer descriptor (BD) defines a DMA transaction. The macros defined by this header file allow access to most fields within a BD to tailor a DMA transaction according to user and hardware requirements. See the hardware IP DMA spec for more information on BD fields and how they affect transfers.

    +The XEmacPs_Bd structure defines a BD. The organization of this structure is driven mainly by the hardware for use in scatter-gather DMA transfers.

    +Performance

    +Limiting I/O to BDs can improve overall performance of the DMA channel.

    - MODIFICATION HISTORY:
     Ver   Who  Date     Changes
+ MODIFICATION HISTORY:

    +

     Ver   Who  Date     Changes
  ----- ---- -------- -------------------------------------------------------
  1.00a wsy  01/10/10 First release
-

    ***************************************************************************

    -

    Define Documentation

    - +

    +*************************************************************************** +

    +#include <string.h>
    +#include "xil_types.h"
    +#include "xil_assert.h"
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    Defines

    #define XEMACPS_BD_H
    #define XEMACPS_DMABD_MINIMUM_ALIGNMENT   4
    #define XEMACPS_BD_NUM_WORDS   2
    #define XEmacPs_BdClear(BdPtr)   memset((BdPtr), 0, sizeof(XEmacPs_Bd))
    #define XEmacPs_BdRead(BaseAddress, Offset)   (*(u32*)((u32)(BaseAddress) + (u32)(Offset)))
    #define XEmacPs_BdWrite(BaseAddress, Offset, Data)   (*(u32*)((u32)(BaseAddress) + (u32)(Offset)) = (Data))
    #define XEmacPs_BdSetAddressTx(BdPtr, Addr)   (XEmacPs_BdWrite((BdPtr), XEMACPS_BD_ADDR_OFFSET, (u32)(Addr)))
    #define XEmacPs_BdSetAddressRx(BdPtr, Addr)
    #define XEmacPs_BdSetStatus(BdPtr, Data)
    #define XEmacPs_BdGetStatus(BdPtr)   XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET)
    #define XEmacPs_BdGetBufAddr(BdPtr)   (XEmacPs_BdRead((BdPtr), XEMACPS_BD_ADDR_OFFSET))
    #define XEmacPs_BdSetLength(BdPtr, LenBytes)
    #define XEmacPs_BdGetLength(BdPtr)
    #define XEmacPs_BdIsLast(BdPtr)
    #define XEmacPs_BdSetLast(BdPtr)
    #define XEmacPs_BdClearLast(BdPtr)
    #define XEmacPs_BdSetRxWrap(BdPtr)
    #define XEmacPs_BdIsRxWrap(BdPtr)
    #define XEmacPs_BdSetTxWrap(BdPtr)
    #define XEmacPs_BdIsTxWrap(BdPtr)
    #define XEmacPs_BdClearRxNew(BdPtr)
    #define XEmacPs_BdIsRxNew(BdPtr)
    #define XEmacPs_BdSetTxUsed(BdPtr)
    #define XEmacPs_BdClearTxUsed(BdPtr)
    #define XEmacPs_BdIsTxUsed(BdPtr)
    #define XEmacPs_BdIsTxRetry(BdPtr)
    #define XEmacPs_BdIsTxUrun(BdPtr)
    #define XEmacPs_BdIsTxExh(BdPtr)
    #define XEmacPs_BdSetTxNoCRC(BdPtr)
    #define XEmacPs_BdClearTxNoCRC(BdPtr)
    #define XEmacPs_BdIsRxBcast(BdPtr)
    #define XEmacPs_BdIsRxMultiHash(BdPtr)
    #define XEmacPs_BdIsRxUniHash(BdPtr)
    #define XEmacPs_BdIsRxVlan(BdPtr)
    #define XEmacPs_BdIsRxPri(BdPtr)
    #define XEmacPs_BdIsRxCFI(BdPtr)
    #define XEmacPs_BdIsRxEOF(BdPtr)
    #define XEmacPs_BdIsRxSOF(BdPtr)

    Typedefs

    typedef u32 XEmacPs_Bd [XEMACPS_BD_NUM_WORDS]
    +

    Define Documentation

    +
    - +
    #define XEMACPS_BD_H#define XEMACPS_BD_H
    +

    +

    -
    - +

    +

    - +
    #define XEMACPS_BD_NUM_WORDS   2#define XEMACPS_BD_NUM_WORDS   2
    -

    The XEmacPs_Bd is the type for buffer descriptors (BDs).

    +

    +The XEmacPs_Bd is the type for buffer descriptors (BDs).

    -
    - +

    +

    - + - + - +
    #define XEmacPs_BdClear#define XEmacPs_BdClear ( BdPtr   )    memset((BdPtr), 0, sizeof(XEmacPs_Bd))   memset((BdPtr), 0, sizeof(XEmacPs_Bd))
    -

    Zero out BD fields

    -
    Parameters:
    + +

    +Zero out BD fields

    +

    Parameters:
    BdPtr is the BD pointer to operate on
    -
    -
    Returns:
    Nothing
    -
    Note:
    C-style signature: void XEmacPs_BdClear(XEmacPs_Bd* BdPtr)
    +
    Returns:
    Nothing
    +
    Note:
    C-style signature: void XEmacPs_BdClear(XEmacPs_Bd* BdPtr)
    -
    - +

    +

    - + - + - +
    #define XEmacPs_BdClearLast#define XEmacPs_BdClearLast ( BdPtr   ) 
    -Value:
    (XEmacPs_BdWrite((BdPtr), XEMACPS_BD_STAT_OFFSET,             \
-    XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &             \
-    ~XEMACPS_TXBUF_LAST_MASK))
-

    Tell the DMA engine that the current packet does not end with the given BD.

    -
    Parameters:
    + +

    +Value:

    (XEmacPs_BdWrite((BdPtr), XEMACPS_BD_STAT_OFFSET,             \
+    XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &             \
+    ~XEMACPS_TXBUF_LAST_MASK))
+
    Tell the DMA engine that the current packet does not end with the given BD.

    +

    Parameters:
    BdPtr is the BD pointer to operate on
    -
    -
    Note:
    C-style signature: void XEmacPs_BdClearLast(XEmacPs_Bd* BdPtr)
    +
    Note:
    C-style signature: void XEmacPs_BdClearLast(XEmacPs_Bd* BdPtr)
    -
    - +

    +

    - + - + - +
    #define XEmacPs_BdClearRxNew#define XEmacPs_BdClearRxNew ( BdPtr   ) 
    -Value:
    (XEmacPs_BdWrite((BdPtr), XEMACPS_BD_ADDR_OFFSET,             \
-    XEmacPs_BdRead((BdPtr), XEMACPS_BD_ADDR_OFFSET) &             \
-    ~XEMACPS_RXBUF_NEW_MASK))
+
+
    
+Value:
    (XEmacPs_BdWrite((BdPtr), XEMACPS_BD_ADDR_OFFSET,             \
+    XEmacPs_BdRead((BdPtr), XEMACPS_BD_ADDR_OFFSET) &             \
+    ~XEMACPS_RXBUF_NEW_MASK))
    -
    - +

    +

    - + - + - +
    #define XEmacPs_BdClearTxNoCRC#define XEmacPs_BdClearTxNoCRC ( BdPtr   ) 
    -Value:
    (XEmacPs_BdWrite((BdPtr), XEMACPS_BD_STAT_OFFSET,             \
-    XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &             \
-    ~XEMACPS_TXBUF_NOCRC_MASK))
-

    Clear this bit, CRC will be appended to the current frame. This control bit must be set for the first buffer in a frame and will be ignored for the subsequent buffers of a frame.

    -
    Parameters:
    + +

    +Value:

    (XEmacPs_BdWrite((BdPtr), XEMACPS_BD_STAT_OFFSET,             \
+    XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &             \
+    ~XEMACPS_TXBUF_NOCRC_MASK))
+
    Clear this bit, CRC will be appended to the current frame. This control bit must be set for the first buffer in a frame and will be ignored for the subsequent buffers of a frame.

    +

    Parameters:
    BdPtr is the BD pointer to operate on
    -
    -
    Note:
    This bit must be clear when using the transmit checksum generation offload, otherwise checksum generation and substitution will not occur.
    -

    C-style signature: u32 XEmacPs_BdClearTxNoCRC(XEmacPs_Bd* BdPtr)

    - +
    Note:
    This bit must be clear when using the transmit checksum generation offload, otherwise checksum generation and substitution will not occur.
    +C-style signature: u32 XEmacPs_BdClearTxNoCRC(XEmacPs_Bd* BdPtr)
    -
    - +

    +

    - + - + - +
    #define XEmacPs_BdClearTxUsed#define XEmacPs_BdClearTxUsed ( BdPtr   ) 
    -Value:
    (XEmacPs_BdWrite((BdPtr), XEMACPS_BD_STAT_OFFSET,             \
-    XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &             \
-    ~XEMACPS_TXBUF_USED_MASK))
-

    Software clears this bit to enable the buffer to be read by the hardware. Hardware sets this bit for the first buffer of a frame once it has been successfully transmitted. This macro clears this bit of transmit BD.

    -
    Parameters:
    + +

    +Value:

    (XEmacPs_BdWrite((BdPtr), XEMACPS_BD_STAT_OFFSET,             \
+    XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &             \
+    ~XEMACPS_TXBUF_USED_MASK))
+
    Software clears this bit to enable the buffer to be read by the hardware. Hardware sets this bit for the first buffer of a frame once it has been successfully transmitted. This macro clears this bit of transmit BD.

    +

    Parameters:
    BdPtr is the BD pointer to operate on
    -
    -
    Note:
    C-style signature: void XEmacPs_BdClearTxUsed(XEmacPs_Bd* BdPtr)
    +
    Note:
    C-style signature: void XEmacPs_BdClearTxUsed(XEmacPs_Bd* BdPtr)
    -
    - +

    +

    - + - + - +
    #define XEmacPs_BdGetBufAddr#define XEmacPs_BdGetBufAddr ( BdPtr   )    (XEmacPs_BdRead((BdPtr), XEMACPS_BD_ADDR_OFFSET))   (XEmacPs_BdRead((BdPtr), XEMACPS_BD_ADDR_OFFSET))
    -

    Get the address (bits 0..31) of the BD's buffer address (word 0)

    -
    Parameters:
    + +

    +Get the address (bits 0..31) of the BD's buffer address (word 0)

    +

    Parameters:
    BdPtr is the BD pointer to operate on
    -
    -
    Note:
    C-style signature: u32 XEmacPs_BdGetBufAddr(XEmacPs_Bd* BdPtr)
    +
    Note:
    C-style signature: u32 XEmacPs_BdGetBufAddr(XEmacPs_Bd* BdPtr)
    -
    - +

    +

    - + - + - +
    #define XEmacPs_BdGetLength#define XEmacPs_BdGetLength ( BdPtr   ) 
    -Value:
    (XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &            \
-    XEMACPS_RXBUF_LEN_MASK)
-

    Retrieve the BD length field.

    -

    For Tx channels, the returned value is the same as that written with XEmacPs_BdSetLength().

    -

    For Rx channels, the returned value is the size of the received packet.

    -
    Parameters:
    + +

    +Value:

    (XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &            \
+    XEMACPS_RXBUF_LEN_MASK)
+
    Retrieve the BD length field.

    +For Tx channels, the returned value is the same as that written with XEmacPs_BdSetLength().

    +For Rx channels, the returned value is the size of the received packet.

    +

    Parameters:
    BdPtr is the BD pointer to operate on
    -
    -
    Returns:
    Length field processed by hardware or set by XEmacPs_BdSetLength().
    -
    Note:
    C-style signature: u32 XEmacPs_BdGetLength(XEmacPs_Bd* BdPtr) XEAMCPS_RXBUF_LEN_MASK is same as XEMACPS_TXBUF_LEN_MASK.
    +
    Returns:
    Length field processed by hardware or set by XEmacPs_BdSetLength().
    +
    Note:
    C-style signature: u32 XEmacPs_BdGetLength(XEmacPs_Bd* BdPtr) XEAMCPS_RXBUF_LEN_MASK is same as XEMACPS_TXBUF_LEN_MASK.
    -
    - +

    +

    - + - + - +
    #define XEmacPs_BdGetStatus#define XEmacPs_BdGetStatus ( BdPtr   )    XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET)   XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET)
    -

    Retrieve the BD's Packet DMA transfer status word (word 1).

    -
    Parameters:
    + +

    +Retrieve the BD's Packet DMA transfer status word (word 1).

    +

    Parameters:
    BdPtr is the BD pointer to operate on
    -
    -
    Returns:
    Status word
    -
    Note:
    C-style signature: u32 XEmacPs_BdGetStatus(XEmacPs_Bd* BdPtr)
    -

    Due to the BD bit layout differences in transmit and receive. User's caution is required.

    - +
    Returns:
    Status word
    +
    Note:
    C-style signature: u32 XEmacPs_BdGetStatus(XEmacPs_Bd* BdPtr)
    +Due to the BD bit layout differences in transmit and receive. User's caution is required.
    -
    - +

    +

    - + - + - +
    #define XEmacPs_BdIsLast#define XEmacPs_BdIsLast ( BdPtr   ) 
    -Value:
    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
-    XEMACPS_RXBUF_EOF_MASK) ? TRUE : FALSE)
-

    Test whether the given BD has been marked as the last BD of a packet.

    -
    Parameters:
    + +

    +Value:

    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
+    XEMACPS_RXBUF_EOF_MASK) ? TRUE : FALSE)
+
    Test whether the given BD has been marked as the last BD of a packet.

    +

    Parameters:
    BdPtr is the BD pointer to operate on
    -
    -
    Returns:
    TRUE if BD represents the "Last" BD of a packet, FALSE otherwise
    -
    Note:
    C-style signature: u32 XEmacPs_BdIsLast(XEmacPs_Bd* BdPtr)
    +
    Returns:
    TRUE if BD represents the "Last" BD of a packet, FALSE otherwise
    +
    Note:
    C-style signature: u32 XEmacPs_BdIsLast(XEmacPs_Bd* BdPtr)
    -
    - +

    +

    - + - + - +
    #define XEmacPs_BdIsRxBcast#define XEmacPs_BdIsRxBcast ( BdPtr   ) 
    -Value:
    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
-    XEMACPS_RXBUF_BCAST_MASK) ? TRUE : FALSE)
-

    Determine the broadcast bit of the receive BD.

    -
    Parameters:
    + +

    +Value:

    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
+    XEMACPS_RXBUF_BCAST_MASK) ? TRUE : FALSE)
+
    Determine the broadcast bit of the receive BD.

    +

    Parameters:
    BdPtr is the BD pointer to operate on
    -
    -
    Note:
    C-style signature: u32 XEmacPs_BdIsRxBcast(XEmacPs_Bd* BdPtr)
    +
    Note:
    C-style signature: u32 XEmacPs_BdIsRxBcast(XEmacPs_Bd* BdPtr)
    -
    - +

    +

    - + - + - +
    #define XEmacPs_BdIsRxCFI#define XEmacPs_BdIsRxCFI ( BdPtr   ) 
    -Value:
    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
-    XEMACPS_RXBUF_CFI_MASK) ? TRUE : FALSE)
-

    Determine if the received frame's Concatenation Format Indicator (CFI) of the frames VLANTCI field was set.

    -
    Parameters:
    + +

    +Value:

    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
+    XEMACPS_RXBUF_CFI_MASK) ? TRUE : FALSE)
+
    Determine if the received frame's Concatenation Format Indicator (CFI) of the frames VLANTCI field was set.

    +

    Parameters:
    BdPtr is the BD pointer to operate on
    -
    -
    Note:
    C-style signature: u32 XEmacPs_BdIsRxCFI(XEmacPs_Bd* BdPtr)
    +
    Note:
    C-style signature: u32 XEmacPs_BdIsRxCFI(XEmacPs_Bd* BdPtr)
    -
    - +

    +

    - + - + - +
    #define XEmacPs_BdIsRxEOF#define XEmacPs_BdIsRxEOF ( BdPtr   ) 
    -Value:
    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
-    XEMACPS_RXBUF_EOF_MASK) ? TRUE : FALSE)
-

    Determine the End Of Frame (EOF) bit of the receive BD.

    -
    Parameters:
    + +

    +Value:

    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
+    XEMACPS_RXBUF_EOF_MASK) ? TRUE : FALSE)
+
    Determine the End Of Frame (EOF) bit of the receive BD.

    +

    Parameters:
    BdPtr is the BD pointer to operate on
    -
    -
    Note:
    C-style signature: u32 XEmacPs_BdGetRxEOF(XEmacPs_Bd* BdPtr)
    +
    Note:
    C-style signature: u32 XEmacPs_BdGetRxEOF(XEmacPs_Bd* BdPtr)
    -
    - +

    +

    - + - + - +
    #define XEmacPs_BdIsRxMultiHash#define XEmacPs_BdIsRxMultiHash ( BdPtr   ) 
    -Value:
    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
-    XEMACPS_RXBUF_MULTIHASH_MASK) ? TRUE : FALSE)
-

    Determine the multicast hash bit of the receive BD.

    -
    Parameters:
    + +

    +Value:

    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
+    XEMACPS_RXBUF_MULTIHASH_MASK) ? TRUE : FALSE)
+
    Determine the multicast hash bit of the receive BD.

    +

    Parameters:
    BdPtr is the BD pointer to operate on
    -
    -
    Note:
    C-style signature: u32 XEmacPs_BdIsRxMultiHash(XEmacPs_Bd* BdPtr)
    +
    Note:
    C-style signature: u32 XEmacPs_BdIsRxMultiHash(XEmacPs_Bd* BdPtr)
    -
    - +

    +

    - + - + - +
    #define XEmacPs_BdIsRxNew#define XEmacPs_BdIsRxNew ( BdPtr   ) 
    -Value:
    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_ADDR_OFFSET) &           \
-    XEMACPS_RXBUF_NEW_MASK) ? TRUE : FALSE)
-

    Determine the new bit of the receive BD.

    -
    Parameters:
    + +

    +Value:

    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_ADDR_OFFSET) &           \
+    XEMACPS_RXBUF_NEW_MASK) ? TRUE : FALSE)
+
    Determine the new bit of the receive BD.

    +

    Parameters:
    BdPtr is the BD pointer to operate on
    -
    -
    Note:
    C-style signature: u32 XEmacPs_BdIsRxNew(XEmacPs_Bd* BdPtr)
    +
    Note:
    C-style signature: u32 XEmacPs_BdIsRxNew(XEmacPs_Bd* BdPtr)
    -
    - +

    +

    - + - + - +
    #define XEmacPs_BdIsRxPri#define XEmacPs_BdIsRxPri ( BdPtr   ) 
    -Value:
    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
-    XEMACPS_RXBUF_PRI_MASK) ? TRUE : FALSE)
-

    Determine if the received frame has Type ID of 8100h and null VLAN identifier(Priority tag).

    -
    Parameters:
    + +

    +Value:

    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
+    XEMACPS_RXBUF_PRI_MASK) ? TRUE : FALSE)
+
    Determine if the received frame has Type ID of 8100h and null VLAN identifier(Priority tag).

    +

    Parameters:
    BdPtr is the BD pointer to operate on
    -
    -
    Note:
    C-style signature: u32 XEmacPs_BdIsRxPri(XEmacPs_Bd* BdPtr)
    +
    Note:
    C-style signature: u32 XEmacPs_BdIsRxPri(XEmacPs_Bd* BdPtr)
    -
    - +

    +

    - + - + - +
    #define XEmacPs_BdIsRxSOF#define XEmacPs_BdIsRxSOF ( BdPtr   ) 
    -Value:
    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
-    XEMACPS_RXBUF_SOF_MASK) ? TRUE : FALSE)
-

    Determine the Start Of Frame (SOF) bit of the receive BD.

    -
    Parameters:
    + +

    +Value:

    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
+    XEMACPS_RXBUF_SOF_MASK) ? TRUE : FALSE)
+
    Determine the Start Of Frame (SOF) bit of the receive BD.

    +

    Parameters:
    BdPtr is the BD pointer to operate on
    -
    -
    Note:
    C-style signature: u32 XEmacPs_BdGetRxSOF(XEmacPs_Bd* BdPtr)
    +
    Note:
    C-style signature: u32 XEmacPs_BdGetRxSOF(XEmacPs_Bd* BdPtr)
    -
    - +

    +

    - + - + - +
    #define XEmacPs_BdIsRxUniHash#define XEmacPs_BdIsRxUniHash ( BdPtr   ) 
    -Value:
    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
-    XEMACPS_RXBUF_UNIHASH_MASK) ? TRUE : FALSE)
-

    Determine the unicast hash bit of the receive BD.

    -
    Parameters:
    + +

    +Value:

    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
+    XEMACPS_RXBUF_UNIHASH_MASK) ? TRUE : FALSE)
+
    Determine the unicast hash bit of the receive BD.

    +

    Parameters:
    BdPtr is the BD pointer to operate on
    -
    -
    Note:
    C-style signature: u32 XEmacPs_BdIsRxUniHash(XEmacPs_Bd* BdPtr)
    +
    Note:
    C-style signature: u32 XEmacPs_BdIsRxUniHash(XEmacPs_Bd* BdPtr)
    -
    - +

    +

    - + - + - +
    #define XEmacPs_BdIsRxVlan#define XEmacPs_BdIsRxVlan ( BdPtr   ) 
    -Value:
    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
-    XEMACPS_RXBUF_VLAN_MASK) ? TRUE : FALSE)
-

    Determine if the received frame is a VLAN Tagged frame.

    -
    Parameters:
    + +

    +Value:

    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
+    XEMACPS_RXBUF_VLAN_MASK) ? TRUE : FALSE)
+
    Determine if the received frame is a VLAN Tagged frame.

    +

    Parameters:
    BdPtr is the BD pointer to operate on
    -
    -
    Note:
    C-style signature: u32 XEmacPs_BdIsRxVlan(XEmacPs_Bd* BdPtr)
    +
    Note:
    C-style signature: u32 XEmacPs_BdIsRxVlan(XEmacPs_Bd* BdPtr)
    -
    - +

    +

    - + - + - +
    #define XEmacPs_BdIsRxWrap#define XEmacPs_BdIsRxWrap ( BdPtr   ) 
    -Value:
    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_ADDR_OFFSET) &           \
-    XEMACPS_RXBUF_WRAP_MASK) ? TRUE : FALSE)
-

    Determine the wrap bit of the receive BD which indicates end of the BD list.

    -
    Parameters:
    + +

    +Value:

    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_ADDR_OFFSET) &           \
+    XEMACPS_RXBUF_WRAP_MASK) ? TRUE : FALSE)
+
    Determine the wrap bit of the receive BD which indicates end of the BD list.

    +

    Parameters:
    BdPtr is the BD pointer to operate on
    -
    -
    Note:
    C-style signature: u32 XEmacPs_BdIsRxWrap(XEmacPs_Bd* BdPtr)
    +
    Note:
    C-style signature: u32 XEmacPs_BdIsRxWrap(XEmacPs_Bd* BdPtr)
    -
    - +

    +

    - + - + - +
    #define XEmacPs_BdIsTxExh#define XEmacPs_BdIsTxExh ( BdPtr   ) 
    -Value:
    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
-    XEMACPS_TXBUF_EXH_MASK) ? TRUE : FALSE)
-

    Determine if a frame fails to be transmitted due to buffer is exhausted mid-frame.

    -
    Parameters:
    + +

    +Value:

    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
+    XEMACPS_TXBUF_EXH_MASK) ? TRUE : FALSE)
+
    Determine if a frame fails to be transmitted due to buffer is exhausted mid-frame.

    +

    Parameters:
    BdPtr is the BD pointer to operate on
    -
    -
    Note:
    C-style signature: u32 XEmacPs_BdIsTxExh(XEmacPs_Bd* BdPtr)
    +
    Note:
    C-style signature: u32 XEmacPs_BdIsTxExh(XEmacPs_Bd* BdPtr)
    -
    - +

    +

    - + - + - +
    #define XEmacPs_BdIsTxRetry#define XEmacPs_BdIsTxRetry ( BdPtr   ) 
    -Value:
    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
-    XEMACPS_TXBUF_RETRY_MASK) ? TRUE : FALSE)
-

    Determine if a frame fails to be transmitted due to too many retries.

    -
    Parameters:
    + +

    +Value:

    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
+    XEMACPS_TXBUF_RETRY_MASK) ? TRUE : FALSE)
+
    Determine if a frame fails to be transmitted due to too many retries.

    +

    Parameters:
    BdPtr is the BD pointer to operate on
    -
    -
    Note:
    C-style signature: u32 XEmacPs_BdIsTxRetry(XEmacPs_Bd* BdPtr)
    +
    Note:
    C-style signature: u32 XEmacPs_BdIsTxRetry(XEmacPs_Bd* BdPtr)
    -
    - +

    +

    - + - + - +
    #define XEmacPs_BdIsTxUrun#define XEmacPs_BdIsTxUrun ( BdPtr   ) 
    -Value:
    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
-    XEMACPS_TXBUF_URUN_MASK) ? TRUE : FALSE)
-

    Determine if a frame fails to be transmitted due to data can not be feteched in time or buffers are exhausted.

    -
    Parameters:
    + +

    +Value:

    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
+    XEMACPS_TXBUF_URUN_MASK) ? TRUE : FALSE)
+
    Determine if a frame fails to be transmitted due to data can not be feteched in time or buffers are exhausted.

    +

    Parameters:
    BdPtr is the BD pointer to operate on
    -
    -
    Note:
    C-style signature: u32 XEmacPs_BdIsTxUrun(XEmacPs_Bd* BdPtr)
    +
    Note:
    C-style signature: u32 XEmacPs_BdIsTxUrun(XEmacPs_Bd* BdPtr)
    -
    - +

    +

    - + - + - +
    #define XEmacPs_BdIsTxUsed#define XEmacPs_BdIsTxUsed ( BdPtr   ) 
    -Value:
    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
-    XEMACPS_TXBUF_USED_MASK) ? TRUE : FALSE)
-

    Determine the used bit of the transmit BD.

    -
    Parameters:
    + +

    +Value:

    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
+    XEMACPS_TXBUF_USED_MASK) ? TRUE : FALSE)
+
    Determine the used bit of the transmit BD.

    +

    Parameters:
    BdPtr is the BD pointer to operate on
    -
    -
    Note:
    C-style signature: u32 XEmacPs_BdIsTxUsed(XEmacPs_Bd* BdPtr)
    +
    Note:
    C-style signature: u32 XEmacPs_BdIsTxUsed(XEmacPs_Bd* BdPtr)
    -
    - +

    +

    - + - + - +
    #define XEmacPs_BdIsTxWrap#define XEmacPs_BdIsTxWrap ( BdPtr   ) 
    -Value:
    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
-    XEMACPS_TXBUF_WRAP_MASK) ? TRUE : FALSE)
-

    Determine the wrap bit of the transmit BD which indicates end of the BD list.

    -
    Parameters:
    + +

    +Value:

    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
+    XEMACPS_TXBUF_WRAP_MASK) ? TRUE : FALSE)
+
    Determine the wrap bit of the transmit BD which indicates end of the BD list.

    +

    Parameters:
    BdPtr is the BD pointer to operate on
    -
    -
    Note:
    C-style signature: u32 XEmacPs_BdGetTxWrap(XEmacPs_Bd* BdPtr)
    +
    Note:
    C-style signature: u32 XEmacPs_BdGetTxWrap(XEmacPs_Bd* BdPtr)
    -
    - +

    +

    - + - - - + - + - +
    #define XEmacPs_BdRead#define XEmacPs_BdRead (BaseAddress,
    BaseAddress,
    Offset   )    (*(u32*)((u32)(BaseAddress) + (u32)(Offset)))   (*(u32*)((u32)(BaseAddress) + (u32)(Offset)))
    -

    Read the given Buffer Descriptor word.

    -
    Parameters:
    + +

    +Read the given Buffer Descriptor word.

    +

    Parameters:
    BaseAddress is the base address of the BD to read
    Offset is the word offset to be read
    -
    -
    Returns:
    The 32-bit value of the field
    -
    Note:
    C-style signature: u32 XEmacPs_BdRead(u32 BaseAddress, u32 Offset)
    +
    Returns:
    The 32-bit value of the field
    +
    Note:
    C-style signature: u32 XEmacPs_BdRead(u32 BaseAddress, u32 Offset)
    -
    - +

    +

    - + - - - + - + - +
    #define XEmacPs_BdSetAddressRx#define XEmacPs_BdSetAddressRx (BdPtr,
    BdPtr,
    Addr   ) 
    -Value:
    XEmacPs_BdWrite((BdPtr), XEMACPS_BD_ADDR_OFFSET,              \
-    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_ADDR_OFFSET) &           \
-    ~XEMACPS_RXBUF_ADD_MASK) | (u32)(Addr)))
-

    Set the BD's Address field (word 0).

    -
    Parameters:
    + +

    +Value:

    XEmacPs_BdWrite((BdPtr), XEMACPS_BD_ADDR_OFFSET,              \
+    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_ADDR_OFFSET) &           \
+    ~XEMACPS_RXBUF_ADD_MASK) | (u32)(Addr)))
+
    Set the BD's Address field (word 0).

    +

    Parameters:
    BdPtr is the BD pointer to operate on
    Addr is the value to write to BD's status field.
    -
    -
    Note:
    : Due to some bits are mixed within recevie BD's address field, read-modify-write is performed.
    -

    C-style signature: void XEmacPs_BdSetAddressRx(XEmacPs_Bd* BdPtr, u32 Addr)

    - +
    Note:
    : Due to some bits are mixed within recevie BD's address field, read-modify-write is performed.
    +C-style signature: void XEmacPs_BdSetAddressRx(XEmacPs_Bd* BdPtr, u32 Addr)
    -
    - +

    +

    - + - - - + - + - +
    #define XEmacPs_BdSetAddressTx#define XEmacPs_BdSetAddressTx (BdPtr,
    BdPtr,
    Addr   )    (XEmacPs_BdWrite((BdPtr), XEMACPS_BD_ADDR_OFFSET, (u32)(Addr)))   (XEmacPs_BdWrite((BdPtr), XEMACPS_BD_ADDR_OFFSET, (u32)(Addr)))
    -

    Set the BD's Address field (word 0).

    -
    Parameters:
    + +

    +Set the BD's Address field (word 0).

    +

    Parameters:
    BdPtr is the BD pointer to operate on
    Addr is the value to write to BD's status field.
    -
    -
    Note:
    :
    -

    C-style signature: void XEmacPs_BdSetAddressTx(XEmacPs_Bd* BdPtr, u32 Addr)

    - +
    Note:
    :
    +C-style signature: void XEmacPs_BdSetAddressTx(XEmacPs_Bd* BdPtr, u32 Addr)
    -
    - +

    +

    - + - + - +
    #define XEmacPs_BdSetLast#define XEmacPs_BdSetLast ( BdPtr   ) 
    -Value:
    (XEmacPs_BdWrite((BdPtr), XEMACPS_BD_STAT_OFFSET,             \
-    XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) |             \
-    XEMACPS_TXBUF_LAST_MASK))
-

    Tell the DMA engine that the given transmit BD marks the end of the current packet to be processed.

    -
    Parameters:
    + +

    +Value:

    (XEmacPs_BdWrite((BdPtr), XEMACPS_BD_STAT_OFFSET,             \
+    XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) |             \
+    XEMACPS_TXBUF_LAST_MASK))
+
    Tell the DMA engine that the given transmit BD marks the end of the current packet to be processed.

    +

    Parameters:
    BdPtr is the BD pointer to operate on
    -
    -
    Note:
    C-style signature: void XEmacPs_BdSetLast(XEmacPs_Bd* BdPtr)
    +
    Note:
    C-style signature: void XEmacPs_BdSetLast(XEmacPs_Bd* BdPtr)
    -
    - +

    +

    - + - - - + - + - +
    #define XEmacPs_BdSetLength#define XEmacPs_BdSetLength (BdPtr,
    BdPtr,
    LenBytes   ) 
    -Value:
    XEmacPs_BdWrite((BdPtr), XEMACPS_BD_STAT_OFFSET,              \
-    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
-    ~XEMACPS_TXBUF_LEN_MASK) | (LenBytes)))
-

    Set transfer length in bytes for the given BD. The length must be set each time a BD is submitted to hardware.

    -
    Parameters:
    + +

    +Value:

    XEmacPs_BdWrite((BdPtr), XEMACPS_BD_STAT_OFFSET,              \
+    ((XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) &           \
+    ~XEMACPS_TXBUF_LEN_MASK) | (LenBytes)))
+
    Set transfer length in bytes for the given BD. The length must be set each time a BD is submitted to hardware.

    +

    Parameters:
    BdPtr is the BD pointer to operate on
    LenBytes is the number of bytes to transfer.
    -
    -
    Note:
    C-style signature: void XEmacPs_BdSetLength(XEmacPs_Bd* BdPtr, u32 LenBytes)
    +
    Note:
    C-style signature: void XEmacPs_BdSetLength(XEmacPs_Bd* BdPtr, u32 LenBytes)
    -
    - +

    +

    - + - + - +
    #define XEmacPs_BdSetRxWrap#define XEmacPs_BdSetRxWrap ( BdPtr   ) 
    -Value:
    (XEmacPs_BdWrite((BdPtr), XEMACPS_BD_ADDR_OFFSET,             \
-    XEmacPs_BdRead((BdPtr), XEMACPS_BD_ADDR_OFFSET) |             \
-    XEMACPS_RXBUF_WRAP_MASK))
-

    Set this bit to mark the last descriptor in the receive buffer descriptor list.

    -
    Parameters:
    + +

    +Value:

    (XEmacPs_BdWrite((BdPtr), XEMACPS_BD_ADDR_OFFSET,             \
+    XEmacPs_BdRead((BdPtr), XEMACPS_BD_ADDR_OFFSET) |             \
+    XEMACPS_RXBUF_WRAP_MASK))
+
    Set this bit to mark the last descriptor in the receive buffer descriptor list.

    +

    Parameters:
    BdPtr is the BD pointer to operate on
    -
    -
    Note:
    C-style signature: void XEmacPs_BdSetRxWrap(XEmacPs_Bd* BdPtr)
    +
    Note:
    C-style signature: void XEmacPs_BdSetRxWrap(XEmacPs_Bd* BdPtr)
    -
    - +

    +

    - + - - - + - + - +
    #define XEmacPs_BdSetStatus#define XEmacPs_BdSetStatus (BdPtr,
    BdPtr,
    Data   ) 
    -Value:
    XEmacPs_BdWrite((BdPtr), XEMACPS_BD_STAT_OFFSET,              \
-    XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) | Data)
-

    Set the BD's Status field (word 1).

    -
    Parameters:
    + +

    +Value:

    XEmacPs_BdWrite((BdPtr), XEMACPS_BD_STAT_OFFSET,              \
+    XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) | Data)
+
    Set the BD's Status field (word 1).

    +

    Parameters:
    BdPtr is the BD pointer to operate on
    Data is the value to write to BD's status field.
    -
    -
    Note:
    C-style signature: void XEmacPs_BdSetStatus(XEmacPs_Bd* BdPtr, u32 Data)
    +
    Note:
    C-style signature: void XEmacPs_BdSetStatus(XEmacPs_Bd* BdPtr, u32 Data)
    -
    - +

    +

    - + - + - +
    #define XEmacPs_BdSetTxNoCRC#define XEmacPs_BdSetTxNoCRC ( BdPtr   ) 
    -Value:
    (XEmacPs_BdWrite((BdPtr), XEMACPS_BD_STAT_OFFSET,             \
-    XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) |             \
-    XEMACPS_TXBUF_NOCRC_MASK))
-

    Sets this bit, no CRC will be appended to the current frame. This control bit must be set for the first buffer in a frame and will be ignored for the subsequent buffers of a frame.

    -
    Parameters:
    + +

    +Value:

    (XEmacPs_BdWrite((BdPtr), XEMACPS_BD_STAT_OFFSET,             \
+    XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) |             \
+    XEMACPS_TXBUF_NOCRC_MASK))
+
    Sets this bit, no CRC will be appended to the current frame. This control bit must be set for the first buffer in a frame and will be ignored for the subsequent buffers of a frame.

    +

    Parameters:
    BdPtr is the BD pointer to operate on
    -
    -
    Note:
    This bit must be clear when using the transmit checksum generation offload, otherwise checksum generation and substitution will not occur.
    -

    C-style signature: u32 XEmacPs_BdSetTxNoCRC(XEmacPs_Bd* BdPtr)

    - +
    Note:
    This bit must be clear when using the transmit checksum generation offload, otherwise checksum generation and substitution will not occur.
    +C-style signature: u32 XEmacPs_BdSetTxNoCRC(XEmacPs_Bd* BdPtr)
    -
    - +

    +

    - + - + - +
    #define XEmacPs_BdSetTxUsed#define XEmacPs_BdSetTxUsed ( BdPtr   ) 
    -Value:
    (XEmacPs_BdWrite((BdPtr), XEMACPS_BD_STAT_OFFSET,             \
-    XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) |             \
-    XEMACPS_TXBUF_USED_MASK))
-

    Software sets this bit to disable the buffer to be read by the hardware. Hardware sets this bit for the first buffer of a frame once it has been successfully transmitted. This macro sets this bit of transmit BD to avoid confusion.

    -
    Parameters:
    + +

    +Value:

    (XEmacPs_BdWrite((BdPtr), XEMACPS_BD_STAT_OFFSET,             \
+    XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) |             \
+    XEMACPS_TXBUF_USED_MASK))
+
    Software sets this bit to disable the buffer to be read by the hardware. Hardware sets this bit for the first buffer of a frame once it has been successfully transmitted. This macro sets this bit of transmit BD to avoid confusion.

    +

    Parameters:
    BdPtr is the BD pointer to operate on
    -
    -
    Note:
    C-style signature: void XEmacPs_BdSetTxUsed(XEmacPs_Bd* BdPtr)
    +
    Note:
    C-style signature: void XEmacPs_BdSetTxUsed(XEmacPs_Bd* BdPtr)
    -
    - +

    +

    - + - + - +
    #define XEmacPs_BdSetTxWrap#define XEmacPs_BdSetTxWrap ( BdPtr   ) 
    -Value:
    (XEmacPs_BdWrite((BdPtr), XEMACPS_BD_STAT_OFFSET,             \
-    XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) |             \
-    XEMACPS_TXBUF_WRAP_MASK))
-

    Sets this bit to mark the last descriptor in the transmit buffer descriptor list.

    -
    Parameters:
    + +

    +Value:

    (XEmacPs_BdWrite((BdPtr), XEMACPS_BD_STAT_OFFSET,             \
+    XEmacPs_BdRead((BdPtr), XEMACPS_BD_STAT_OFFSET) |             \
+    XEMACPS_TXBUF_WRAP_MASK))
+
    Sets this bit to mark the last descriptor in the transmit buffer descriptor list.

    +

    Parameters:
    BdPtr is the BD pointer to operate on
    -
    -
    Note:
    C-style signature: void XEmacPs_BdSetTxWrap(XEmacPs_Bd* BdPtr)
    +
    Note:
    C-style signature: void XEmacPs_BdSetTxWrap(XEmacPs_Bd* BdPtr)
    -
    - +

    +

    - + - - - + - - - + - + - +
    #define XEmacPs_BdWrite#define XEmacPs_BdWrite (BaseAddress,
    BaseAddress,
    Offset,
    Offset,
    Data   )    (*(u32*)((u32)(BaseAddress) + (u32)(Offset)) = (Data))   (*(u32*)((u32)(BaseAddress) + (u32)(Offset)) = (Data))
    -

    Write the given Buffer Descriptor word.

    -
    Parameters:
    + +

    +Write the given Buffer Descriptor word.

    +

    Parameters:
    BaseAddress is the base address of the BD to write
    Offset is the word offset to be written
    Data is the 32-bit value to write to the field
    -
    -
    Returns:
    None.
    -
    Note:
    C-style signature: void XEmacPs_BdWrite(u32 BaseAddress, u32 Offset, u32 Data)
    +
    Returns:
    None.
    +
    Note:
    C-style signature: void XEmacPs_BdWrite(u32 BaseAddress, u32 Offset, u32 Data)
    -
    - +

    +

    - +
    #define XEMACPS_DMABD_MINIMUM_ALIGNMENT   4#define XEMACPS_DMABD_MINIMUM_ALIGNMENT   4
    +

    +

    -
    -

    Typedef Documentation

    - +

    +

    Typedef Documentation

    +
    - +
    typedef u32 XEmacPs_Bd[XEMACPS_BD_NUM_WORDS]typedef u32 XEmacPs_Bd[XEMACPS_BD_NUM_WORDS]
    +

    +

    -
    - -

    -Copyright © 1995-2014 Xilinx, Inc. All rights reserved. -

    - - +

    +Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. diff --git a/XilinxProcessorIPLib/drivers/emacps/doc/html/api/xemacps__bdring_8c.html b/XilinxProcessorIPLib/drivers/emacps/doc/html/api/xemacps__bdring_8c.html index 9f280a0c..9553f107 100755 --- a/XilinxProcessorIPLib/drivers/emacps/doc/html/api/xemacps__bdring_8c.html +++ b/XilinxProcessorIPLib/drivers/emacps/doc/html/api/xemacps__bdring_8c.html @@ -2,57 +2,30 @@ - Xilinx Driver emacps v2_1: xemacps_bdring.c File Reference + xemacps_bdring.c File Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - - - -
    -

    xemacps_bdring.c File Reference

    #include "xstatus.h"
    -#include "xil_cache.h"
    -#include "xemacps_hw.h"
    -#include "xemacps_bd.h"
    -#include "xemacps_bdring.h"
    - - - - - - - - - - - - - - - - -

    Defines

    #define XEMACPS_PHYS_TO_VIRT(BdPtr)   ((u32)BdPtr + (RingPtr->BaseBdAddr - RingPtr->PhysBaseAddr))
    #define XEMACPS_VIRT_TO_PHYS(BdPtr)   ((u32)BdPtr - (RingPtr->BaseBdAddr - RingPtr->PhysBaseAddr))
    #define XEMACPS_RING_SEEKAHEAD(RingPtr, BdPtr, NumBd)
    #define XEMACPS_RING_SEEKBACK(RingPtr, BdPtr, NumBd)

    Functions

    int XEmacPs_BdRingCreate (XEmacPs_BdRing *RingPtr, u32 PhysAddr, u32 VirtAddr, u32 Alignment, unsigned BdCount)
    int XEmacPs_BdRingClone (XEmacPs_BdRing *RingPtr, XEmacPs_Bd *SrcBdPtr, u8 Direction)
    int XEmacPs_BdRingAlloc (XEmacPs_BdRing *RingPtr, unsigned NumBd, XEmacPs_Bd **BdSetPtr)
    int XEmacPs_BdRingUnAlloc (XEmacPs_BdRing *RingPtr, unsigned NumBd, XEmacPs_Bd *BdSetPtr)
    int XEmacPs_BdRingToHw (XEmacPs_BdRing *RingPtr, unsigned NumBd, XEmacPs_Bd *BdSetPtr)
    unsigned XEmacPs_BdRingFromHwTx (XEmacPs_BdRing *RingPtr, unsigned BdLimit, XEmacPs_Bd **BdSetPtr)
    unsigned XEmacPs_BdRingFromHwRx (XEmacPs_BdRing *RingPtr, unsigned BdLimit, XEmacPs_Bd **BdSetPtr)
    int XEmacPs_BdRingFree (XEmacPs_BdRing *RingPtr, unsigned NumBd, XEmacPs_Bd *BdSetPtr)
    int XEmacPs_BdRingCheck (XEmacPs_BdRing *RingPtr, u8 Direction)
    -

    Detailed Description

    -

    This file implements buffer descriptor ring related functions.

    + +
    +
    +
    +
    +

    xemacps_bdring.c File Reference

    Detailed Description

    +This file implements buffer descriptor ring related functions.

    - MODIFICATION HISTORY:
     Ver   Who  Date     Changes
+ MODIFICATION HISTORY:

    +

     Ver   Who  Date     Changes
  ----- ---- -------- -------------------------------------------------------
  1.00a wsy  01/10/10 First release
  1.00a asa  11/21/11 The function XEmacPs_BdRingFromHwTx is modified.
@@ -66,50 +39,88 @@
  1.05a asa  09/23/13 Cache operations on BDs are not required and hence
 		      removed. It is expected that all BDs are allocated in
 		      from uncached area. Fix for CR #663885.
-

    Define Documentation

    - + +

    +#include "xstatus.h"
    +#include "xil_cache.h"
    +#include "xemacps_hw.h"
    +#include "xemacps_bd.h"
    +#include "xemacps_bdring.h"
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    Defines

    #define XEMACPS_PHYS_TO_VIRT(BdPtr)   ((u32)BdPtr + (RingPtr->BaseBdAddr - RingPtr->PhysBaseAddr))
    #define XEMACPS_VIRT_TO_PHYS(BdPtr)   ((u32)BdPtr - (RingPtr->BaseBdAddr - RingPtr->PhysBaseAddr))
    #define XEMACPS_RING_SEEKAHEAD(RingPtr, BdPtr, NumBd)
    #define XEMACPS_RING_SEEKBACK(RingPtr, BdPtr, NumBd)

    Functions

    int XEmacPs_BdRingCreate (XEmacPs_BdRing *RingPtr, u32 PhysAddr, u32 VirtAddr, u32 Alignment, unsigned BdCount)
    int XEmacPs_BdRingClone (XEmacPs_BdRing *RingPtr, XEmacPs_Bd *SrcBdPtr, u8 Direction)
    int XEmacPs_BdRingAlloc (XEmacPs_BdRing *RingPtr, unsigned NumBd, XEmacPs_Bd **BdSetPtr)
    int XEmacPs_BdRingUnAlloc (XEmacPs_BdRing *RingPtr, unsigned NumBd, XEmacPs_Bd *BdSetPtr)
    int XEmacPs_BdRingToHw (XEmacPs_BdRing *RingPtr, unsigned NumBd, XEmacPs_Bd *BdSetPtr)
    unsigned XEmacPs_BdRingFromHwTx (XEmacPs_BdRing *RingPtr, unsigned BdLimit, XEmacPs_Bd **BdSetPtr)
    unsigned XEmacPs_BdRingFromHwRx (XEmacPs_BdRing *RingPtr, unsigned BdLimit, XEmacPs_Bd **BdSetPtr)
    int XEmacPs_BdRingFree (XEmacPs_BdRing *RingPtr, unsigned NumBd, XEmacPs_Bd *BdSetPtr)
    int XEmacPs_BdRingCheck (XEmacPs_BdRing *RingPtr, u8 Direction)
    +

    Define Documentation

    +
    - + - + - +
    #define XEMACPS_PHYS_TO_VIRT#define XEMACPS_PHYS_TO_VIRT ( BdPtr   )    ((u32)BdPtr + (RingPtr->BaseBdAddr - RingPtr->PhysBaseAddr))   ((u32)BdPtr + (RingPtr->BaseBdAddr - RingPtr->PhysBaseAddr))
    +

    +

    -
    - +

    +

    - + - - - + - - - + - + - +
    #define XEMACPS_RING_SEEKAHEAD#define XEMACPS_RING_SEEKAHEAD (RingPtr,
    RingPtr,
    BdPtr,
    BdPtr,
    NumBd   ) 
    + +

    Value:

    {                                                                   \
         u32 Addr = (u32)BdPtr;                                  \
                                                                         \
@@ -119,36 +130,34 @@
             Addr -= (RingPtr)->Length;                                  \
         }                                                               \
                                                                         \
-        BdPtr = (XEmacPs_Bd*)Addr;                                     \
+        BdPtr = (XEmacPs_Bd*)Addr;                                     \
     }
    -
    - +

    +

    - + - - - + - - - + - + - +
    #define XEMACPS_RING_SEEKBACK#define XEMACPS_RING_SEEKBACK (RingPtr,
    RingPtr,
    BdPtr,
    BdPtr,
    NumBd   ) 
    + +

    Value:

    {                                                                   \
         u32 Addr = (u32)BdPtr;                                  \
                                                                         \
@@ -158,36 +167,38 @@
             Addr += (RingPtr)->Length;                                  \
         }                                                               \
                                                                         \
-        BdPtr = (XEmacPs_Bd*)Addr;                                     \
+        BdPtr = (XEmacPs_Bd*)Addr;                                     \
     }
    -
    - +

    +

    - + - + - +
    #define XEMACPS_VIRT_TO_PHYS#define XEMACPS_VIRT_TO_PHYS ( BdPtr   )    ((u32)BdPtr - (RingPtr->BaseBdAddr - RingPtr->PhysBaseAddr))   ((u32)BdPtr - (RingPtr->BaseBdAddr - RingPtr->PhysBaseAddr))
    +

    +

    -
    -

    Function Documentation

    - +

    +

    Function Documentation

    +
    - + @@ -201,69 +212,74 @@ - + - +
    int XEmacPs_BdRingAlloc int XEmacPs_BdRingAlloc ( XEmacPs_BdRing *  RingPtr,
    XEmacPs_Bd ** XEmacPs_Bd **  BdSetPtr 
    )
    -

    Reserve locations in the BD list. The set of returned BDs may be modified in preparation for future DMA transaction(s). Once the BDs are ready to be submitted to hardware, the user must call XEmacPs_BdRingToHw() in the same order which they were allocated here. Example:

    + +

    +Reserve locations in the BD list. The set of returned BDs may be modified in preparation for future DMA transaction(s). Once the BDs are ready to be submitted to hardware, the user must call XEmacPs_BdRingToHw() in the same order which they were allocated here. Example:

             NumBd = 2;
-        Status = XEmacPs_BdRingAlloc(MyRingPtr, NumBd, &MyBdSet);
            if (Status != XST_SUCCESS)
+        Status = XEmacPs_BdRingAlloc(MyRingPtr, NumBd, &MyBdSet);

    +

            if (Status != XST_SUCCESS)
         {
             // Not enough BDs available for the request
-        }
            CurBd = MyBdSet;
+        }

    +

            CurBd = MyBdSet;
         for (i=0; i<NumBd; i++)
         {
-            // Prepare CurBd.....
                // Onto next BD
-            CurBd = XEmacPs_BdRingNext(MyRingPtr, CurBd);
-        }
            // Give list to hardware
+            // Prepare CurBd.....

    +

                // Onto next BD
+            CurBd = XEmacPs_BdRingNext(MyRingPtr, CurBd);
+        }

    +

            // Give list to hardware
         Status = XEmacPs_BdRingToHw(MyRingPtr, NumBd, MyBdSet);
-

    A more advanced use of this function may allocate multiple sets of BDs. They must be allocated and given to hardware in the correct sequence:

    -
    +

    +A more advanced use of this function may allocate multiple sets of BDs. They must be allocated and given to hardware in the correct sequence: 

             // Legal
         XEmacPs_BdRingAlloc(MyRingPtr, NumBd1, &MySet1);
-        XEmacPs_BdRingToHw(MyRingPtr, NumBd1, MySet1);
            // Legal
+        XEmacPs_BdRingToHw(MyRingPtr, NumBd1, MySet1);

    +

            // Legal
         XEmacPs_BdRingAlloc(MyRingPtr, NumBd1, &MySet1);
         XEmacPs_BdRingAlloc(MyRingPtr, NumBd2, &MySet2);
         XEmacPs_BdRingToHw(MyRingPtr, NumBd1, MySet1);
-        XEmacPs_BdRingToHw(MyRingPtr, NumBd2, MySet2);
            // Not legal
+        XEmacPs_BdRingToHw(MyRingPtr, NumBd2, MySet2);

    +

            // Not legal
         XEmacPs_BdRingAlloc(MyRingPtr, NumBd1, &MySet1);
         XEmacPs_BdRingAlloc(MyRingPtr, NumBd2, &MySet2);
         XEmacPs_BdRingToHw(MyRingPtr, NumBd2, MySet2);
         XEmacPs_BdRingToHw(MyRingPtr, NumBd1, MySet1);
-

    Use the API defined in xemacps_bd.h to modify individual BDs. Traversal of the BD set can be done using XEmacPs_BdRingNext() and XEmacPs_BdRingPrev().

    -
    Parameters:
    +

    +Use the API defined in xemacps_bd.h to modify individual BDs. Traversal of the BD set can be done using XEmacPs_BdRingNext() and XEmacPs_BdRingPrev().

    +

    Parameters:
    RingPtr is a pointer to the BD ring instance to be worked on.
    NumBd is the number of BDs to allocate
    BdSetPtr is an output parameter, it points to the first BD available for modification.
    -
    -
    Returns:
      -
    • XST_SUCCESS if the requested number of BDs was returned in the BdSetPtr parameter.
      • -
    • XST_FAILURE if there were not enough free BDs to satisfy the request.
      • -
    +
    Returns:
      +
    • XST_SUCCESS if the requested number of BDs was returned in the BdSetPtr parameter.
    • XST_FAILURE if there were not enough free BDs to satisfy the request.
    -
    Note:
    This function should not be preempted by another XEmacPs_Bd function call that modifies the BD space. It is the caller's responsibility to provide a mutual exclusion mechanism.
    -
    +
    Note:
    This function should not be preempted by another XEmacPs_Bd function call that modifies the BD space. It is the caller's responsibility to provide a mutual exclusion mechanism.

    Do not modify more BDs than the number requested with the NumBd parameter. Doing so will lead to data corruption and system instability.

    -
    - +

    +

    - + @@ -277,42 +293,37 @@ Do not modify more BDs than the number requested with the NumBd parameter. Doing - +
    int XEmacPs_BdRingCheck int XEmacPs_BdRingCheck ( XEmacPs_BdRing *  RingPtr,
    )
    -

    Check the internal data structures of the BD ring for the provided channel. The following checks are made:

    + +

    +Check the internal data structures of the BD ring for the provided channel. The following checks are made:

    -

    The channel should be stopped prior to calling this function.

    -
    Parameters:
    +
  • Is the BD ring linked correctly in physical address space.
  • Do the internal pointers point to BDs in the ring.
  • Do the internal counters add up.
    • +

    +The channel should be stopped prior to calling this function.

    +

    Parameters:
    RingPtr is a pointer to the instance to be worked on.
    Direction is either XEMACPS_SEND or XEMACPS_RECV that indicates which direction.
    -
    -
    Returns:
      -
    • XST_SUCCESS if the set of BDs was freed.
      • -
    • XST_DMA_SG_NO_LIST if the list has not been created.
      • -
    • XST_IS_STARTED if the channel is not stopped.
      • -
    • XST_DMA_SG_LIST_ERROR if a problem is found with the internal data structures. If this value is returned, the channel should be reset to avoid data corruption or system instability.
      • -
    +
    Returns:
      +
    • XST_SUCCESS if the set of BDs was freed.
    • XST_DMA_SG_NO_LIST if the list has not been created.
    • XST_IS_STARTED if the channel is not stopped.
    • XST_DMA_SG_LIST_ERROR if a problem is found with the internal data structures. If this value is returned, the channel should be reset to avoid data corruption or system instability.
    -
    Note:
    This function should not be preempted by another XEmacPs_Bd function call that modifies the BD space. It is the caller's responsibility to provide a mutual exclusion mechanism.
    +
    Note:
    This function should not be preempted by another XEmacPs_Bd function call that modifies the BD space. It is the caller's responsibility to provide a mutual exclusion mechanism.
    -
    - +

    +

    - + @@ -320,7 +331,7 @@ Do not modify more BDs than the number requested with the NumBd parameter. Doing - + @@ -332,37 +343,34 @@ Do not modify more BDs than the number requested with the NumBd parameter. Doing - +
    int XEmacPs_BdRingClone int XEmacPs_BdRingClone ( XEmacPs_BdRing *  RingPtr,
    XEmacPs_Bd * XEmacPs_Bd *  SrcBdPtr,
    )
    -

    Clone the given BD into every BD in the list. every field of the source BD is replicated in every BD of the list.

    -

    This function can be called only when all BDs are in the free group such as they are immediately after initialization with XEmacPs_BdRingCreate(). This prevents modification of BDs while they are in use by hardware or the user.

    -
    Parameters:
    + +

    +Clone the given BD into every BD in the list. every field of the source BD is replicated in every BD of the list.

    +This function can be called only when all BDs are in the free group such as they are immediately after initialization with XEmacPs_BdRingCreate(). This prevents modification of BDs while they are in use by hardware or the user.

    +

    Parameters:
    RingPtr is the pointer of BD ring instance to be worked on.
    SrcBdPtr is the source BD template to be cloned into the list. This BD will be modified.
    Direction is either XEMACPS_SEND or XEMACPS_RECV that indicates which direction.
    -
    -
    Returns:
      -
    • XST_SUCCESS if the list was modified.
      • -
    • XST_DMA_SG_NO_LIST if a list has not been created.
      • -
    • XST_DMA_SG_LIST_ERROR if some of the BDs in this channel are under hardware or user control.
      • -
    • XST_DEVICE_IS_STARTED if the DMA channel has not been stopped.
      • -
    +
    Returns:
      +
    • XST_SUCCESS if the list was modified.
    • XST_DMA_SG_NO_LIST if a list has not been created.
    • XST_DMA_SG_LIST_ERROR if some of the BDs in this channel are under hardware or user control.
    • XST_DEVICE_IS_STARTED if the DMA channel has not been stopped.
    -
    - +

    +

    - + @@ -394,13 +402,15 @@ Do not modify more BDs than the number requested with the NumBd parameter. Doing - +
    int XEmacPs_BdRingCreate int XEmacPs_BdRingCreate ( XEmacPs_BdRing *  RingPtr,
    )
    -

    Using a memory segment allocated by the caller, create and setup the BD list for the given DMA channel.

    -
    Parameters:
    + +

    +Using a memory segment allocated by the caller, create and setup the BD list for the given DMA channel.

    +

    Parameters:
    @@ -408,25 +418,21 @@ Do not modify more BDs than the number requested with the NumBd parameter. Doing
    RingPtr is the instance to be worked on.
    PhysAddr is the physical base address of user memory region.
    Alignment governs the byte alignment of individual BDs. This function will enforce a minimum alignment of 4 bytes with no maximum as long as it is specified as a power of 2.
    BdCount is the number of BDs to setup in the user memory region. It is assumed the region is large enough to contain the BDs.
    -
    -
    Returns:
    +
    Returns:
      -
    • XST_SUCCESS if initialization was successful
      • -
    • XST_NO_FEATURE if the provided instance is a non DMA type channel.
      • -
    • XST_INVALID_PARAM under any of the following conditions: 1) PhysAddr and/or VirtAddr are not aligned to the given Alignment parameter; 2) Alignment parameter does not meet minimum requirements or is not a power of 2 value; 3) BdCount is 0.
      • -
    • XST_DMA_SG_LIST_ERROR if the memory segment containing the list spans over address 0x00000000 in virtual address space.
      • -
    -
    Note:
    Make sure to pass in the right alignment value.
    +
  • XST_SUCCESS if initialization was successful
  • XST_NO_FEATURE if the provided instance is a non DMA type channel.
  • XST_INVALID_PARAM under any of the following conditions: 1) PhysAddr and/or VirtAddr are not aligned to the given Alignment parameter; 2) Alignment parameter does not meet minimum requirements or is not a power of 2 value; 3) BdCount is 0.
  • XST_DMA_SG_LIST_ERROR if the memory segment containing the list spans over address 0x00000000 in virtual address space.
    • +

    +

    Note:
    Make sure to pass in the right alignment value.
    -
    - +

    +

    - + @@ -440,41 +446,40 @@ Do not modify more BDs than the number requested with the NumBd parameter. Doing - + - +
    int XEmacPs_BdRingFree int XEmacPs_BdRingFree ( XEmacPs_BdRing *  RingPtr,
    XEmacPs_Bd * XEmacPs_Bd *  BdSetPtr 
    )
    -

    Frees a set of BDs that had been previously retrieved with XEmacPs_BdRingFromHw().

    -
    Parameters:
    + +

    +Frees a set of BDs that had been previously retrieved with XEmacPs_BdRingFromHw().

    +

    Parameters:
    RingPtr is a pointer to the instance to be worked on.
    NumBd is the number of BDs to free.
    BdSetPtr is the head of a list of BDs returned by XEmacPs_BdRingFromHw().
    -
    -
    Returns:
      -
    • XST_SUCCESS if the set of BDs was freed.
      • -
    • XST_DMA_SG_LIST_ERROR if this function was called out of sequence with XEmacPs_BdRingFromHw().
      • -
    +
    Returns:
      +
    • XST_SUCCESS if the set of BDs was freed.
    • XST_DMA_SG_LIST_ERROR if this function was called out of sequence with XEmacPs_BdRingFromHw().
    -
    Note:
    This function should not be preempted by another XEmacPs_Bd function call that modifies the BD space. It is the caller's responsibility to provide a mutual exclusion mechanism.
    +
    Note:
    This function should not be preempted by another XEmacPs_Bd function call that modifies the BD space. It is the caller's responsibility to provide a mutual exclusion mechanism.
    -
    - +

    +

    - + @@ -488,64 +493,71 @@ Do not modify more BDs than the number requested with the NumBd parameter. Doing - + - +
    unsigned XEmacPs_BdRingFromHwRx unsigned XEmacPs_BdRingFromHwRx ( XEmacPs_BdRing *  RingPtr,
    XEmacPs_Bd ** XEmacPs_Bd **  BdSetPtr 
    )
    -

    Returns a set of BD(s) that have been processed by hardware. The returned BDs may be examined to determine the outcome of the DMA transaction(s). Once the BDs have been examined, the user must call XEmacPs_BdRingFree() in the same order which they were retrieved here. Example:

    + +

    +Returns a set of BD(s) that have been processed by hardware. The returned BDs may be examined to determine the outcome of the DMA transaction(s). Once the BDs have been examined, the user must call XEmacPs_BdRingFree() in the same order which they were retrieved here. Example:

    -        NumBd = XEmacPs_BdRingFromHwRx(MyRingPtr, MaxBd, &MyBdSet);
            if (NumBd == 0)
+        NumBd = XEmacPs_BdRingFromHwRx(MyRingPtr, MaxBd, &MyBdSet);

    +

            if (NumBd == 0)
         {
            // hardware has nothing ready for us yet
-        }
            CurBd = MyBdSet;
+        }

    +

            CurBd = MyBdSet;
         for (i=0; i<NumBd; i++)
         {
-           // Examine CurBd for post processing.....
               // Onto next BD
-           CurBd = XEmacPs_BdRingNext(MyRingPtr, CurBd);
-           }
               XEmacPs_BdRingFree(MyRingPtr, NumBd, MyBdSet); // Return list
+           // Examine CurBd for post processing.....

    +

               // Onto next BD
+           CurBd = XEmacPs_BdRingNext(MyRingPtr, CurBd);
+           }

    +

               XEmacPs_BdRingFree(MyRingPtr, NumBd, MyBdSet); // Return list
         }
-

    A more advanced use of this function may allocate multiple sets of BDs. They must be retrieved from hardware and freed in the correct sequence:

    -
    +

    +A more advanced use of this function may allocate multiple sets of BDs. They must be retrieved from hardware and freed in the correct sequence: 

             // Legal
         XEmacPs_BdRingFromHwRx(MyRingPtr, NumBd1, &MySet1);
-        XEmacPs_BdRingFree(MyRingPtr, NumBd1, MySet1);
            // Legal
+        XEmacPs_BdRingFree(MyRingPtr, NumBd1, MySet1);

    +

            // Legal
         XEmacPs_BdRingFromHwRx(MyRingPtr, NumBd1, &MySet1);
         XEmacPs_BdRingFromHwRx(MyRingPtr, NumBd2, &MySet2);
         XEmacPs_BdRingFree(MyRingPtr, NumBd1, MySet1);
-        XEmacPs_BdRingFree(MyRingPtr, NumBd2, MySet2);
            // Not legal
+        XEmacPs_BdRingFree(MyRingPtr, NumBd2, MySet2);

    +

            // Not legal
         XEmacPs_BdRingFromHwRx(MyRingPtr, NumBd1, &MySet1);
         XEmacPs_BdRingFromHwRx(MyRingPtr, NumBd2, &MySet2);
         XEmacPs_BdRingFree(MyRingPtr, NumBd2, MySet2);
         XEmacPs_BdRingFree(MyRingPtr, NumBd1, MySet1);
-

    If hardware has only partially completed a packet spanning multiple BDs, then none of the BDs for that packet will be included in the results.

    -
    Parameters:
    +

    +If hardware has only partially completed a packet spanning multiple BDs, then none of the BDs for that packet will be included in the results.

    +

    Parameters:
    RingPtr is a pointer to the instance to be worked on.
    BdLimit is the maximum number of BDs to return in the set.
    BdSetPtr is an output parameter, it points to the first BD available for examination.
    -
    -
    Returns:
    The number of BDs processed by hardware. A value of 0 indicates that no data is available. No more than BdLimit BDs will be returned.
    -
    Note:
    Treat BDs returned by this function as read-only.
    -
    +
    Returns:
    The number of BDs processed by hardware. A value of 0 indicates that no data is available. No more than BdLimit BDs will be returned.
    +
    Note:
    Treat BDs returned by this function as read-only.

    This function should not be preempted by another XEmacPs_Bd function call that modifies the BD space. It is the caller's responsibility to provide a mutual exclusion mechanism.

    -
    - +

    +

    - + @@ -559,64 +571,71 @@ This function should not be preempted by another XEmacPs_Bd function call that m - + - +
    unsigned XEmacPs_BdRingFromHwTx unsigned XEmacPs_BdRingFromHwTx ( XEmacPs_BdRing *  RingPtr,
    XEmacPs_Bd ** XEmacPs_Bd **  BdSetPtr 
    )
    -

    Returns a set of BD(s) that have been processed by hardware. The returned BDs may be examined to determine the outcome of the DMA transaction(s). Once the BDs have been examined, the user must call XEmacPs_BdRingFree() in the same order which they were retrieved here. Example:

    + +

    +Returns a set of BD(s) that have been processed by hardware. The returned BDs may be examined to determine the outcome of the DMA transaction(s). Once the BDs have been examined, the user must call XEmacPs_BdRingFree() in the same order which they were retrieved here. Example:

    -        NumBd = XEmacPs_BdRingFromHwTx(MyRingPtr, MaxBd, &MyBdSet);
            if (NumBd == 0)
+        NumBd = XEmacPs_BdRingFromHwTx(MyRingPtr, MaxBd, &MyBdSet);

    +

            if (NumBd == 0)
         {
            // hardware has nothing ready for us yet
-        }
            CurBd = MyBdSet;
+        }

    +

            CurBd = MyBdSet;
         for (i=0; i<NumBd; i++)
         {
-           // Examine CurBd for post processing.....
               // Onto next BD
-           CurBd = XEmacPs_BdRingNext(MyRingPtr, CurBd);
-           }
               XEmacPs_BdRingFree(MyRingPtr, NumBd, MyBdSet); // Return list
+           // Examine CurBd for post processing.....

    +

               // Onto next BD
+           CurBd = XEmacPs_BdRingNext(MyRingPtr, CurBd);
+           }

    +

               XEmacPs_BdRingFree(MyRingPtr, NumBd, MyBdSet); // Return list
         }
-

    A more advanced use of this function may allocate multiple sets of BDs. They must be retrieved from hardware and freed in the correct sequence:

    -
    +

    +A more advanced use of this function may allocate multiple sets of BDs. They must be retrieved from hardware and freed in the correct sequence: 

             // Legal
         XEmacPs_BdRingFromHwTx(MyRingPtr, NumBd1, &MySet1);
-        XEmacPs_BdRingFree(MyRingPtr, NumBd1, MySet1);
            // Legal
+        XEmacPs_BdRingFree(MyRingPtr, NumBd1, MySet1);

    +

            // Legal
         XEmacPs_BdRingFromHwTx(MyRingPtr, NumBd1, &MySet1);
         XEmacPs_BdRingFromHwTx(MyRingPtr, NumBd2, &MySet2);
         XEmacPs_BdRingFree(MyRingPtr, NumBd1, MySet1);
-        XEmacPs_BdRingFree(MyRingPtr, NumBd2, MySet2);
            // Not legal
+        XEmacPs_BdRingFree(MyRingPtr, NumBd2, MySet2);

    +

            // Not legal
         XEmacPs_BdRingFromHwTx(MyRingPtr, NumBd1, &MySet1);
         XEmacPs_BdRingFromHwTx(MyRingPtr, NumBd2, &MySet2);
         XEmacPs_BdRingFree(MyRingPtr, NumBd2, MySet2);
         XEmacPs_BdRingFree(MyRingPtr, NumBd1, MySet1);
-

    If hardware has only partially completed a packet spanning multiple BDs, then none of the BDs for that packet will be included in the results.

    -
    Parameters:
    +

    +If hardware has only partially completed a packet spanning multiple BDs, then none of the BDs for that packet will be included in the results.

    +

    Parameters:
    RingPtr is a pointer to the instance to be worked on.
    BdLimit is the maximum number of BDs to return in the set.
    BdSetPtr is an output parameter, it points to the first BD available for examination.
    -
    -
    Returns:
    The number of BDs processed by hardware. A value of 0 indicates that no data is available. No more than BdLimit BDs will be returned.
    -
    Note:
    Treat BDs returned by this function as read-only.
    -
    +
    Returns:
    The number of BDs processed by hardware. A value of 0 indicates that no data is available. No more than BdLimit BDs will be returned.
    +
    Note:
    Treat BDs returned by this function as read-only.

    This function should not be preempted by another XEmacPs_Bd function call that modifies the BD space. It is the caller's responsibility to provide a mutual exclusion mechanism.

    -
    - +

    +

    - + @@ -630,43 +649,41 @@ This function should not be preempted by another XEmacPs_Bd function call that m - + - +
    int XEmacPs_BdRingToHw int XEmacPs_BdRingToHw ( XEmacPs_BdRing *  RingPtr,
    XEmacPs_Bd * XEmacPs_Bd *  BdSetPtr 
    )
    -

    Enqueue a set of BDs to hardware that were previously allocated by XEmacPs_BdRingAlloc(). Once this function returns, the argument BD set goes under hardware control. Any changes made to these BDs after this point will corrupt the BD list leading to data corruption and system instability.

    -

    The set will be rejected if the last BD of the set does not mark the end of a packet (see XEmacPs_BdSetLast()).

    -
    Parameters:
    + +

    +Enqueue a set of BDs to hardware that were previously allocated by XEmacPs_BdRingAlloc(). Once this function returns, the argument BD set goes under hardware control. Any changes made to these BDs after this point will corrupt the BD list leading to data corruption and system instability.

    +The set will be rejected if the last BD of the set does not mark the end of a packet (see XEmacPs_BdSetLast()).

    +

    Parameters:
    RingPtr is a pointer to the instance to be worked on.
    NumBd is the number of BDs in the set.
    BdSetPtr is the first BD of the set to commit to hardware.
    -
    -
    Returns:
      -
    • XST_SUCCESS if the set of BDs was accepted and enqueued to hardware.
      • -
    • XST_FAILURE if the set of BDs was rejected because the last BD of the set did not have its "last" bit set.
      • -
    • XST_DMA_SG_LIST_ERROR if this function was called out of sequence with XEmacPs_BdRingAlloc().
      • -
    +
    Returns:
      +
    • XST_SUCCESS if the set of BDs was accepted and enqueued to hardware.
    • XST_FAILURE if the set of BDs was rejected because the last BD of the set did not have its "last" bit set.
    • XST_DMA_SG_LIST_ERROR if this function was called out of sequence with XEmacPs_BdRingAlloc().
    -
    Note:
    This function should not be preempted by another XEmacPs_Bd function call that modifies the BD space. It is the caller's responsibility to provide a mutual exclusion mechanism.
    +
    Note:
    This function should not be preempted by another XEmacPs_Bd function call that modifies the BD space. It is the caller's responsibility to provide a mutual exclusion mechanism.
    -
    - +

    +

    - + @@ -680,21 +697,23 @@ This function should not be preempted by another XEmacPs_Bd function call that m - + - +
    int XEmacPs_BdRingUnAlloc int XEmacPs_BdRingUnAlloc ( XEmacPs_BdRing *  RingPtr,
    XEmacPs_Bd * XEmacPs_Bd *  BdSetPtr 
    )
    -

    Fully or partially undo an XEmacPs_BdRingAlloc() operation. Use this function if all the BDs allocated by XEmacPs_BdRingAlloc() could not be transferred to hardware with XEmacPs_BdRingToHw().

    -

    This function helps out in situations when an unrelated error occurs after BDs have been allocated but before they have been given to hardware. An example of this type of error would be an OS running out of resources.

    -

    This function is not the same as XEmacPs_BdRingFree(). The Free function returns BDs to the free list after they have been processed by hardware, while UnAlloc returns them before being processed by hardware.

    -

    There are two scenarios where this function can be used. Full UnAlloc or Partial UnAlloc. A Full UnAlloc means all the BDs Alloc'd will be returned:

    + +

    +Fully or partially undo an XEmacPs_BdRingAlloc() operation. Use this function if all the BDs allocated by XEmacPs_BdRingAlloc() could not be transferred to hardware with XEmacPs_BdRingToHw().

    +This function helps out in situations when an unrelated error occurs after BDs have been allocated but before they have been given to hardware. An example of this type of error would be an OS running out of resources.

    +This function is not the same as XEmacPs_BdRingFree(). The Free function returns BDs to the free list after they have been processed by hardware, while UnAlloc returns them before being processed by hardware.

    +There are two scenarios where this function can be used. Full UnAlloc or Partial UnAlloc. A Full UnAlloc means all the BDs Alloc'd will be returned:

         Status = XEmacPs_BdRingAlloc(MyRingPtr, 10, &BdPtr);
         ...
@@ -702,39 +721,35 @@ This function should not be preempted by another XEmacPs_Bd function call that m
     {
         Status = XEmacPs_BdRingUnAlloc(MyRingPtr, 10, &BdPtr);
     }
-

    A partial UnAlloc means some of the BDs Alloc'd will be returned:

    +

    +A partial UnAlloc means some of the BDs Alloc'd will be returned:

         Status = XEmacPs_BdRingAlloc(MyRingPtr, 10, &BdPtr);
     BdsLeft = 10;
-    CurBdPtr = BdPtr;
        while (BdsLeft)
+    CurBdPtr = BdPtr;

    +

        while (BdsLeft)
     {
        if (Error)
        {
           Status = XEmacPs_BdRingUnAlloc(MyRingPtr, BdsLeft, CurBdPtr);
-       }
           CurBdPtr = XEmacPs_BdRingNext(MyRingPtr, CurBdPtr);
+       }

    +

           CurBdPtr = XEmacPs_BdRingNext(MyRingPtr, CurBdPtr);
        BdsLeft--;
     }
-

    A partial UnAlloc must include the last BD in the list that was Alloc'd.

    -
    Parameters:
    +

    +A partial UnAlloc must include the last BD in the list that was Alloc'd.

    +

    Parameters:
    RingPtr is a pointer to the instance to be worked on.
    NumBd is the number of BDs to allocate
    BdSetPtr is an output parameter, it points to the first BD available for modification.
    -
    -
    Returns:
      -
    • XST_SUCCESS if the BDs were unallocated.
      • -
    • XST_FAILURE if NumBd parameter was greater that the number of BDs in the preprocessing state.
      • -
    +
    Returns:
      +
    • XST_SUCCESS if the BDs were unallocated.
    • XST_FAILURE if NumBd parameter was greater that the number of BDs in the preprocessing state.
    -
    Note:
    This function should not be preempted by another XEmacPs_Bd function call that modifies the BD space. It is the caller's responsibility to provide a mutual exclusion mechanism.
    +
    Note:
    This function should not be preempted by another XEmacPs_Bd function call that modifies the BD space. It is the caller's responsibility to provide a mutual exclusion mechanism.
    -
    - -

    -Copyright © 1995-2014 Xilinx, Inc. All rights reserved. -

    - - +

    +Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. diff --git a/XilinxProcessorIPLib/drivers/emacps/doc/html/api/xemacps__bdring_8h.html b/XilinxProcessorIPLib/drivers/emacps/doc/html/api/xemacps__bdring_8h.html index 4a8afe8c..898db479 100755 --- a/XilinxProcessorIPLib/drivers/emacps/doc/html/api/xemacps__bdring_8h.html +++ b/XilinxProcessorIPLib/drivers/emacps/doc/html/api/xemacps__bdring_8h.html @@ -2,277 +2,292 @@ - Xilinx Driver emacps v2_1: xemacps_bdring.h File Reference + xemacps_bdring.h File Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - - - -
    -

    xemacps_bdring.h File Reference

    - - - - - - - - - - - - - - - - - - - - -

    Classes

    struct  XEmacPs_BdRing

    Defines

    #define XEMACPS_BDRING_H
    #define XEmacPs_BdRingCntCalc(Alignment, Bytes)
    #define XEmacPs_BdRingMemCalc(Alignment, NumBd)
    #define XEmacPs_BdRingGetCnt(RingPtr)   ((RingPtr)->AllCnt)
    #define XEmacPs_BdRingGetFreeCnt(RingPtr)   ((RingPtr)->FreeCnt)
    #define XEmacPs_BdRingNext(RingPtr, BdPtr)
    #define XEmacPs_BdRingPrev(RingPtr, BdPtr)

    Functions

    int XEmacPs_BdRingCreate (XEmacPs_BdRing *RingPtr, u32 PhysAddr, u32 VirtAddr, u32 Alignment, unsigned BdCount)
    int XEmacPs_BdRingClone (XEmacPs_BdRing *RingPtr, XEmacPs_Bd *SrcBdPtr, u8 Direction)
    int XEmacPs_BdRingAlloc (XEmacPs_BdRing *RingPtr, unsigned NumBd, XEmacPs_Bd **BdSetPtr)
    int XEmacPs_BdRingUnAlloc (XEmacPs_BdRing *RingPtr, unsigned NumBd, XEmacPs_Bd *BdSetPtr)
    int XEmacPs_BdRingToHw (XEmacPs_BdRing *RingPtr, unsigned NumBd, XEmacPs_Bd *BdSetPtr)
    int XEmacPs_BdRingFree (XEmacPs_BdRing *RingPtr, unsigned NumBd, XEmacPs_Bd *BdSetPtr)
    unsigned XEmacPs_BdRingFromHwTx (XEmacPs_BdRing *RingPtr, unsigned BdLimit, XEmacPs_Bd **BdSetPtr)
    unsigned XEmacPs_BdRingFromHwRx (XEmacPs_BdRing *RingPtr, unsigned BdLimit, XEmacPs_Bd **BdSetPtr)
    int XEmacPs_BdRingCheck (XEmacPs_BdRing *RingPtr, u8 Direction)
    -

    Detailed Description

    -

    The Xiline EmacPs Buffer Descriptor ring driver. This is part of EmacPs DMA functionalities.

    + +
    +
    +
    +
    +

    xemacps_bdring.h File Reference

    Detailed Description

    +The Xiline EmacPs Buffer Descriptor ring driver. This is part of EmacPs DMA functionalities.

    - MODIFICATION HISTORY:
     Ver   Who  Date     Changes
+ MODIFICATION HISTORY:

    +

     Ver   Who  Date     Changes
  ----- ---- -------- -------------------------------------------------------
  1.00a wsy  01/10/10 First release
-

    Define Documentation

    - + +

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    Classes

    struct  XEmacPs_BdRing

    Defines

    #define XEMACPS_BDRING_H
    #define XEmacPs_BdRingCntCalc(Alignment, Bytes)
    #define XEmacPs_BdRingMemCalc(Alignment, NumBd)
    #define XEmacPs_BdRingGetCnt(RingPtr)   ((RingPtr)->AllCnt)
    #define XEmacPs_BdRingGetFreeCnt(RingPtr)   ((RingPtr)->FreeCnt)
    #define XEmacPs_BdRingNext(RingPtr, BdPtr)
    #define XEmacPs_BdRingPrev(RingPtr, BdPtr)

    Functions

    int XEmacPs_BdRingCreate (XEmacPs_BdRing *RingPtr, u32 PhysAddr, u32 VirtAddr, u32 Alignment, unsigned BdCount)
    int XEmacPs_BdRingClone (XEmacPs_BdRing *RingPtr, XEmacPs_Bd *SrcBdPtr, u8 Direction)
    int XEmacPs_BdRingAlloc (XEmacPs_BdRing *RingPtr, unsigned NumBd, XEmacPs_Bd **BdSetPtr)
    int XEmacPs_BdRingUnAlloc (XEmacPs_BdRing *RingPtr, unsigned NumBd, XEmacPs_Bd *BdSetPtr)
    int XEmacPs_BdRingToHw (XEmacPs_BdRing *RingPtr, unsigned NumBd, XEmacPs_Bd *BdSetPtr)
    int XEmacPs_BdRingFree (XEmacPs_BdRing *RingPtr, unsigned NumBd, XEmacPs_Bd *BdSetPtr)
    unsigned XEmacPs_BdRingFromHwTx (XEmacPs_BdRing *RingPtr, unsigned BdLimit, XEmacPs_Bd **BdSetPtr)
    unsigned XEmacPs_BdRingFromHwRx (XEmacPs_BdRing *RingPtr, unsigned BdLimit, XEmacPs_Bd **BdSetPtr)
    int XEmacPs_BdRingCheck (XEmacPs_BdRing *RingPtr, u8 Direction)
    +

    Define Documentation

    +
    - +
    #define XEMACPS_BDRING_H#define XEMACPS_BDRING_H
    +

    +

    -
    - +

    +

    - + - - - + - + - +
    #define XEmacPs_BdRingCntCalc#define XEmacPs_BdRingCntCalc (Alignment,
    Alignment,
    Bytes   ) 
    -Value:
    (u32)((Bytes) / ((sizeof(XEmacPs_Bd) + ((Alignment)-1)) &   \
+
+
    
+Value:
    (u32)((Bytes) / ((sizeof(XEmacPs_Bd) + ((Alignment)-1)) &   \
     ~((Alignment)-1)))
-
    Use this macro at initialization time to determine how many BDs will fit in a BD list within the given memory constraints.
    
-
    The results of this macro can be provided to XEmacPs_BdRingCreate().
    
-
    Parameters:
    
+
    Use this macro at initialization time to determine how many BDs will fit in a BD list within the given memory constraints.

    +The results of this macro can be provided to XEmacPs_BdRingCreate().

    +

    Parameters:
    Alignment specifies what byte alignment the BDs must fall on and must be a power of 2 to get an accurate calculation (32, 64, 128,...)
    Bytes is the number of bytes to be used to store BDs.
    -
    -
    Returns:
    Number of BDs that can fit in the given memory area
    -
    Note:
    C-style signature: u32 XEmacPs_BdRingCntCalc(u32 Alignment, u32 Bytes)
    +
    Returns:
    Number of BDs that can fit in the given memory area
    +
    Note:
    C-style signature: u32 XEmacPs_BdRingCntCalc(u32 Alignment, u32 Bytes)
    -
    - +

    +

    - + - + - +
    #define XEmacPs_BdRingGetCnt#define XEmacPs_BdRingGetCnt ( RingPtr   )    ((RingPtr)->AllCnt)   ((RingPtr)->AllCnt)
    -

    Return the total number of BDs allocated by this channel with XEmacPs_BdRingCreate().

    -
    Parameters:
    + +

    +Return the total number of BDs allocated by this channel with XEmacPs_BdRingCreate().

    +

    Parameters:
    RingPtr is the DMA channel to operate on.
    -
    -
    Returns:
    The total number of BDs allocated for this channel.
    -
    Note:
    C-style signature: u32 XEmacPs_BdRingGetCnt(XEmacPs_BdRing* RingPtr)
    +
    Returns:
    The total number of BDs allocated for this channel.
    +
    Note:
    C-style signature: u32 XEmacPs_BdRingGetCnt(XEmacPs_BdRing* RingPtr)
    -
    - +

    +

    - + - + - +
    #define XEmacPs_BdRingGetFreeCnt#define XEmacPs_BdRingGetFreeCnt ( RingPtr   )    ((RingPtr)->FreeCnt)   ((RingPtr)->FreeCnt)
    -

    Return the number of BDs allocatable with XEmacPs_BdRingAlloc() for pre- processing.

    -
    Parameters:
    + +

    +Return the number of BDs allocatable with XEmacPs_BdRingAlloc() for pre- processing.

    +

    Parameters:
    RingPtr is the DMA channel to operate on.
    -
    -
    Returns:
    The number of BDs currently allocatable.
    -
    Note:
    C-style signature: u32 XEmacPs_BdRingGetFreeCnt(XEmacPs_BdRing* RingPtr)
    +
    Returns:
    The number of BDs currently allocatable.
    +
    Note:
    C-style signature: u32 XEmacPs_BdRingGetFreeCnt(XEmacPs_BdRing* RingPtr)
    -
    - +

    +

    - + - - - + - + - +
    #define XEmacPs_BdRingMemCalc#define XEmacPs_BdRingMemCalc (Alignment,
    Alignment,
    NumBd   ) 
    -Value:
    (u32)((sizeof(XEmacPs_Bd) + ((Alignment)-1)) &              \
+
+
    
+Value:
    (u32)((sizeof(XEmacPs_Bd) + ((Alignment)-1)) &              \
     ~((Alignment)-1)) * (NumBd)
-
    Use this macro at initialization time to determine how many bytes of memory is required to contain a given number of BDs at a given alignment.
    
-
    Parameters:
    
+
    Use this macro at initialization time to determine how many bytes of memory is required to contain a given number of BDs at a given alignment.

    +

    Parameters:
    Alignment specifies what byte alignment the BDs must fall on. This parameter must be a power of 2 to get an accurate calculation (32, 64, 128,...)
    NumBd is the number of BDs to calculate memory size requirements for
    -
    -
    Returns:
    The number of bytes of memory required to create a BD list with the given memory constraints.
    -
    Note:
    C-style signature: u32 XEmacPs_BdRingMemCalc(u32 Alignment, u32 NumBd)
    +
    Returns:
    The number of bytes of memory required to create a BD list with the given memory constraints.
    +
    Note:
    C-style signature: u32 XEmacPs_BdRingMemCalc(u32 Alignment, u32 NumBd)
    -
    - +

    +

    - + - - - + - + - +
    #define XEmacPs_BdRingNext#define XEmacPs_BdRingNext (RingPtr,
    RingPtr,
    BdPtr   ) 
    + +

    Value:

    (((u32)(BdPtr) >= (RingPtr)->HighBdAddr) ?                     \
-    (XEmacPs_Bd*)(RingPtr)->BaseBdAddr :                              \
-    (XEmacPs_Bd*)((u32)(BdPtr) + (RingPtr)->Separation))
-

    Return the next BD from BdPtr in a list.

    -
    Parameters:
    + (XEmacPs_Bd*)(RingPtr)->BaseBdAddr : \ + (XEmacPs_Bd*)((u32)(BdPtr) + (RingPtr)->Separation)) +
    Return the next BD from BdPtr in a list.

    +

    Parameters:
    RingPtr is the DMA channel to operate on.
    BdPtr is the BD to operate on.
    -
    -
    Returns:
    The next BD in the list relative to the BdPtr parameter.
    -
    Note:
    C-style signature: XEmacPs_Bd *XEmacPs_BdRingNext(XEmacPs_BdRing* RingPtr, XEmacPs_Bd *BdPtr)
    +
    Returns:
    The next BD in the list relative to the BdPtr parameter.
    +
    Note:
    C-style signature: XEmacPs_Bd *XEmacPs_BdRingNext(XEmacPs_BdRing* RingPtr, XEmacPs_Bd *BdPtr)
    - - +

    +

    - + - - - + - + - +
    #define XEmacPs_BdRingPrev#define XEmacPs_BdRingPrev (RingPtr,
    RingPtr,
    BdPtr   ) 
    + +

    Value:

    (((u32)(BdPtr) <= (RingPtr)->BaseBdAddr) ?                     \
-    (XEmacPs_Bd*)(RingPtr)->HighBdAddr :                              \
-    (XEmacPs_Bd*)((u32)(BdPtr) - (RingPtr)->Separation))
-

    Return the previous BD from BdPtr in the list.

    -
    Parameters:
    + (XEmacPs_Bd*)(RingPtr)->HighBdAddr : \ + (XEmacPs_Bd*)((u32)(BdPtr) - (RingPtr)->Separation)) +
    Return the previous BD from BdPtr in the list.

    +

    Parameters:
    RingPtr is the DMA channel to operate on.
    BdPtr is the BD to operate on
    -
    -
    Returns:
    The previous BD in the list relative to the BdPtr parameter.
    -
    Note:
    C-style signature: XEmacPs_Bd *XEmacPs_BdRingPrev(XEmacPs_BdRing* RingPtr, XEmacPs_Bd *BdPtr)
    +
    Returns:
    The previous BD in the list relative to the BdPtr parameter.
    +
    Note:
    C-style signature: XEmacPs_Bd *XEmacPs_BdRingPrev(XEmacPs_BdRing* RingPtr, XEmacPs_Bd *BdPtr)
    - -

    Function Documentation

    - +

    +

    Function Documentation

    +
    - + @@ -286,69 +301,74 @@ - + - +
    int XEmacPs_BdRingAlloc int XEmacPs_BdRingAlloc ( XEmacPs_BdRing *  RingPtr,
    XEmacPs_Bd ** XEmacPs_Bd **  BdSetPtr 
    )
    -

    Reserve locations in the BD list. The set of returned BDs may be modified in preparation for future DMA transaction(s). Once the BDs are ready to be submitted to hardware, the user must call XEmacPs_BdRingToHw() in the same order which they were allocated here. Example:

    + +

    +Reserve locations in the BD list. The set of returned BDs may be modified in preparation for future DMA transaction(s). Once the BDs are ready to be submitted to hardware, the user must call XEmacPs_BdRingToHw() in the same order which they were allocated here. Example:

             NumBd = 2;
-        Status = XEmacPs_BdRingAlloc(MyRingPtr, NumBd, &MyBdSet);
            if (Status != XST_SUCCESS)
+        Status = XEmacPs_BdRingAlloc(MyRingPtr, NumBd, &MyBdSet);

    +

            if (Status != XST_SUCCESS)
         {
             // Not enough BDs available for the request
-        }
            CurBd = MyBdSet;
+        }

    +

            CurBd = MyBdSet;
         for (i=0; i<NumBd; i++)
         {
-            // Prepare CurBd.....
                // Onto next BD
-            CurBd = XEmacPs_BdRingNext(MyRingPtr, CurBd);
-        }
            // Give list to hardware
+            // Prepare CurBd.....

    +

                // Onto next BD
+            CurBd = XEmacPs_BdRingNext(MyRingPtr, CurBd);
+        }

    +

            // Give list to hardware
         Status = XEmacPs_BdRingToHw(MyRingPtr, NumBd, MyBdSet);
-

    A more advanced use of this function may allocate multiple sets of BDs. They must be allocated and given to hardware in the correct sequence:

    -
    +

    +A more advanced use of this function may allocate multiple sets of BDs. They must be allocated and given to hardware in the correct sequence: 

             // Legal
         XEmacPs_BdRingAlloc(MyRingPtr, NumBd1, &MySet1);
-        XEmacPs_BdRingToHw(MyRingPtr, NumBd1, MySet1);
            // Legal
+        XEmacPs_BdRingToHw(MyRingPtr, NumBd1, MySet1);

    +

            // Legal
         XEmacPs_BdRingAlloc(MyRingPtr, NumBd1, &MySet1);
         XEmacPs_BdRingAlloc(MyRingPtr, NumBd2, &MySet2);
         XEmacPs_BdRingToHw(MyRingPtr, NumBd1, MySet1);
-        XEmacPs_BdRingToHw(MyRingPtr, NumBd2, MySet2);
            // Not legal
+        XEmacPs_BdRingToHw(MyRingPtr, NumBd2, MySet2);

    +

            // Not legal
         XEmacPs_BdRingAlloc(MyRingPtr, NumBd1, &MySet1);
         XEmacPs_BdRingAlloc(MyRingPtr, NumBd2, &MySet2);
         XEmacPs_BdRingToHw(MyRingPtr, NumBd2, MySet2);
         XEmacPs_BdRingToHw(MyRingPtr, NumBd1, MySet1);
-

    Use the API defined in xemacps_bd.h to modify individual BDs. Traversal of the BD set can be done using XEmacPs_BdRingNext() and XEmacPs_BdRingPrev().

    -
    Parameters:
    +

    +Use the API defined in xemacps_bd.h to modify individual BDs. Traversal of the BD set can be done using XEmacPs_BdRingNext() and XEmacPs_BdRingPrev().

    +

    Parameters:
    RingPtr is a pointer to the BD ring instance to be worked on.
    NumBd is the number of BDs to allocate
    BdSetPtr is an output parameter, it points to the first BD available for modification.
    -
    -
    Returns:
      -
    • XST_SUCCESS if the requested number of BDs was returned in the BdSetPtr parameter.
      • -
    • XST_FAILURE if there were not enough free BDs to satisfy the request.
      • -
    +
    Returns:
      +
    • XST_SUCCESS if the requested number of BDs was returned in the BdSetPtr parameter.
    • XST_FAILURE if there were not enough free BDs to satisfy the request.
    -
    Note:
    This function should not be preempted by another XEmacPs_Bd function call that modifies the BD space. It is the caller's responsibility to provide a mutual exclusion mechanism.
    -
    +
    Note:
    This function should not be preempted by another XEmacPs_Bd function call that modifies the BD space. It is the caller's responsibility to provide a mutual exclusion mechanism.

    Do not modify more BDs than the number requested with the NumBd parameter. Doing so will lead to data corruption and system instability.

    -
    - +

    +

    - + @@ -362,42 +382,37 @@ Do not modify more BDs than the number requested with the NumBd parameter. Doing - +
    int XEmacPs_BdRingCheck int XEmacPs_BdRingCheck ( XEmacPs_BdRing *  RingPtr,
    )
    -

    Check the internal data structures of the BD ring for the provided channel. The following checks are made:

    + +

    +Check the internal data structures of the BD ring for the provided channel. The following checks are made:

    -

    The channel should be stopped prior to calling this function.

    -
    Parameters:
    +
  • Is the BD ring linked correctly in physical address space.
  • Do the internal pointers point to BDs in the ring.
  • Do the internal counters add up.
    • +

    +The channel should be stopped prior to calling this function.

    +

    Parameters:
    RingPtr is a pointer to the instance to be worked on.
    Direction is either XEMACPS_SEND or XEMACPS_RECV that indicates which direction.
    -
    -
    Returns:
      -
    • XST_SUCCESS if the set of BDs was freed.
      • -
    • XST_DMA_SG_NO_LIST if the list has not been created.
      • -
    • XST_IS_STARTED if the channel is not stopped.
      • -
    • XST_DMA_SG_LIST_ERROR if a problem is found with the internal data structures. If this value is returned, the channel should be reset to avoid data corruption or system instability.
      • -
    +
    Returns:
      +
    • XST_SUCCESS if the set of BDs was freed.
    • XST_DMA_SG_NO_LIST if the list has not been created.
    • XST_IS_STARTED if the channel is not stopped.
    • XST_DMA_SG_LIST_ERROR if a problem is found with the internal data structures. If this value is returned, the channel should be reset to avoid data corruption or system instability.
    -
    Note:
    This function should not be preempted by another XEmacPs_Bd function call that modifies the BD space. It is the caller's responsibility to provide a mutual exclusion mechanism.
    +
    Note:
    This function should not be preempted by another XEmacPs_Bd function call that modifies the BD space. It is the caller's responsibility to provide a mutual exclusion mechanism.
    -
    - +

    +

    - + @@ -405,7 +420,7 @@ Do not modify more BDs than the number requested with the NumBd parameter. Doing - + @@ -417,37 +432,34 @@ Do not modify more BDs than the number requested with the NumBd parameter. Doing - +
    int XEmacPs_BdRingClone int XEmacPs_BdRingClone ( XEmacPs_BdRing *  RingPtr,
    XEmacPs_Bd * XEmacPs_Bd *  SrcBdPtr,
    )
    -

    Clone the given BD into every BD in the list. every field of the source BD is replicated in every BD of the list.

    -

    This function can be called only when all BDs are in the free group such as they are immediately after initialization with XEmacPs_BdRingCreate(). This prevents modification of BDs while they are in use by hardware or the user.

    -
    Parameters:
    + +

    +Clone the given BD into every BD in the list. every field of the source BD is replicated in every BD of the list.

    +This function can be called only when all BDs are in the free group such as they are immediately after initialization with XEmacPs_BdRingCreate(). This prevents modification of BDs while they are in use by hardware or the user.

    +

    Parameters:
    RingPtr is the pointer of BD ring instance to be worked on.
    SrcBdPtr is the source BD template to be cloned into the list. This BD will be modified.
    Direction is either XEMACPS_SEND or XEMACPS_RECV that indicates which direction.
    -
    -
    Returns:
      -
    • XST_SUCCESS if the list was modified.
      • -
    • XST_DMA_SG_NO_LIST if a list has not been created.
      • -
    • XST_DMA_SG_LIST_ERROR if some of the BDs in this channel are under hardware or user control.
      • -
    • XST_DEVICE_IS_STARTED if the DMA channel has not been stopped.
      • -
    +
    Returns:
      +
    • XST_SUCCESS if the list was modified.
    • XST_DMA_SG_NO_LIST if a list has not been created.
    • XST_DMA_SG_LIST_ERROR if some of the BDs in this channel are under hardware or user control.
    • XST_DEVICE_IS_STARTED if the DMA channel has not been stopped.
    -
    - +

    +

    - + @@ -479,13 +491,15 @@ Do not modify more BDs than the number requested with the NumBd parameter. Doing - +
    int XEmacPs_BdRingCreate int XEmacPs_BdRingCreate ( XEmacPs_BdRing *  RingPtr,
    )
    -

    Using a memory segment allocated by the caller, create and setup the BD list for the given DMA channel.

    -
    Parameters:
    + +

    +Using a memory segment allocated by the caller, create and setup the BD list for the given DMA channel.

    +

    Parameters:
    @@ -493,25 +507,21 @@ Do not modify more BDs than the number requested with the NumBd parameter. Doing
    RingPtr is the instance to be worked on.
    PhysAddr is the physical base address of user memory region.
    Alignment governs the byte alignment of individual BDs. This function will enforce a minimum alignment of 4 bytes with no maximum as long as it is specified as a power of 2.
    BdCount is the number of BDs to setup in the user memory region. It is assumed the region is large enough to contain the BDs.
    -
    -
    Returns:
    +
    Returns:
      -
    • XST_SUCCESS if initialization was successful
      • -
    • XST_NO_FEATURE if the provided instance is a non DMA type channel.
      • -
    • XST_INVALID_PARAM under any of the following conditions: 1) PhysAddr and/or VirtAddr are not aligned to the given Alignment parameter; 2) Alignment parameter does not meet minimum requirements or is not a power of 2 value; 3) BdCount is 0.
      • -
    • XST_DMA_SG_LIST_ERROR if the memory segment containing the list spans over address 0x00000000 in virtual address space.
      • -
    -
    Note:
    Make sure to pass in the right alignment value.
    +
  • XST_SUCCESS if initialization was successful
  • XST_NO_FEATURE if the provided instance is a non DMA type channel.
  • XST_INVALID_PARAM under any of the following conditions: 1) PhysAddr and/or VirtAddr are not aligned to the given Alignment parameter; 2) Alignment parameter does not meet minimum requirements or is not a power of 2 value; 3) BdCount is 0.
  • XST_DMA_SG_LIST_ERROR if the memory segment containing the list spans over address 0x00000000 in virtual address space.
    • +

    +

    Note:
    Make sure to pass in the right alignment value.
    -
    - +

    +

    - + @@ -525,41 +535,40 @@ Do not modify more BDs than the number requested with the NumBd parameter. Doing - + - +
    int XEmacPs_BdRingFree int XEmacPs_BdRingFree ( XEmacPs_BdRing *  RingPtr,
    XEmacPs_Bd * XEmacPs_Bd *  BdSetPtr 
    )
    -

    Frees a set of BDs that had been previously retrieved with XEmacPs_BdRingFromHw().

    -
    Parameters:
    + +

    +Frees a set of BDs that had been previously retrieved with XEmacPs_BdRingFromHw().

    +

    Parameters:
    RingPtr is a pointer to the instance to be worked on.
    NumBd is the number of BDs to free.
    BdSetPtr is the head of a list of BDs returned by XEmacPs_BdRingFromHw().
    -
    -
    Returns:
      -
    • XST_SUCCESS if the set of BDs was freed.
      • -
    • XST_DMA_SG_LIST_ERROR if this function was called out of sequence with XEmacPs_BdRingFromHw().
      • -
    +
    Returns:
      +
    • XST_SUCCESS if the set of BDs was freed.
    • XST_DMA_SG_LIST_ERROR if this function was called out of sequence with XEmacPs_BdRingFromHw().
    -
    Note:
    This function should not be preempted by another XEmacPs_Bd function call that modifies the BD space. It is the caller's responsibility to provide a mutual exclusion mechanism.
    +
    Note:
    This function should not be preempted by another XEmacPs_Bd function call that modifies the BD space. It is the caller's responsibility to provide a mutual exclusion mechanism.
    -
    - +

    +

    - + @@ -573,64 +582,71 @@ Do not modify more BDs than the number requested with the NumBd parameter. Doing - + - +
    unsigned XEmacPs_BdRingFromHwRx unsigned XEmacPs_BdRingFromHwRx ( XEmacPs_BdRing *  RingPtr,
    XEmacPs_Bd ** XEmacPs_Bd **  BdSetPtr 
    )
    -

    Returns a set of BD(s) that have been processed by hardware. The returned BDs may be examined to determine the outcome of the DMA transaction(s). Once the BDs have been examined, the user must call XEmacPs_BdRingFree() in the same order which they were retrieved here. Example:

    + +

    +Returns a set of BD(s) that have been processed by hardware. The returned BDs may be examined to determine the outcome of the DMA transaction(s). Once the BDs have been examined, the user must call XEmacPs_BdRingFree() in the same order which they were retrieved here. Example:

    -        NumBd = XEmacPs_BdRingFromHwRx(MyRingPtr, MaxBd, &MyBdSet);
            if (NumBd == 0)
+        NumBd = XEmacPs_BdRingFromHwRx(MyRingPtr, MaxBd, &MyBdSet);

    +

            if (NumBd == 0)
         {
            // hardware has nothing ready for us yet
-        }
            CurBd = MyBdSet;
+        }

    +

            CurBd = MyBdSet;
         for (i=0; i<NumBd; i++)
         {
-           // Examine CurBd for post processing.....
               // Onto next BD
-           CurBd = XEmacPs_BdRingNext(MyRingPtr, CurBd);
-           }
               XEmacPs_BdRingFree(MyRingPtr, NumBd, MyBdSet); // Return list
+           // Examine CurBd for post processing.....

    +

               // Onto next BD
+           CurBd = XEmacPs_BdRingNext(MyRingPtr, CurBd);
+           }

    +

               XEmacPs_BdRingFree(MyRingPtr, NumBd, MyBdSet); // Return list
         }
-

    A more advanced use of this function may allocate multiple sets of BDs. They must be retrieved from hardware and freed in the correct sequence:

    -
    +

    +A more advanced use of this function may allocate multiple sets of BDs. They must be retrieved from hardware and freed in the correct sequence: 

             // Legal
         XEmacPs_BdRingFromHwRx(MyRingPtr, NumBd1, &MySet1);
-        XEmacPs_BdRingFree(MyRingPtr, NumBd1, MySet1);
            // Legal
+        XEmacPs_BdRingFree(MyRingPtr, NumBd1, MySet1);

    +

            // Legal
         XEmacPs_BdRingFromHwRx(MyRingPtr, NumBd1, &MySet1);
         XEmacPs_BdRingFromHwRx(MyRingPtr, NumBd2, &MySet2);
         XEmacPs_BdRingFree(MyRingPtr, NumBd1, MySet1);
-        XEmacPs_BdRingFree(MyRingPtr, NumBd2, MySet2);
            // Not legal
+        XEmacPs_BdRingFree(MyRingPtr, NumBd2, MySet2);

    +

            // Not legal
         XEmacPs_BdRingFromHwRx(MyRingPtr, NumBd1, &MySet1);
         XEmacPs_BdRingFromHwRx(MyRingPtr, NumBd2, &MySet2);
         XEmacPs_BdRingFree(MyRingPtr, NumBd2, MySet2);
         XEmacPs_BdRingFree(MyRingPtr, NumBd1, MySet1);
-

    If hardware has only partially completed a packet spanning multiple BDs, then none of the BDs for that packet will be included in the results.

    -
    Parameters:
    +

    +If hardware has only partially completed a packet spanning multiple BDs, then none of the BDs for that packet will be included in the results.

    +

    Parameters:
    RingPtr is a pointer to the instance to be worked on.
    BdLimit is the maximum number of BDs to return in the set.
    BdSetPtr is an output parameter, it points to the first BD available for examination.
    -
    -
    Returns:
    The number of BDs processed by hardware. A value of 0 indicates that no data is available. No more than BdLimit BDs will be returned.
    -
    Note:
    Treat BDs returned by this function as read-only.
    -
    +
    Returns:
    The number of BDs processed by hardware. A value of 0 indicates that no data is available. No more than BdLimit BDs will be returned.
    +
    Note:
    Treat BDs returned by this function as read-only.

    This function should not be preempted by another XEmacPs_Bd function call that modifies the BD space. It is the caller's responsibility to provide a mutual exclusion mechanism.

    -
    - +

    +

    - + @@ -644,64 +660,71 @@ This function should not be preempted by another XEmacPs_Bd function call that m - + - +
    unsigned XEmacPs_BdRingFromHwTx unsigned XEmacPs_BdRingFromHwTx ( XEmacPs_BdRing *  RingPtr,
    XEmacPs_Bd ** XEmacPs_Bd **  BdSetPtr 
    )
    -

    Returns a set of BD(s) that have been processed by hardware. The returned BDs may be examined to determine the outcome of the DMA transaction(s). Once the BDs have been examined, the user must call XEmacPs_BdRingFree() in the same order which they were retrieved here. Example:

    + +

    +Returns a set of BD(s) that have been processed by hardware. The returned BDs may be examined to determine the outcome of the DMA transaction(s). Once the BDs have been examined, the user must call XEmacPs_BdRingFree() in the same order which they were retrieved here. Example:

    -        NumBd = XEmacPs_BdRingFromHwTx(MyRingPtr, MaxBd, &MyBdSet);
            if (NumBd == 0)
+        NumBd = XEmacPs_BdRingFromHwTx(MyRingPtr, MaxBd, &MyBdSet);

    +

            if (NumBd == 0)
         {
            // hardware has nothing ready for us yet
-        }
            CurBd = MyBdSet;
+        }

    +

            CurBd = MyBdSet;
         for (i=0; i<NumBd; i++)
         {
-           // Examine CurBd for post processing.....
               // Onto next BD
-           CurBd = XEmacPs_BdRingNext(MyRingPtr, CurBd);
-           }
               XEmacPs_BdRingFree(MyRingPtr, NumBd, MyBdSet); // Return list
+           // Examine CurBd for post processing.....

    +

               // Onto next BD
+           CurBd = XEmacPs_BdRingNext(MyRingPtr, CurBd);
+           }

    +

               XEmacPs_BdRingFree(MyRingPtr, NumBd, MyBdSet); // Return list
         }
-

    A more advanced use of this function may allocate multiple sets of BDs. They must be retrieved from hardware and freed in the correct sequence:

    -
    +

    +A more advanced use of this function may allocate multiple sets of BDs. They must be retrieved from hardware and freed in the correct sequence: 

             // Legal
         XEmacPs_BdRingFromHwTx(MyRingPtr, NumBd1, &MySet1);
-        XEmacPs_BdRingFree(MyRingPtr, NumBd1, MySet1);
            // Legal
+        XEmacPs_BdRingFree(MyRingPtr, NumBd1, MySet1);

    +

            // Legal
         XEmacPs_BdRingFromHwTx(MyRingPtr, NumBd1, &MySet1);
         XEmacPs_BdRingFromHwTx(MyRingPtr, NumBd2, &MySet2);
         XEmacPs_BdRingFree(MyRingPtr, NumBd1, MySet1);
-        XEmacPs_BdRingFree(MyRingPtr, NumBd2, MySet2);
            // Not legal
+        XEmacPs_BdRingFree(MyRingPtr, NumBd2, MySet2);

    +

            // Not legal
         XEmacPs_BdRingFromHwTx(MyRingPtr, NumBd1, &MySet1);
         XEmacPs_BdRingFromHwTx(MyRingPtr, NumBd2, &MySet2);
         XEmacPs_BdRingFree(MyRingPtr, NumBd2, MySet2);
         XEmacPs_BdRingFree(MyRingPtr, NumBd1, MySet1);
-

    If hardware has only partially completed a packet spanning multiple BDs, then none of the BDs for that packet will be included in the results.

    -
    Parameters:
    +

    +If hardware has only partially completed a packet spanning multiple BDs, then none of the BDs for that packet will be included in the results.

    +

    Parameters:
    RingPtr is a pointer to the instance to be worked on.
    BdLimit is the maximum number of BDs to return in the set.
    BdSetPtr is an output parameter, it points to the first BD available for examination.
    -
    -
    Returns:
    The number of BDs processed by hardware. A value of 0 indicates that no data is available. No more than BdLimit BDs will be returned.
    -
    Note:
    Treat BDs returned by this function as read-only.
    -
    +
    Returns:
    The number of BDs processed by hardware. A value of 0 indicates that no data is available. No more than BdLimit BDs will be returned.
    +
    Note:
    Treat BDs returned by this function as read-only.

    This function should not be preempted by another XEmacPs_Bd function call that modifies the BD space. It is the caller's responsibility to provide a mutual exclusion mechanism.

    -
    - +

    +

    - + @@ -715,43 +738,41 @@ This function should not be preempted by another XEmacPs_Bd function call that m - + - +
    int XEmacPs_BdRingToHw int XEmacPs_BdRingToHw ( XEmacPs_BdRing *  RingPtr,
    XEmacPs_Bd * XEmacPs_Bd *  BdSetPtr 
    )
    -

    Enqueue a set of BDs to hardware that were previously allocated by XEmacPs_BdRingAlloc(). Once this function returns, the argument BD set goes under hardware control. Any changes made to these BDs after this point will corrupt the BD list leading to data corruption and system instability.

    -

    The set will be rejected if the last BD of the set does not mark the end of a packet (see XEmacPs_BdSetLast()).

    -
    Parameters:
    + +

    +Enqueue a set of BDs to hardware that were previously allocated by XEmacPs_BdRingAlloc(). Once this function returns, the argument BD set goes under hardware control. Any changes made to these BDs after this point will corrupt the BD list leading to data corruption and system instability.

    +The set will be rejected if the last BD of the set does not mark the end of a packet (see XEmacPs_BdSetLast()).

    +

    Parameters:
    RingPtr is a pointer to the instance to be worked on.
    NumBd is the number of BDs in the set.
    BdSetPtr is the first BD of the set to commit to hardware.
    -
    -
    Returns:
      -
    • XST_SUCCESS if the set of BDs was accepted and enqueued to hardware.
      • -
    • XST_FAILURE if the set of BDs was rejected because the last BD of the set did not have its "last" bit set.
      • -
    • XST_DMA_SG_LIST_ERROR if this function was called out of sequence with XEmacPs_BdRingAlloc().
      • -
    +
    Returns:
      +
    • XST_SUCCESS if the set of BDs was accepted and enqueued to hardware.
    • XST_FAILURE if the set of BDs was rejected because the last BD of the set did not have its "last" bit set.
    • XST_DMA_SG_LIST_ERROR if this function was called out of sequence with XEmacPs_BdRingAlloc().
    -
    Note:
    This function should not be preempted by another XEmacPs_Bd function call that modifies the BD space. It is the caller's responsibility to provide a mutual exclusion mechanism.
    +
    Note:
    This function should not be preempted by another XEmacPs_Bd function call that modifies the BD space. It is the caller's responsibility to provide a mutual exclusion mechanism.
    -
    - +

    +

    - + @@ -765,21 +786,23 @@ This function should not be preempted by another XEmacPs_Bd function call that m - + - +
    int XEmacPs_BdRingUnAlloc int XEmacPs_BdRingUnAlloc ( XEmacPs_BdRing *  RingPtr,
    XEmacPs_Bd * XEmacPs_Bd *  BdSetPtr 
    )
    -

    Fully or partially undo an XEmacPs_BdRingAlloc() operation. Use this function if all the BDs allocated by XEmacPs_BdRingAlloc() could not be transferred to hardware with XEmacPs_BdRingToHw().

    -

    This function helps out in situations when an unrelated error occurs after BDs have been allocated but before they have been given to hardware. An example of this type of error would be an OS running out of resources.

    -

    This function is not the same as XEmacPs_BdRingFree(). The Free function returns BDs to the free list after they have been processed by hardware, while UnAlloc returns them before being processed by hardware.

    -

    There are two scenarios where this function can be used. Full UnAlloc or Partial UnAlloc. A Full UnAlloc means all the BDs Alloc'd will be returned:

    + +

    +Fully or partially undo an XEmacPs_BdRingAlloc() operation. Use this function if all the BDs allocated by XEmacPs_BdRingAlloc() could not be transferred to hardware with XEmacPs_BdRingToHw().

    +This function helps out in situations when an unrelated error occurs after BDs have been allocated but before they have been given to hardware. An example of this type of error would be an OS running out of resources.

    +This function is not the same as XEmacPs_BdRingFree(). The Free function returns BDs to the free list after they have been processed by hardware, while UnAlloc returns them before being processed by hardware.

    +There are two scenarios where this function can be used. Full UnAlloc or Partial UnAlloc. A Full UnAlloc means all the BDs Alloc'd will be returned:

         Status = XEmacPs_BdRingAlloc(MyRingPtr, 10, &BdPtr);
         ...
@@ -787,39 +810,35 @@ This function should not be preempted by another XEmacPs_Bd function call that m
     {
         Status = XEmacPs_BdRingUnAlloc(MyRingPtr, 10, &BdPtr);
     }
-

    A partial UnAlloc means some of the BDs Alloc'd will be returned:

    +

    +A partial UnAlloc means some of the BDs Alloc'd will be returned:

         Status = XEmacPs_BdRingAlloc(MyRingPtr, 10, &BdPtr);
     BdsLeft = 10;
-    CurBdPtr = BdPtr;
        while (BdsLeft)
+    CurBdPtr = BdPtr;

    +

        while (BdsLeft)
     {
        if (Error)
        {
           Status = XEmacPs_BdRingUnAlloc(MyRingPtr, BdsLeft, CurBdPtr);
-       }
           CurBdPtr = XEmacPs_BdRingNext(MyRingPtr, CurBdPtr);
+       }

    +

           CurBdPtr = XEmacPs_BdRingNext(MyRingPtr, CurBdPtr);
        BdsLeft--;
     }
-

    A partial UnAlloc must include the last BD in the list that was Alloc'd.

    -
    Parameters:
    +

    +A partial UnAlloc must include the last BD in the list that was Alloc'd.

    +

    Parameters:
    RingPtr is a pointer to the instance to be worked on.
    NumBd is the number of BDs to allocate
    BdSetPtr is an output parameter, it points to the first BD available for modification.
    -
    -
    Returns:
      -
    • XST_SUCCESS if the BDs were unallocated.
      • -
    • XST_FAILURE if NumBd parameter was greater that the number of BDs in the preprocessing state.
      • -
    +
    Returns:
      +
    • XST_SUCCESS if the BDs were unallocated.
    • XST_FAILURE if NumBd parameter was greater that the number of BDs in the preprocessing state.
    -
    Note:
    This function should not be preempted by another XEmacPs_Bd function call that modifies the BD space. It is the caller's responsibility to provide a mutual exclusion mechanism.
    +
    Note:
    This function should not be preempted by another XEmacPs_Bd function call that modifies the BD space. It is the caller's responsibility to provide a mutual exclusion mechanism.
    -
    - -

    -Copyright © 1995-2014 Xilinx, Inc. All rights reserved. -

    - - +

    +Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. diff --git a/XilinxProcessorIPLib/drivers/emacps/doc/html/api/xemacps__control_8c.html b/XilinxProcessorIPLib/drivers/emacps/doc/html/api/xemacps__control_8c.html index 6f5d11cf..a36deb48 100755 --- a/XilinxProcessorIPLib/drivers/emacps/doc/html/api/xemacps__control_8c.html +++ b/XilinxProcessorIPLib/drivers/emacps/doc/html/api/xemacps__control_8c.html @@ -2,93 +2,109 @@ - Xilinx Driver emacps v2_1: xemacps_control.c File Reference + xemacps_control.c File Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - - - -
    -

    xemacps_control.c File Reference

    #include "xemacps.h"
    - - - - - - - - - - - - - - - - - - - -

    Functions

    int XEmacPs_SetMacAddress (XEmacPs *InstancePtr, void *AddressPtr, u8 Index)
    void XEmacPs_GetMacAddress (XEmacPs *InstancePtr, void *AddressPtr, u8 Index)
    int XEmacPs_SetHash (XEmacPs *InstancePtr, void *AddressPtr)
    int XEmacPs_DeleteHash (XEmacPs *InstancePtr, void *AddressPtr)
    void XEmacPs_ClearHash (XEmacPs *InstancePtr)
    void XEmacPs_GetHash (XEmacPs *InstancePtr, void *AddressPtr)
    int XEmacPs_SetTypeIdCheck (XEmacPs *InstancePtr, u32 Id_Check, u8 Index)
    int XEmacPs_SetOptions (XEmacPs *InstancePtr, u32 Options)
    int XEmacPs_ClearOptions (XEmacPs *InstancePtr, u32 Options)
    u32 XEmacPs_GetOptions (XEmacPs *InstancePtr)
    int XEmacPs_SendPausePacket (XEmacPs *InstancePtr)
    u16 XEmacPs_GetOperatingSpeed (XEmacPs *InstancePtr)
    void XEmacPs_SetOperatingSpeed (XEmacPs *InstancePtr, u16 Speed)
    void XEmacPs_SetMdioDivisor (XEmacPs *InstancePtr, XEmacPs_MdcDiv Divisor)
    int XEmacPs_PhyRead (XEmacPs *InstancePtr, u32 PhyAddress, u32 RegisterNum, u16 *PhyDataPtr)
    int XEmacPs_PhyWrite (XEmacPs *InstancePtr, u32 PhyAddress, u32 RegisterNum, u16 PhyData)
    void XEmacPs_DMABLengthUpdate (XEmacPs *InstancePtr, int BLength)
    -

    Detailed Description

    -

    Functions in this file implement general purpose command and control related functionality. See xemacps.h for a detailed description of the driver.

    + +
    +
    +
    +
    +

    xemacps_control.c File Reference

    Detailed Description

    +Functions in this file implement general purpose command and control related functionality. See xemacps.h for a detailed description of the driver.

    - MODIFICATION HISTORY:
     Ver   Who  Date     Changes
+ MODIFICATION HISTORY:

    +

     Ver   Who  Date     Changes
  ----- ---- -------- -------------------------------------------------------
  1.00a wsy  01/10/10 First release
  1.02a asa  11/05/12 Added a new API for deleting an entry from the HASH
 					   register. Added a new API for setting the BURST length
 					   in DMACR register.
-

    Function Documentation

    - + +

    +#include "xemacps.h"
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    Functions

    int XEmacPs_SetMacAddress (XEmacPs *InstancePtr, void *AddressPtr, u8 Index)
    void XEmacPs_GetMacAddress (XEmacPs *InstancePtr, void *AddressPtr, u8 Index)
    int XEmacPs_SetHash (XEmacPs *InstancePtr, void *AddressPtr)
    int XEmacPs_DeleteHash (XEmacPs *InstancePtr, void *AddressPtr)
    void XEmacPs_ClearHash (XEmacPs *InstancePtr)
    void XEmacPs_GetHash (XEmacPs *InstancePtr, void *AddressPtr)
    int XEmacPs_SetTypeIdCheck (XEmacPs *InstancePtr, u32 Id_Check, u8 Index)
    int XEmacPs_SetOptions (XEmacPs *InstancePtr, u32 Options)
    int XEmacPs_ClearOptions (XEmacPs *InstancePtr, u32 Options)
    u32 XEmacPs_GetOptions (XEmacPs *InstancePtr)
    int XEmacPs_SendPausePacket (XEmacPs *InstancePtr)
    u16 XEmacPs_GetOperatingSpeed (XEmacPs *InstancePtr)
    void XEmacPs_SetOperatingSpeed (XEmacPs *InstancePtr, u16 Speed)
    void XEmacPs_SetMdioDivisor (XEmacPs *InstancePtr, XEmacPs_MdcDiv Divisor)
    int XEmacPs_PhyRead (XEmacPs *InstancePtr, u32 PhyAddress, u32 RegisterNum, u16 *PhyDataPtr)
    int XEmacPs_PhyWrite (XEmacPs *InstancePtr, u32 PhyAddress, u32 RegisterNum, u16 PhyData)
    void XEmacPs_DMABLengthUpdate (XEmacPs *InstancePtr, int BLength)
    +

    Function Documentation

    +
    - + - + - +
    void XEmacPs_ClearHash void XEmacPs_ClearHash ( XEmacPs *  InstancePtr InstancePtr  ) 
    -

    Clear the Hash registers for the mac address pointed by AddressPtr.

    -
    Parameters:
    + +

    +Clear the Hash registers for the mac address pointed by AddressPtr.

    +

    Parameters:
    InstancePtr is a pointer to the instance to be worked on.
    -
    -
    - +

    +

    - + @@ -102,34 +118,33 @@ - +
    int XEmacPs_ClearOptions int XEmacPs_ClearOptions ( XEmacPs *  InstancePtr,
    )
    -

    Clear options for the driver/device

    -
    Parameters:
    + +

    +Clear options for the driver/device

    +

    Parameters:
    InstancePtr is a pointer to the instance to be worked on.
    Options are the options to clear. Multiple options can be cleared by OR'ing XEMACPS_*_OPTIONS constants together. Options not specified are not affected.
    -
    -
    Returns:
      -
    • XST_SUCCESS if the options were set successfully
      • -
    • XST_DEVICE_IS_STARTED if the device has not yet been stopped
      • -
    +
    Returns:
      +
    • XST_SUCCESS if the options were set successfully
    • XST_DEVICE_IS_STARTED if the device has not yet been stopped
    -
    Note:
    See xemacps.h for a description of the available options.
    +
    Note:
    See xemacps.h for a description of the available options.
    -
    - +

    +

    - + @@ -143,35 +158,33 @@ - +
    int XEmacPs_DeleteHash int XEmacPs_DeleteHash ( XEmacPs *  InstancePtr,
    )
    -

    Delete 48-bit MAC addresses in hash table. The device must be stopped before calling this function.

    -
    Parameters:
    + +

    +Delete 48-bit MAC addresses in hash table. The device must be stopped before calling this function.

    +

    Parameters:
    InstancePtr is a pointer to the instance to be worked on.
    AddressPtr is a pointer to a 6-byte MAC address.
    -
    -
    Returns:
      -
    • XST_SUCCESS if the HASH MAC address was deleted successfully
      • -
    • XST_DEVICE_IS_STARTED if the device has not yet been stopped
      • -
    • XST_INVALID_PARAM if the HASH MAC address passed in does not meet requirement after calculation
      • -
    +
    Returns:
      +
    • XST_SUCCESS if the HASH MAC address was deleted successfully
    • XST_DEVICE_IS_STARTED if the device has not yet been stopped
    • XST_INVALID_PARAM if the HASH MAC address passed in does not meet requirement after calculation
    -
    Note:
    Having Aptr be unsigned type prevents the following operations from sign extending.
    +
    Note:
    Having Aptr be unsigned type prevents the following operations from sign extending.
    -
    - +

    +

    - + @@ -185,29 +198,30 @@ - +
    void XEmacPs_DMABLengthUpdate void XEmacPs_DMABLengthUpdate ( XEmacPs *  InstancePtr,
    )
    -

    API to update the Burst length in the DMACR register.

    -
    Parameters:
    + +

    +API to update the Burst length in the DMACR register.

    +

    Parameters:
    InstancePtr is a pointer to the XEmacPs instance to be worked on.
    BLength is the length in bytes for the dma burst.
    -
    -
    Returns:
    None
    +
    Returns:
    None
    -
    - +

    +

    - + @@ -221,28 +235,29 @@ - +
    void XEmacPs_GetHash void XEmacPs_GetHash ( XEmacPs *  InstancePtr,
    )
    -

    Get the Hash address for this driver/device.

    -
    Parameters:
    + +

    +Get the Hash address for this driver/device.

    +

    Parameters:
    InstancePtr is a pointer to the instance to be worked on.
    AddressPtr is an output parameter, and is a pointer to a buffer into which the current HASH MAC address will be copied.
    -
    -
    - +

    +

    - + @@ -262,83 +277,86 @@ - +
    void XEmacPs_GetMacAddress void XEmacPs_GetMacAddress ( XEmacPs *  InstancePtr,
    )
    -

    Get the MAC address for this driver/device.

    -
    Parameters:
    + +

    +Get the MAC address for this driver/device.

    +

    Parameters:
    InstancePtr is a pointer to the instance to be worked on.
    AddressPtr is an output parameter, and is a pointer to a buffer into which the current MAC address will be copied.
    Index is a index to which MAC (1-4) address.
    -
    -
    - +

    +

    - + - + - +
    u16 XEmacPs_GetOperatingSpeed u16 XEmacPs_GetOperatingSpeed ( XEmacPs *  InstancePtr InstancePtr  ) 
    -

    XEmacPs_GetOperatingSpeed gets the current operating link speed. This may be the value set by XEmacPs_SetOperatingSpeed() or a hardware default.

    -
    Parameters:
    + +

    +XEmacPs_GetOperatingSpeed gets the current operating link speed. This may be the value set by XEmacPs_SetOperatingSpeed() or a hardware default.

    +

    Parameters:
    InstancePtr references the TEMAC channel on which to operate.
    -
    -
    Returns:
    XEmacPs_GetOperatingSpeed returns the link speed in units of megabits per second.
    -
    Note:
    +
    Returns:
    XEmacPs_GetOperatingSpeed returns the link speed in units of megabits per second.
    +
    Note:
    -
    - +

    +

    - + - + - +
    u32 XEmacPs_GetOptions u32 XEmacPs_GetOptions ( XEmacPs *  InstancePtr InstancePtr  ) 
    -

    Get current option settings

    -
    Parameters:
    + +

    +Get current option settings

    +

    Parameters:
    InstancePtr is a pointer to the instance to be worked on.
    -
    -
    Returns:
    A bitmask of XTE_*_OPTION constants. Any bit set to 1 is to be interpreted as a set opion.
    -
    Note:
    See xemacps.h for a description of the available options.
    +
    Returns:
    A bitmask of XTE_*_OPTION constants. Any bit set to 1 is to be interpreted as a set opion.
    +
    Note:
    See xemacps.h for a description of the available options.
    -
    - +

    +

    - + @@ -364,40 +382,39 @@ - +
    int XEmacPs_PhyRead int XEmacPs_PhyRead ( XEmacPs *  InstancePtr,
    )
    -

    Read the current value of the PHY register indicated by the PhyAddress and the RegisterNum parameters. The MAC provides the driver with the ability to talk to a PHY that adheres to the Media Independent Interface (MII) as defined in the IEEE 802.3 standard.

    -

    Prior to PHY access with this function, the user should have setup the MDIO clock with XEmacPs_SetMdioDivisor().

    -
    Parameters:
    + +

    +Read the current value of the PHY register indicated by the PhyAddress and the RegisterNum parameters. The MAC provides the driver with the ability to talk to a PHY that adheres to the Media Independent Interface (MII) as defined in the IEEE 802.3 standard.

    +Prior to PHY access with this function, the user should have setup the MDIO clock with XEmacPs_SetMdioDivisor().

    +

    Parameters:
    InstancePtr is a pointer to the XEmacPs instance to be worked on.
    PhyAddress is the address of the PHY to be read (supports multiple PHYs)
    RegisterNum is the register number, 0-31, of the specific PHY register to read
    PhyDataPtr is an output parameter, and points to a 16-bit buffer into which the current value of the register will be copied.
    -
    -
    Returns:
    +
    Returns:
      -
    • XST_SUCCESS if the PHY was read from successfully
      • -
    • XST_EMAC_MII_BUSY if there is another PHY operation in progress
      • -
    -
    Note:
    -

    This function is not thread-safe. The user must provide mutually exclusive access to this function if there are to be multiple threads that can call it.

    -

    There is the possibility that this function will not return if the hardware is broken (i.e., it never sets the status bit indicating that the read is done). If this is of concern to the user, the user should provide a mechanism suitable to their needs for recovery.

    -

    For the duration of this function, all host interface reads and writes are blocked to the current XEmacPs instance.

    - +
  • XST_SUCCESS if the PHY was read from successfully
  • XST_EMAC_MII_BUSY if there is another PHY operation in progress
    • +

    +

    Note:
    +This function is not thread-safe. The user must provide mutually exclusive access to this function if there are to be multiple threads that can call it.

    +There is the possibility that this function will not return if the hardware is broken (i.e., it never sets the status bit indicating that the read is done). If this is of concern to the user, the user should provide a mechanism suitable to their needs for recovery.

    +For the duration of this function, all host interface reads and writes are blocked to the current XEmacPs instance.

    -
    - +

    +

    - + @@ -423,70 +440,68 @@ - +
    int XEmacPs_PhyWrite int XEmacPs_PhyWrite ( XEmacPs *  InstancePtr,
    )
    -

    Write data to the specified PHY register. The Ethernet driver does not require the device to be stopped before writing to the PHY. Although it is probably a good idea to stop the device, it is the responsibility of the application to deem this necessary. The MAC provides the driver with the ability to talk to a PHY that adheres to the Media Independent Interface (MII) as defined in the IEEE 802.3 standard.

    -

    Prior to PHY access with this function, the user should have setup the MDIO clock with XEmacPs_SetMdioDivisor().

    -
    Parameters:
    + +

    +Write data to the specified PHY register. The Ethernet driver does not require the device to be stopped before writing to the PHY. Although it is probably a good idea to stop the device, it is the responsibility of the application to deem this necessary. The MAC provides the driver with the ability to talk to a PHY that adheres to the Media Independent Interface (MII) as defined in the IEEE 802.3 standard.

    +Prior to PHY access with this function, the user should have setup the MDIO clock with XEmacPs_SetMdioDivisor().

    +

    Parameters:
    InstancePtr is a pointer to the XEmacPs instance to be worked on.
    PhyAddress is the address of the PHY to be written (supports multiple PHYs)
    RegisterNum is the register number, 0-31, of the specific PHY register to write
    PhyData is the 16-bit value that will be written to the register
    -
    -
    Returns:
    +
    Returns:
      -
    • XST_SUCCESS if the PHY was written to successfully. Since there is no error status from the MAC on a write, the user should read the PHY to verify the write was successful.
      • -
    • XST_EMAC_MII_BUSY if there is another PHY operation in progress
      • -
    -
    Note:
    -

    This function is not thread-safe. The user must provide mutually exclusive access to this function if there are to be multiple threads that can call it.

    -

    There is the possibility that this function will not return if the hardware is broken (i.e., it never sets the status bit indicating that the write is done). If this is of concern to the user, the user should provide a mechanism suitable to their needs for recovery.

    -

    For the duration of this function, all host interface reads and writes are blocked to the current XEmacPs instance.

    - +
  • XST_SUCCESS if the PHY was written to successfully. Since there is no error status from the MAC on a write, the user should read the PHY to verify the write was successful.
  • XST_EMAC_MII_BUSY if there is another PHY operation in progress
    • +

    +

    Note:
    +This function is not thread-safe. The user must provide mutually exclusive access to this function if there are to be multiple threads that can call it.

    +There is the possibility that this function will not return if the hardware is broken (i.e., it never sets the status bit indicating that the write is done). If this is of concern to the user, the user should provide a mechanism suitable to their needs for recovery.

    +For the duration of this function, all host interface reads and writes are blocked to the current XEmacPs instance.

    -
    - +

    +

    - + - + - +
    int XEmacPs_SendPausePacket int XEmacPs_SendPausePacket ( XEmacPs *  InstancePtr InstancePtr  ) 
    -

    Send a pause packet

    -
    Parameters:
    + +

    +Send a pause packet

    +

    Parameters:
    InstancePtr is a pointer to the instance to be worked on.
    -
    -
    Returns:
      -
    • XST_SUCCESS if pause frame transmission was initiated
      • -
    • XST_DEVICE_IS_STOPPED if the device has not been started.
      • -
    +
    Returns:
      +
    • XST_SUCCESS if pause frame transmission was initiated
    • XST_DEVICE_IS_STOPPED if the device has not been started.
    -
    - +

    +

    - + @@ -500,14 +515,16 @@ - +
    int XEmacPs_SetHash int XEmacPs_SetHash ( XEmacPs *  InstancePtr,
    )
    -

    Set 48-bit MAC addresses in hash table. The device must be stopped before calling this function.

    -

    The hash address register is 64 bits long and takes up two locations in the memory map. The least significant bits are stored in hash register bottom and the most significant bits in hash register top.

    -

    The unicast hash enable and the multicast hash enable bits in the network configuration register enable the reception of hash matched frames. The destination address is reduced to a 6 bit index into the 64 bit hash register using the following hash function. The hash function is an XOR of every sixth bit of the destination address.

    + +

    +Set 48-bit MAC addresses in hash table. The device must be stopped before calling this function.

    +The hash address register is 64 bits long and takes up two locations in the memory map. The least significant bits are stored in hash register bottom and the most significant bits in hash register top.

    +The unicast hash enable and the multicast hash enable bits in the network configuration register enable the reception of hash matched frames. The destination address is reduced to a 6 bit index into the 64 bit hash register using the following hash function. The hash function is an XOR of every sixth bit of the destination address.

      hash_index[05] = da[05]^da[11]^da[17]^da[23]^da[29]^da[35]^da[41]^da[47]
  hash_index[04] = da[04]^da[10]^da[16]^da[22]^da[28]^da[34]^da[40]^da[46]
@@ -515,34 +532,31 @@
  hash_index[02] = da[02]^da[08]^da[14]^da[20]^da[26]^da[32]^da[38]^da[44]
  hash_index[01] = da[01]^da[07]^da[13]^da[19]^da[25]^da[31]^da[37]^da[43]
  hash_index[00] = da[00]^da[06]^da[12]^da[18]^da[24]^da[30]^da[36]^da[42]
-

    da[0] represents the least significant bit of the first byte received, that is, the multicast/unicast indicator, and da[47] represents the most significant bit of the last byte received.

    -

    If the hash index points to a bit that is set in the hash register then the frame will be matched according to whether the frame is multicast or unicast.

    -

    A multicast match will be signaled if the multicast hash enable bit is set, da[0] is logic 1 and the hash index points to a bit set in the hash register.

    -

    A unicast match will be signaled if the unicast hash enable bit is set, da[0] is logic 0 and the hash index points to a bit set in the hash register.

    -

    To receive all multicast frames, the hash register should be set with all ones and the multicast hash enable bit should be set in the network configuration register.

    -
    Parameters:
    +

    +da[0] represents the least significant bit of the first byte received, that is, the multicast/unicast indicator, and da[47] represents the most significant bit of the last byte received.

    +If the hash index points to a bit that is set in the hash register then the frame will be matched according to whether the frame is multicast or unicast.

    +A multicast match will be signaled if the multicast hash enable bit is set, da[0] is logic 1 and the hash index points to a bit set in the hash register.

    +A unicast match will be signaled if the unicast hash enable bit is set, da[0] is logic 0 and the hash index points to a bit set in the hash register.

    +To receive all multicast frames, the hash register should be set with all ones and the multicast hash enable bit should be set in the network configuration register.

    +

    Parameters:
    InstancePtr is a pointer to the instance to be worked on.
    AddressPtr is a pointer to a 6-byte MAC address.
    -
    -
    Returns:
      -
    • XST_SUCCESS if the HASH MAC address was set successfully
      • -
    • XST_DEVICE_IS_STARTED if the device has not yet been stopped
      • -
    • XST_INVALID_PARAM if the HASH MAC address passed in does not meet requirement after calculation
      • -
    +
    Returns:
      +
    • XST_SUCCESS if the HASH MAC address was set successfully
    • XST_DEVICE_IS_STARTED if the device has not yet been stopped
    • XST_INVALID_PARAM if the HASH MAC address passed in does not meet requirement after calculation
    -
    Note:
    Having Aptr be unsigned type prevents the following operations from sign extending.
    +
    Note:
    Having Aptr be unsigned type prevents the following operations from sign extending.
    -
    - +

    +

    - + @@ -562,34 +576,33 @@ - +
    int XEmacPs_SetMacAddress int XEmacPs_SetMacAddress ( XEmacPs *  InstancePtr,
    )
    -

    Set the MAC address for this driver/device. The address is a 48-bit value. The device must be stopped before calling this function.

    -
    Parameters:
    + +

    +Set the MAC address for this driver/device. The address is a 48-bit value. The device must be stopped before calling this function.

    +

    Parameters:
    InstancePtr is a pointer to the instance to be worked on.
    AddressPtr is a pointer to a 6-byte MAC address.
    Index is a index to which MAC (1-4) address.
    -
    -
    Returns:
      -
    • XST_SUCCESS if the MAC address was set successfully
      • -
    • XST_DEVICE_IS_STARTED if the device has not yet been stopped
      • -
    +
    Returns:
      +
    • XST_SUCCESS if the MAC address was set successfully
    • XST_DEVICE_IS_STARTED if the device has not yet been stopped
    -
    - +

    +

    - + @@ -597,24 +610,27 @@ - + - +
    void XEmacPs_SetMdioDivisor void XEmacPs_SetMdioDivisor ( XEmacPs *  InstancePtr,
    XEmacPs_MdcDiv XEmacPs_MdcDiv  Divisor 
    )
    -

    Set the MDIO clock divisor.

    -

    Calculating the divisor:

    + +

    +Set the MDIO clock divisor.

    +Calculating the divisor:

                   f[HOSTCLK]
    f[MDC] = -----------------
             (1 + Divisor) * 2
-

    where f[HOSTCLK] is the bus clock frequency in MHz, and f[MDC] is the MDIO clock frequency in MHz to the PHY. Typically, f[MDC] should not exceed 2.5 MHz. Some PHYs can tolerate faster speeds which means faster access. Here is the table to show values to generate MDC,

    +

    +where f[HOSTCLK] is the bus clock frequency in MHz, and f[MDC] is the MDIO clock frequency in MHz to the PHY. Typically, f[MDC] should not exceed 2.5 MHz. Some PHYs can tolerate faster speeds which means faster access. Here is the table to show values to generate MDC,

      000 : divide pclk by   8 (pclk up to  20 MHz)
  001 : divide pclk by  16 (pclk up to  40 MHz)
@@ -624,22 +640,22 @@
  101 : divide pclk by  96 (pclk up to 240 MHz)
  110 : divide pclk by 128 (pclk up to 320 MHz)
  111 : divide pclk by 224 (pclk up to 540 MHz)
-
    Parameters:
    +

    +

    Parameters:
    InstancePtr is a pointer to the instance to be worked on.
    Divisor is the divisor to set. Range is 0b000 to 0b111.
    -
    -
    - +

    +

    - + @@ -653,29 +669,30 @@ - +
    void XEmacPs_SetOperatingSpeed void XEmacPs_SetOperatingSpeed ( XEmacPs *  InstancePtr,
    )
    -

    XEmacPs_SetOperatingSpeed sets the current operating link speed. For any traffic to be passed, this speed must match the current MII/GMII/SGMII/RGMII link speed.

    -
    Parameters:
    + +

    +XEmacPs_SetOperatingSpeed sets the current operating link speed. For any traffic to be passed, this speed must match the current MII/GMII/SGMII/RGMII link speed.

    +

    Parameters:
    InstancePtr references the TEMAC channel on which to operate.
    Speed is the speed to set in units of Mbps. Valid values are 10, 100, or 1000. XEmacPs_SetOperatingSpeed ignores invalid values.
    -
    -
    Note:
    +
    Note:
    -
    - +

    +

    - + @@ -689,34 +706,33 @@ - +
    int XEmacPs_SetOptions int XEmacPs_SetOptions ( XEmacPs *  InstancePtr,
    )
    -

    Set options for the driver/device. The driver should be stopped with XEmacPs_Stop() before changing options.

    -
    Parameters:
    + +

    +Set options for the driver/device. The driver should be stopped with XEmacPs_Stop() before changing options.

    +

    Parameters:
    InstancePtr is a pointer to the instance to be worked on.
    Options are the options to set. Multiple options can be set by OR'ing XTE_*_OPTIONS constants together. Options not specified are not affected.
    -
    -
    Returns:
      -
    • XST_SUCCESS if the options were set successfully
      • -
    • XST_DEVICE_IS_STARTED if the device has not yet been stopped
      • -
    +
    Returns:
      +
    • XST_SUCCESS if the options were set successfully
    • XST_DEVICE_IS_STARTED if the device has not yet been stopped
    -
    Note:
    See xemacps.h for a description of the available options.
    +
    Note:
    See xemacps.h for a description of the available options.
    -
    - +

    +

    - + @@ -736,31 +752,25 @@ - +
    int XEmacPs_SetTypeIdCheck int XEmacPs_SetTypeIdCheck ( XEmacPs *  InstancePtr,
    )
    -

    Set the Type ID match for this driver/device. The register is a 32-bit value. The device must be stopped before calling this function.

    -
    Parameters:
    + +

    +Set the Type ID match for this driver/device. The register is a 32-bit value. The device must be stopped before calling this function.

    +

    Parameters:
    InstancePtr is a pointer to the instance to be worked on.
    Id_Check is type ID to be configured.
    Index is a index to which Type ID (1-4).
    -
    -
    Returns:
      -
    • XST_SUCCESS if the MAC address was set successfully
      • -
    • XST_DEVICE_IS_STARTED if the device has not yet been stopped
      • -
    +
    Returns:
      +
    • XST_SUCCESS if the MAC address was set successfully
    • XST_DEVICE_IS_STARTED if the device has not yet been stopped
    -
    - -

    -Copyright © 1995-2014 Xilinx, Inc. All rights reserved. -

    - - +

    +Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. diff --git a/XilinxProcessorIPLib/drivers/emacps/doc/html/api/xemacps__g_8c.html b/XilinxProcessorIPLib/drivers/emacps/doc/html/api/xemacps__g_8c.html index 689938a3..40f6a9b3 100755 --- a/XilinxProcessorIPLib/drivers/emacps/doc/html/api/xemacps__g_8c.html +++ b/XilinxProcessorIPLib/drivers/emacps/doc/html/api/xemacps__g_8c.html @@ -2,55 +2,56 @@ - Xilinx Driver emacps v2_1: xemacps_g.c File Reference + xemacps_g.c File Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - - - -
    -

    xemacps_g.c File Reference

    #include "xparameters.h"
    -#include "xemacps.h"
    - - - -

    Variables

    XEmacPs_Config XEmacPs_ConfigTable [XPAR_XEMACPS_NUM_INSTANCES]
    -

    Detailed Description

    -

    This file contains a configuration table that specifies the configuration of ethernet devices in the system.

    + +
    +
    +
    +
    +

    xemacps_g.c File Reference

    Detailed Description

    +This file contains a configuration table that specifies the configuration of ethernet devices in the system.

    - MODIFICATION HISTORY:
     Ver   Who  Date     Changes
+ MODIFICATION HISTORY:

    +

     Ver   Who  Date     Changes
  ----- ---- -------- -----------------------------------------------
  1.00a wsy  01/10/10 First release
  2.00  hk   22/01/14 Added check for picking second instance
-

    Variable Documentation

    - + +

    +#include "xparameters.h"
    +#include "xemacps.h"
    + + + + + +

    Variables

    XEmacPs_Config XEmacPs_ConfigTable [XPAR_XEMACPS_NUM_INSTANCES]
    +

    Variable Documentation

    +
    - +
    XEmacPs_Config XEmacPs_ConfigTable[XPAR_XEMACPS_NUM_INSTANCES]XEmacPs_Config XEmacPs_ConfigTable[XPAR_XEMACPS_NUM_INSTANCES]
    + +

    Initial value:

     {
         {
                 XPAR_XEMACPS_0_DEVICE_ID,
@@ -65,10 +66,5 @@
 }
    -
    -
    -

    -Copyright © 1995-2014 Xilinx, Inc. All rights reserved. -

    - - +

    +Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. diff --git a/XilinxProcessorIPLib/drivers/emacps/doc/html/api/xemacps__hw_8c.html b/XilinxProcessorIPLib/drivers/emacps/doc/html/api/xemacps__hw_8c.html index 10a26711..aa088af7 100755 --- a/XilinxProcessorIPLib/drivers/emacps/doc/html/api/xemacps__hw_8c.html +++ b/XilinxProcessorIPLib/drivers/emacps/doc/html/api/xemacps__hw_8c.html @@ -2,74 +2,69 @@ - Xilinx Driver emacps v2_1: xemacps_hw.c File Reference + xemacps_hw.c File Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - - - -
    -

    xemacps_hw.c File Reference

    #include "xparameters.h"
    -#include "xemacps_hw.h"
    - - - -

    Functions

    void XEmacPs_ResetHw (u32 BaseAddr)
    -

    Detailed Description

    -

    This file contains the implementation of the ethernet interface reset sequence

    + +
    +
    +
    +
    +

    xemacps_hw.c File Reference

    Detailed Description

    +This file contains the implementation of the ethernet interface reset sequence

    - MODIFICATION HISTORY:
     Ver   Who  Date     Changes
+ MODIFICATION HISTORY:

    +

     Ver   Who  Date     Changes
  ----- ---- -------- -------------------------------------------------------
  1.05a kpc  28/06/13 First release
-

    Function Documentation

    - + +

    +#include "xparameters.h"
    +#include "xemacps_hw.h"
    + + + + + +

    Functions

    void XEmacPs_ResetHw (u32 BaseAddr)
    +

    Function Documentation

    +
    - + - + - +
    void XEmacPs_ResetHw void XEmacPs_ResetHw ( u32  BaseAddr BaseAddr  ) 
    -

    This function perform the reset sequence to the given emacps interface by configuring the appropriate control bits in the emacps specifc registers. the emacps reset squence involves the following steps Disable all the interuupts Clear the status registers Disable Rx and Tx engines Update the Tx and Rx descriptor queue registers with reset values Update the other relevant control registers with reset value

    -
    Parameters:
    + +

    +This function perform the reset sequence to the given emacps interface by configuring the appropriate control bits in the emacps specifc registers. the emacps reset squence involves the following steps Disable all the interuupts Clear the status registers Disable Rx and Tx engines Update the Tx and Rx descriptor queue registers with reset values Update the other relevant control registers with reset value

    +

    Parameters:
    BaseAddress of the interface
    -
    -
    Returns:
    N/A
    -
    Note:
    This function will not modify the slcr registers that are relavant for emacps controller
    +
    Returns:
    N/A
    +
    Note:
    This function will not modify the slcr registers that are relavant for emacps controller
    -
    -
    -

    -Copyright © 1995-2014 Xilinx, Inc. All rights reserved. -

    - - +

    +Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. diff --git a/XilinxProcessorIPLib/drivers/emacps/doc/html/api/xemacps__hw_8h.html b/XilinxProcessorIPLib/drivers/emacps/doc/html/api/xemacps__hw_8h.html index 510b391d..33fa6179 100755 --- a/XilinxProcessorIPLib/drivers/emacps/doc/html/api/xemacps__hw_8h.html +++ b/XilinxProcessorIPLib/drivers/emacps/doc/html/api/xemacps__hw_8h.html @@ -2,3650 +2,4087 @@ - Xilinx Driver emacps v2_1: xemacps_hw.h File Reference + xemacps_hw.h File Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - - - -
    -

    xemacps_hw.h File Reference

    #include "xil_types.h"
    -#include "xil_assert.h"
    -#include "xil_io.h"
    - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -

    Defines

    #define XEMACPS_HW_H
    #define XEMACPS_MAX_MAC_ADDR   4
    #define XEMACPS_MAX_TYPE_ID   4
    #define XEMACPS_BD_ALIGNMENT   4
    #define XEMACPS_RX_BUF_ALIGNMENT   4
    #define XEMACPS_RX_BUF_SIZE   1536
    #define XEMACPS_RX_BUF_UNIT   64
    #define XEMACPS_MAX_RXBD   128
    #define XEMACPS_MAX_TXBD   128
    #define XEMACPS_MAX_HASH_BITS   64
    #define XEMACPS_NWCTRL_OFFSET   0x00000000
    #define XEMACPS_NWCFG_OFFSET   0x00000004
    #define XEMACPS_NWSR_OFFSET   0x00000008
    #define XEMACPS_DMACR_OFFSET   0x00000010
    #define XEMACPS_TXSR_OFFSET   0x00000014
    #define XEMACPS_RXQBASE_OFFSET   0x00000018
    #define XEMACPS_TXQBASE_OFFSET   0x0000001C
    #define XEMACPS_RXSR_OFFSET   0x00000020
    #define XEMACPS_ISR_OFFSET   0x00000024
    #define XEMACPS_IER_OFFSET   0x00000028
    #define XEMACPS_IDR_OFFSET   0x0000002C
    #define XEMACPS_IMR_OFFSET   0x00000030
    #define XEMACPS_PHYMNTNC_OFFSET   0x00000034
    #define XEMACPS_RXPAUSE_OFFSET   0x00000038
    #define XEMACPS_TXPAUSE_OFFSET   0x0000003C
    #define XEMACPS_HASHL_OFFSET   0x00000080
    #define XEMACPS_HASHH_OFFSET   0x00000084
    #define XEMACPS_LADDR1L_OFFSET   0x00000088
    #define XEMACPS_LADDR1H_OFFSET   0x0000008C
    #define XEMACPS_LADDR2L_OFFSET   0x00000090
    #define XEMACPS_LADDR2H_OFFSET   0x00000094
    #define XEMACPS_LADDR3L_OFFSET   0x00000098
    #define XEMACPS_LADDR3H_OFFSET   0x0000009C
    #define XEMACPS_LADDR4L_OFFSET   0x000000A0
    #define XEMACPS_LADDR4H_OFFSET   0x000000A4
    #define XEMACPS_MATCH1_OFFSET   0x000000A8
    #define XEMACPS_MATCH2_OFFSET   0x000000AC
    #define XEMACPS_MATCH3_OFFSET   0x000000B0
    #define XEMACPS_MATCH4_OFFSET   0x000000B4
    #define XEMACPS_STRETCH_OFFSET   0x000000BC
    #define XEMACPS_OCTTXL_OFFSET   0x00000100
    #define XEMACPS_OCTTXH_OFFSET   0x00000104
    #define XEMACPS_TXCNT_OFFSET   0x00000108
    #define XEMACPS_TXBCCNT_OFFSET   0x0000010C
    #define XEMACPS_TXMCCNT_OFFSET   0x00000110
    #define XEMACPS_TXPAUSECNT_OFFSET   0x00000114
    #define XEMACPS_TX64CNT_OFFSET   0x00000118
    #define XEMACPS_TX65CNT_OFFSET   0x0000011C
    #define XEMACPS_TX128CNT_OFFSET   0x00000120
    #define XEMACPS_TX256CNT_OFFSET   0x00000124
    #define XEMACPS_TX512CNT_OFFSET   0x00000128
    #define XEMACPS_TX1024CNT_OFFSET   0x0000012C
    #define XEMACPS_TX1519CNT_OFFSET   0x00000130
    #define XEMACPS_TXURUNCNT_OFFSET   0x00000134
    #define XEMACPS_SNGLCOLLCNT_OFFSET   0x00000138
    #define XEMACPS_MULTICOLLCNT_OFFSET   0x0000013C
    #define XEMACPS_EXCESSCOLLCNT_OFFSET   0x00000140
    #define XEMACPS_LATECOLLCNT_OFFSET   0x00000144
    #define XEMACPS_TXDEFERCNT_OFFSET   0x00000148
    #define XEMACPS_TXCSENSECNT_OFFSET   0x0000014C
    #define XEMACPS_OCTRXL_OFFSET   0x00000150
    #define XEMACPS_OCTRXH_OFFSET   0x00000154
    #define XEMACPS_RXCNT_OFFSET   0x00000158
    #define XEMACPS_RXBROADCNT_OFFSET   0x0000015C
    #define XEMACPS_RXMULTICNT_OFFSET   0x00000160
    #define XEMACPS_RXPAUSECNT_OFFSET   0x00000164
    #define XEMACPS_RX64CNT_OFFSET   0x00000168
    #define XEMACPS_RX65CNT_OFFSET   0x0000016C
    #define XEMACPS_RX128CNT_OFFSET   0x00000170
    #define XEMACPS_RX256CNT_OFFSET   0x00000174
    #define XEMACPS_RX512CNT_OFFSET   0x00000178
    #define XEMACPS_RX1024CNT_OFFSET   0x0000017C
    #define XEMACPS_RX1519CNT_OFFSET   0x00000180
    #define XEMACPS_RXUNDRCNT_OFFSET   0x00000184
    #define XEMACPS_RXOVRCNT_OFFSET   0x00000188
    #define XEMACPS_RXJABCNT_OFFSET   0x0000018C
    #define XEMACPS_RXFCSCNT_OFFSET   0x00000190
    #define XEMACPS_RXLENGTHCNT_OFFSET   0x00000194
    #define XEMACPS_RXSYMBCNT_OFFSET   0x00000198
    #define XEMACPS_RXALIGNCNT_OFFSET   0x0000019C
    #define XEMACPS_RXRESERRCNT_OFFSET   0x000001A0
    #define XEMACPS_RXORCNT_OFFSET   0x000001A4
    #define XEMACPS_RXIPCCNT_OFFSET   0x000001A8
    #define XEMACPS_RXTCPCCNT_OFFSET   0x000001AC
    #define XEMACPS_RXUDPCCNT_OFFSET   0x000001B0
    #define XEMACPS_LAST_OFFSET   0x000001B4
    #define XEMACPS_1588_SEC_OFFSET   0x000001D0
    #define XEMACPS_1588_NANOSEC_OFFSET   0x000001D4
    #define XEMACPS_1588_ADJ_OFFSET   0x000001D8
    #define XEMACPS_1588_INC_OFFSET   0x000001DC
    #define XEMACPS_PTP_TXSEC_OFFSET   0x000001E0
    #define XEMACPS_PTP_TXNANOSEC_OFFSET   0x000001E4
    #define XEMACPS_PTP_RXSEC_OFFSET   0x000001E8
    #define XEMACPS_PTP_RXNANOSEC_OFFSET   0x000001EC
    #define XEMACPS_PTPP_TXSEC_OFFSET   0x000001F0
    #define XEMACPS_PTPP_TXNANOSEC_OFFSET   0x000001F4
    #define XEMACPS_PTPP_RXSEC_OFFSET   0x000001F8
    #define XEMACPS_PTPP_RXNANOSEC_OFFSET   0x000001FC
    #define XEMACPS_BD_ADDR_OFFSET   0x00000000
    #define XEMACPS_BD_STAT_OFFSET   0x00000004
    #define XEMACPS_TXBUF_USED_MASK   0x80000000
    #define XEMACPS_TXBUF_WRAP_MASK   0x40000000
    #define XEMACPS_TXBUF_RETRY_MASK   0x20000000
    #define XEMACPS_TXBUF_URUN_MASK   0x10000000
    #define XEMACPS_TXBUF_EXH_MASK   0x08000000
    #define XEMACPS_TXBUF_TCP_MASK   0x04000000
    #define XEMACPS_TXBUF_NOCRC_MASK   0x00010000
    #define XEMACPS_TXBUF_LAST_MASK   0x00008000
    #define XEMACPS_TXBUF_LEN_MASK   0x00003FFF
    #define XEMACPS_RXBUF_BCAST_MASK   0x80000000
    #define XEMACPS_RXBUF_MULTIHASH_MASK   0x40000000
    #define XEMACPS_RXBUF_UNIHASH_MASK   0x20000000
    #define XEMACPS_RXBUF_EXH_MASK   0x08000000
    #define XEMACPS_RXBUF_AMATCH_MASK   0x06000000
    #define XEMACPS_RXBUF_IDFOUND_MASK   0x01000000
    #define XEMACPS_RXBUF_IDMATCH_MASK   0x00C00000
    #define XEMACPS_RXBUF_VLAN_MASK   0x00200000
    #define XEMACPS_RXBUF_PRI_MASK   0x00100000
    #define XEMACPS_RXBUF_VPRI_MASK   0x000E0000
    #define XEMACPS_RXBUF_CFI_MASK   0x00010000
    #define XEMACPS_RXBUF_EOF_MASK   0x00008000
    #define XEMACPS_RXBUF_SOF_MASK   0x00004000
    #define XEMACPS_RXBUF_LEN_MASK   0x00001FFF
    #define XEMACPS_RXBUF_WRAP_MASK   0x00000002
    #define XEMACPS_RXBUF_NEW_MASK   0x00000001
    #define XEMACPS_RXBUF_ADD_MASK   0xFFFFFFFC
    #define XEmacPs_In32   Xil_In32
    #define XEmacPs_Out32   Xil_Out32
    #define XEmacPs_ReadReg(BaseAddress, RegOffset)   XEmacPs_In32((BaseAddress) + (RegOffset))
    #define XEmacPs_WriteReg(BaseAddress, RegOffset, Data)   XEmacPs_Out32((BaseAddress) + (RegOffset), (Data))
    Direction identifiers

    These are used by several functions and callbacks that need to specify whether an operation specifies a send or receive channel.

    -

    #define XEMACPS_SEND   1
    #define XEMACPS_RECV   2
    network control register bit definitions

    -

    #define XEMACPS_NWCTRL_FLUSH_DPRAM_MASK   0x00040000
    #define XEMACPS_NWCTRL_ZEROPAUSETX_MASK   0x00000800
    #define XEMACPS_NWCTRL_PAUSETX_MASK   0x00000800
    #define XEMACPS_NWCTRL_HALTTX_MASK   0x00000400
    #define XEMACPS_NWCTRL_STARTTX_MASK   0x00000200
    #define XEMACPS_NWCTRL_STATWEN_MASK   0x00000080
    #define XEMACPS_NWCTRL_STATINC_MASK   0x00000040
    #define XEMACPS_NWCTRL_STATCLR_MASK   0x00000020
    #define XEMACPS_NWCTRL_MDEN_MASK   0x00000010
    #define XEMACPS_NWCTRL_TXEN_MASK   0x00000008
    #define XEMACPS_NWCTRL_RXEN_MASK   0x00000004
    #define XEMACPS_NWCTRL_LOOPEN_MASK   0x00000002
    network configuration register bit definitions

    -

    #define XEMACPS_NWCFG_BADPREAMBEN_MASK   0x20000000
    #define XEMACPS_NWCFG_IPDSTRETCH_MASK   0x10000000
    #define XEMACPS_NWCFG_FCSIGNORE_MASK   0x04000000
    #define XEMACPS_NWCFG_HDRXEN_MASK   0x02000000
    #define XEMACPS_NWCFG_RXCHKSUMEN_MASK   0x01000000
    #define XEMACPS_NWCFG_PAUSECOPYDI_MASK   0x00800000
    #define XEMACPS_NWCFG_MDC_SHIFT_MASK   18
    #define XEMACPS_NWCFG_MDCCLKDIV_MASK   0x001C0000
    #define XEMACPS_NWCFG_FCSREM_MASK   0x00020000
    #define XEMACPS_NWCFG_LENGTHERRDSCRD_MASK   0x00010000
    #define XEMACPS_NWCFG_RXOFFS_MASK   0x0000C000
    #define XEMACPS_NWCFG_PAUSEEN_MASK   0x00002000
    #define XEMACPS_NWCFG_RETRYTESTEN_MASK   0x00001000
    #define XEMACPS_NWCFG_EXTADDRMATCHEN_MASK   0x00000200
    #define XEMACPS_NWCFG_1000_MASK   0x00000400
    #define XEMACPS_NWCFG_1536RXEN_MASK   0x00000100
    #define XEMACPS_NWCFG_UCASTHASHEN_MASK   0x00000080
    #define XEMACPS_NWCFG_MCASTHASHEN_MASK   0x00000040
    #define XEMACPS_NWCFG_BCASTDI_MASK   0x00000020
    #define XEMACPS_NWCFG_COPYALLEN_MASK   0x00000010
    #define XEMACPS_NWCFG_JUMBO_MASK   0x00000008
    #define XEMACPS_NWCFG_NVLANDISC_MASK   0x00000004
    #define XEMACPS_NWCFG_FDEN_MASK   0x00000002
    #define XEMACPS_NWCFG_100_MASK   0x00000001
    #define XEMACPS_NWCFG_RESET_MASK   0x00080000
    network status register bit definitaions

    -

    #define XEMACPS_NWSR_MDIOIDLE_MASK   0x00000004
    #define XEMACPS_NWSR_MDIO_MASK   0x00000002
    MAC address register word 1 mask

    -

    #define XEMACPS_LADDR_MACH_MASK   0x0000FFFF
    DMA control register bit definitions

    -

    #define XEMACPS_DMACR_RXBUF_MASK   0x00FF0000
    #define XEMACPS_DMACR_RXBUF_SHIFT   16
    #define XEMACPS_DMACR_TCPCKSUM_MASK   0x00000800
    #define XEMACPS_DMACR_TXSIZE_MASK   0x00000400
    #define XEMACPS_DMACR_RXSIZE_MASK   0x00000300
    #define XEMACPS_DMACR_ENDIAN_MASK   0x00000080
    #define XEMACPS_DMACR_BLENGTH_MASK   0x0000001F
    #define XEMACPS_DMACR_SINGLE_AHB_BURST   0x00000001
    #define XEMACPS_DMACR_INCR4_AHB_BURST   0x00000004
    #define XEMACPS_DMACR_INCR8_AHB_BURST   0x00000008
    #define XEMACPS_DMACR_INCR16_AHB_BURST   0x00000010
    transmit status register bit definitions

    -

    #define XEMACPS_TXSR_HRESPNOK_MASK   0x00000100
    #define XEMACPS_TXSR_URUN_MASK   0x00000040
    #define XEMACPS_TXSR_TXCOMPL_MASK   0x00000020
    #define XEMACPS_TXSR_BUFEXH_MASK   0x00000010
    #define XEMACPS_TXSR_TXGO_MASK   0x00000008
    #define XEMACPS_TXSR_RXOVR_MASK   0x00000004
    #define XEMACPS_TXSR_FRAMERX_MASK   0x00000002
    #define XEMACPS_TXSR_USEDREAD_MASK   0x00000001
    #define XEMACPS_TXSR_ERROR_MASK
    receive status register bit definitions

    -

    #define XEMACPS_RXSR_HRESPNOK_MASK   0x00000008
    #define XEMACPS_RXSR_RXOVR_MASK   0x00000004
    #define XEMACPS_RXSR_FRAMERX_MASK   0x00000002
    #define XEMACPS_RXSR_BUFFNA_MASK   0x00000001
    #define XEMACPS_RXSR_ERROR_MASK
    interrupts bit definitions

    Bits definitions are same in XEMACPS_ISR_OFFSET, XEMACPS_IER_OFFSET, XEMACPS_IDR_OFFSET, and XEMACPS_IMR_OFFSET

    -

    #define XEMACPS_IXR_PTPPSTX_MASK   0x02000000
    #define XEMACPS_IXR_PTPPDRTX_MASK   0x01000000
    #define XEMACPS_IXR_PTPSTX_MASK   0x00800000
    #define XEMACPS_IXR_PTPDRTX_MASK   0x00400000
    #define XEMACPS_IXR_PTPPSRX_MASK   0x00200000
    #define XEMACPS_IXR_PTPPDRRX_MASK   0x00100000
    #define XEMACPS_IXR_PTPSRX_MASK   0x00080000
    #define XEMACPS_IXR_PTPDRRX_MASK   0x00040000
    #define XEMACPS_IXR_PAUSETX_MASK   0x00004000
    #define XEMACPS_IXR_PAUSEZERO_MASK   0x00002000
    #define XEMACPS_IXR_PAUSENZERO_MASK   0x00001000
    #define XEMACPS_IXR_HRESPNOK_MASK   0x00000800
    #define XEMACPS_IXR_RXOVR_MASK   0x00000400
    #define XEMACPS_IXR_TXCOMPL_MASK   0x00000080
    #define XEMACPS_IXR_TXEXH_MASK   0x00000040
    #define XEMACPS_IXR_RETRY_MASK   0x00000020
    #define XEMACPS_IXR_URUN_MASK   0x00000010
    #define XEMACPS_IXR_TXUSED_MASK   0x00000008
    #define XEMACPS_IXR_RXUSED_MASK   0x00000004
    #define XEMACPS_IXR_FRAMERX_MASK   0x00000002
    #define XEMACPS_IXR_MGMNT_MASK   0x00000001
    #define XEMACPS_IXR_ALL_MASK   0x00007FFF
    #define XEMACPS_IXR_TX_ERR_MASK
    #define XEMACPS_IXR_RX_ERR_MASK
    PHY Maintenance bit definitions

    -

    #define XEMACPS_PHYMNTNC_OP_MASK   0x40020000
    #define XEMACPS_PHYMNTNC_OP_R_MASK   0x20000000
    #define XEMACPS_PHYMNTNC_OP_W_MASK   0x10000000
    #define XEMACPS_PHYMNTNC_ADDR_MASK   0x0F800000
    #define XEMACPS_PHYMNTNC_REG_MASK   0x007C0000
    #define XEMACPS_PHYMNTNC_DATA_MASK   0x00000FFF
    #define XEMACPS_PHYMNTNC_PHYAD_SHIFT_MASK   23
    #define XEMACPS_PHYMNTNC_PHREG_SHIFT_MASK   18

    Enumerations

    MDC clock division

    currently supporting 8, 16, 32, 48, 64, 96, 128, 224.

    -

    enum  XEmacPs_MdcDiv {
    -  MDC_DIV_8 = 0, -MDC_DIV_16, -MDC_DIV_32, -MDC_DIV_48, -
    -  MDC_DIV_64, -MDC_DIV_96, -MDC_DIV_128, -MDC_DIV_224 -
    - }

    Functions

    void XEmacPs_ResetHw (u32 BaseAddr)
    -

    Detailed Description

    -

    This header file contains identifiers and low-level driver functions (or macros) that can be used to access the PS Ethernet MAC (XEmacPs) device. High-level driver functions are defined in xemacps.h.

    -
    Note:
    + +
    +
    +
    +
    +

    xemacps_hw.h File Reference

    Detailed Description

    +This header file contains identifiers and low-level driver functions (or macros) that can be used to access the PS Ethernet MAC (XEmacPs) device. High-level driver functions are defined in xemacps.h.

    +

    Note:
    - MODIFICATION HISTORY:
     Ver   Who  Date     Changes
+ MODIFICATION HISTORY:

    +

     Ver   Who  Date     Changes
  ----- ---- -------- -------------------------------------------------------
  1.00a wsy  01/10/10 First release.
  1.02a asa  11/05/12 Added hash defines for DMACR burst length configuration.
  1.05a kpc  28/06/13 Added XEmacPs_ResetHw function prototype
  1.06a asa  11/02/13 Changed the value for XEMACPS_RXBUF_LEN_MASK from 0x3fff
 					  to 0x1fff. This fixes the CR#744902.
-

    Define Documentation

    - -
    -
    - - - - -
    #define XEMACPS_1588_ADJ_OFFSET   0x000001D8
    -
    -
    -

    1588 nanosecond adjustment counter

    + +

    +#include "xil_types.h"
    +#include "xil_assert.h"
    +#include "xil_io.h"
    + + + + + - - - -
    -
    -

    Direction identifiers

    These are used by several functions and callbacks that need to specify whether an operation specifies a send or receive channel.

    #define XEMACPS_SEND   1
    - - - -
    #define XEMACPS_1588_INC_OFFSET   0x000001DC
    -

    -
    -

    1588 nanosecond increment counter

    +#define XEMACPS_RECV   2 -
    -
    - -
    -
    - - - - -
    #define XEMACPS_1588_NANOSEC_OFFSET   0x000001D4
    -
    -
    -

    1588 nanosecond counter

    +

    network control register bit definitions

    +#define XEMACPS_NWCTRL_FLUSH_DPRAM_MASK   0x00040000 -
    -
    - -
    -
    - - - - -
    #define XEMACPS_1588_SEC_OFFSET   0x000001D0
    -
    -
    -

    1588 second counter

    +#define XEMACPS_NWCTRL_ZEROPAUSETX_MASK   0x00000800 -
    -
    - -
    -
    - - - - -
    #define XEMACPS_BD_ADDR_OFFSET   0x00000000
    -
    -
    -

    word 0/addr of BDs

    +#define XEMACPS_NWCTRL_PAUSETX_MASK   0x00000800 -
    -
    - -
    -
    - - - - -
    #define XEMACPS_BD_ALIGNMENT   4
    -
    -
    -

    Minimum buffer descriptor alignment on the local bus

    +#define XEMACPS_NWCTRL_HALTTX_MASK   0x00000400 -
    -
    - -
    -
    - - - - -
    #define XEMACPS_BD_STAT_OFFSET   0x00000004
    -
    -
    -

    word 1/status of BDs

    +#define XEMACPS_NWCTRL_STARTTX_MASK   0x00000200 -
    -
    - -
    -
    - - - - -
    #define XEMACPS_DMACR_BLENGTH_MASK   0x0000001F
    -
    -
    -

    buffer burst length

    +#define XEMACPS_NWCTRL_STATWEN_MASK   0x00000080 -
    -
    - -
    -
    - - - - -
    #define XEMACPS_DMACR_ENDIAN_MASK   0x00000080
    -
    -
    -

    endian configuration

    +#define XEMACPS_NWCTRL_STATINC_MASK   0x00000040 -
    -
    - -
    -
    - - - - -
    #define XEMACPS_DMACR_INCR16_AHB_BURST   0x00000010
    -
    -
    -

    16 bytes AHB bursts

    +#define XEMACPS_NWCTRL_STATCLR_MASK   0x00000020 -
    -
    - -
    -
    - - - - -
    #define XEMACPS_DMACR_INCR4_AHB_BURST   0x00000004
    -
    -
    -

    4 bytes AHB bursts

    +#define XEMACPS_NWCTRL_MDEN_MASK   0x00000010 -
    -
    - -
    -
    - - - - -
    #define XEMACPS_DMACR_INCR8_AHB_BURST   0x00000008
    -
    -
    -

    8 bytes AHB bursts

    +#define XEMACPS_NWCTRL_TXEN_MASK   0x00000008 -
    -
    - -
    -
    - - - - -
    #define XEMACPS_DMACR_OFFSET   0x00000010
    -
    -
    -

    DMA Control reg

    +#define XEMACPS_NWCTRL_RXEN_MASK   0x00000004 -
    -
    - -
    -
    - - - - -
    #define XEMACPS_DMACR_RXBUF_MASK   0x00FF0000
    -
    -
    -

    Mask bit for RX buffer size

    +#define XEMACPS_NWCTRL_LOOPEN_MASK   0x00000002 -
    -
    - -
    -
    - - - - -
    #define XEMACPS_DMACR_RXBUF_SHIFT   16
    -
    -
    -

    Shift bit for RX buffer size

    +

    network configuration register bit definitions

    +#define XEMACPS_NWCFG_BADPREAMBEN_MASK   0x20000000 -
    -
    - -
    -
    - - - - -
    #define XEMACPS_DMACR_RXSIZE_MASK   0x00000300
    -
    -
    -

    RX buffer memory size

    +#define XEMACPS_NWCFG_IPDSTRETCH_MASK   0x10000000 -
    -
    - -
    -
    - - - - -
    #define XEMACPS_DMACR_SINGLE_AHB_BURST   0x00000001
    -
    -
    -

    single AHB bursts

    +#define XEMACPS_NWCFG_FCSIGNORE_MASK   0x04000000 -
    -
    - -
    -
    - - - - -
    #define XEMACPS_DMACR_TCPCKSUM_MASK   0x00000800
    -
    -
    -

    enable/disable TX checksum offload

    +#define XEMACPS_NWCFG_HDRXEN_MASK   0x02000000 -
    -
    - -
    -
    - - - - -
    #define XEMACPS_DMACR_TXSIZE_MASK   0x00000400
    -
    -
    -

    TX buffer memory size

    +#define XEMACPS_NWCFG_RXCHKSUMEN_MASK   0x01000000 -
    -
    - -
    -
    - - - - -
    #define XEMACPS_EXCESSCOLLCNT_OFFSET   0x00000140
    -
    -
    -

    Excessive Collision Frame Counter

    +#define XEMACPS_NWCFG_PAUSECOPYDI_MASK   0x00800000 -
    -
    - -
    -
    - - - - -
    #define XEMACPS_HASHH_OFFSET   0x00000084
    -
    -
    -

    Hash High address reg

    +#define XEMACPS_NWCFG_MDC_SHIFT_MASK   18 -
    -
    - -
    -
    - - - - -
    #define XEMACPS_HASHL_OFFSET   0x00000080
    -
    -
    -

    Hash Low address reg

    +#define XEMACPS_NWCFG_MDCCLKDIV_MASK   0x001C0000 -
    -
    - +#define XEMACPS_NWCFG_FCSREM_MASK   0x00020000 + +#define XEMACPS_NWCFG_LENGTHERRDSCRD_MASK   0x00010000 + +#define XEMACPS_NWCFG_RXOFFS_MASK   0x0000C000 + +#define XEMACPS_NWCFG_PAUSEEN_MASK   0x00002000 + +#define XEMACPS_NWCFG_RETRYTESTEN_MASK   0x00001000 + +#define XEMACPS_NWCFG_EXTADDRMATCHEN_MASK   0x00000200 + +#define XEMACPS_NWCFG_1000_MASK   0x00000400 + +#define XEMACPS_NWCFG_1536RXEN_MASK   0x00000100 + +#define XEMACPS_NWCFG_UCASTHASHEN_MASK   0x00000080 + +#define XEMACPS_NWCFG_MCASTHASHEN_MASK   0x00000040 + +#define XEMACPS_NWCFG_BCASTDI_MASK   0x00000020 + +#define XEMACPS_NWCFG_COPYALLEN_MASK   0x00000010 + +#define XEMACPS_NWCFG_JUMBO_MASK   0x00000008 + +#define XEMACPS_NWCFG_NVLANDISC_MASK   0x00000004 + +#define XEMACPS_NWCFG_FDEN_MASK   0x00000002 + +#define XEMACPS_NWCFG_100_MASK   0x00000001 + +#define XEMACPS_NWCFG_RESET_MASK   0x00080000 + +

    network status register bit definitaions

    +#define XEMACPS_NWSR_MDIOIDLE_MASK   0x00000004 + +#define XEMACPS_NWSR_MDIO_MASK   0x00000002 + +

    MAC address register word 1 mask

    +#define XEMACPS_LADDR_MACH_MASK   0x0000FFFF + +

    DMA control register bit definitions

    +#define XEMACPS_DMACR_RXBUF_MASK   0x00FF0000 + +#define XEMACPS_DMACR_RXBUF_SHIFT   16 + +#define XEMACPS_DMACR_TCPCKSUM_MASK   0x00000800 + +#define XEMACPS_DMACR_TXSIZE_MASK   0x00000400 + +#define XEMACPS_DMACR_RXSIZE_MASK   0x00000300 + +#define XEMACPS_DMACR_ENDIAN_MASK   0x00000080 + +#define XEMACPS_DMACR_BLENGTH_MASK   0x0000001F + +#define XEMACPS_DMACR_SINGLE_AHB_BURST   0x00000001 + +#define XEMACPS_DMACR_INCR4_AHB_BURST   0x00000004 + +#define XEMACPS_DMACR_INCR8_AHB_BURST   0x00000008 + +#define XEMACPS_DMACR_INCR16_AHB_BURST   0x00000010 + +

    transmit status register bit definitions

    +#define XEMACPS_TXSR_HRESPNOK_MASK   0x00000100 + +#define XEMACPS_TXSR_URUN_MASK   0x00000040 + +#define XEMACPS_TXSR_TXCOMPL_MASK   0x00000020 + +#define XEMACPS_TXSR_BUFEXH_MASK   0x00000010 + +#define XEMACPS_TXSR_TXGO_MASK   0x00000008 + +#define XEMACPS_TXSR_RXOVR_MASK   0x00000004 + +#define XEMACPS_TXSR_FRAMERX_MASK   0x00000002 + +#define XEMACPS_TXSR_USEDREAD_MASK   0x00000001 + +#define XEMACPS_TXSR_ERROR_MASK + +

    receive status register bit definitions

    +#define XEMACPS_RXSR_HRESPNOK_MASK   0x00000008 + +#define XEMACPS_RXSR_RXOVR_MASK   0x00000004 + +#define XEMACPS_RXSR_FRAMERX_MASK   0x00000002 + +#define XEMACPS_RXSR_BUFFNA_MASK   0x00000001 + +#define XEMACPS_RXSR_ERROR_MASK + +

    interrupts bit definitions

    +Bits definitions are same in XEMACPS_ISR_OFFSET, XEMACPS_IER_OFFSET, XEMACPS_IDR_OFFSET, and XEMACPS_IMR_OFFSET

    +#define XEMACPS_IXR_PTPPSTX_MASK   0x02000000 + +#define XEMACPS_IXR_PTPPDRTX_MASK   0x01000000 + +#define XEMACPS_IXR_PTPSTX_MASK   0x00800000 + +#define XEMACPS_IXR_PTPDRTX_MASK   0x00400000 + +#define XEMACPS_IXR_PTPPSRX_MASK   0x00200000 + +#define XEMACPS_IXR_PTPPDRRX_MASK   0x00100000 + +#define XEMACPS_IXR_PTPSRX_MASK   0x00080000 + +#define XEMACPS_IXR_PTPDRRX_MASK   0x00040000 + +#define XEMACPS_IXR_PAUSETX_MASK   0x00004000 + +#define XEMACPS_IXR_PAUSEZERO_MASK   0x00002000 + +#define XEMACPS_IXR_PAUSENZERO_MASK   0x00001000 + +#define XEMACPS_IXR_HRESPNOK_MASK   0x00000800 + +#define XEMACPS_IXR_RXOVR_MASK   0x00000400 + +#define XEMACPS_IXR_TXCOMPL_MASK   0x00000080 + +#define XEMACPS_IXR_TXEXH_MASK   0x00000040 + +#define XEMACPS_IXR_RETRY_MASK   0x00000020 + +#define XEMACPS_IXR_URUN_MASK   0x00000010 + +#define XEMACPS_IXR_TXUSED_MASK   0x00000008 + +#define XEMACPS_IXR_RXUSED_MASK   0x00000004 + +#define XEMACPS_IXR_FRAMERX_MASK   0x00000002 + +#define XEMACPS_IXR_MGMNT_MASK   0x00000001 + +#define XEMACPS_IXR_ALL_MASK   0x00007FFF + +#define XEMACPS_IXR_TX_ERR_MASK + +#define XEMACPS_IXR_RX_ERR_MASK + +

    PHY Maintenance bit definitions

    +#define XEMACPS_PHYMNTNC_OP_MASK   0x40020000 + +#define XEMACPS_PHYMNTNC_OP_R_MASK   0x20000000 + +#define XEMACPS_PHYMNTNC_OP_W_MASK   0x10000000 + +#define XEMACPS_PHYMNTNC_ADDR_MASK   0x0F800000 + +#define XEMACPS_PHYMNTNC_REG_MASK   0x007C0000 + +#define XEMACPS_PHYMNTNC_DATA_MASK   0x00000FFF + +#define XEMACPS_PHYMNTNC_PHYAD_SHIFT_MASK   23 + +#define XEMACPS_PHYMNTNC_PHREG_SHIFT_MASK   18 + +

    MDC clock division

    +currently supporting 8, 16, 32, 48, 64, 96, 128, 224.

    +enum  XEmacPs_MdcDiv {
    +  MDC_DIV_8 = 0, +MDC_DIV_16, +MDC_DIV_32, +MDC_DIV_48, +
    +  MDC_DIV_64, +MDC_DIV_96, +MDC_DIV_128, +MDC_DIV_224 +
    + } + +

    Defines

    +#define XEMACPS_HW_H + +#define XEMACPS_MAX_MAC_ADDR   4 + +#define XEMACPS_MAX_TYPE_ID   4 + +#define XEMACPS_BD_ALIGNMENT   4 + +#define XEMACPS_RX_BUF_ALIGNMENT   4 + +#define XEMACPS_RX_BUF_SIZE   1536 + +#define XEMACPS_RX_BUF_UNIT   64 + +#define XEMACPS_MAX_RXBD   128 + +#define XEMACPS_MAX_TXBD   128 + +#define XEMACPS_MAX_HASH_BITS   64 + +#define XEMACPS_NWCTRL_OFFSET   0x00000000 + +#define XEMACPS_NWCFG_OFFSET   0x00000004 + +#define XEMACPS_NWSR_OFFSET   0x00000008 + +#define XEMACPS_DMACR_OFFSET   0x00000010 + +#define XEMACPS_TXSR_OFFSET   0x00000014 + +#define XEMACPS_RXQBASE_OFFSET   0x00000018 + +#define XEMACPS_TXQBASE_OFFSET   0x0000001C + +#define XEMACPS_RXSR_OFFSET   0x00000020 + +#define XEMACPS_ISR_OFFSET   0x00000024 + +#define XEMACPS_IER_OFFSET   0x00000028 + +#define XEMACPS_IDR_OFFSET   0x0000002C + +#define XEMACPS_IMR_OFFSET   0x00000030 + +#define XEMACPS_PHYMNTNC_OFFSET   0x00000034 + +#define XEMACPS_RXPAUSE_OFFSET   0x00000038 + +#define XEMACPS_TXPAUSE_OFFSET   0x0000003C + +#define XEMACPS_HASHL_OFFSET   0x00000080 + +#define XEMACPS_HASHH_OFFSET   0x00000084 + +#define XEMACPS_LADDR1L_OFFSET   0x00000088 + +#define XEMACPS_LADDR1H_OFFSET   0x0000008C + +#define XEMACPS_LADDR2L_OFFSET   0x00000090 + +#define XEMACPS_LADDR2H_OFFSET   0x00000094 + +#define XEMACPS_LADDR3L_OFFSET   0x00000098 + +#define XEMACPS_LADDR3H_OFFSET   0x0000009C + +#define XEMACPS_LADDR4L_OFFSET   0x000000A0 + +#define XEMACPS_LADDR4H_OFFSET   0x000000A4 + +#define XEMACPS_MATCH1_OFFSET   0x000000A8 + +#define XEMACPS_MATCH2_OFFSET   0x000000AC + +#define XEMACPS_MATCH3_OFFSET   0x000000B0 + +#define XEMACPS_MATCH4_OFFSET   0x000000B4 + +#define XEMACPS_STRETCH_OFFSET   0x000000BC + +#define XEMACPS_OCTTXL_OFFSET   0x00000100 + +#define XEMACPS_OCTTXH_OFFSET   0x00000104 + +#define XEMACPS_TXCNT_OFFSET   0x00000108 + +#define XEMACPS_TXBCCNT_OFFSET   0x0000010C + +#define XEMACPS_TXMCCNT_OFFSET   0x00000110 + +#define XEMACPS_TXPAUSECNT_OFFSET   0x00000114 + +#define XEMACPS_TX64CNT_OFFSET   0x00000118 + +#define XEMACPS_TX65CNT_OFFSET   0x0000011C + +#define XEMACPS_TX128CNT_OFFSET   0x00000120 + +#define XEMACPS_TX256CNT_OFFSET   0x00000124 + +#define XEMACPS_TX512CNT_OFFSET   0x00000128 + +#define XEMACPS_TX1024CNT_OFFSET   0x0000012C + +#define XEMACPS_TX1519CNT_OFFSET   0x00000130 + +#define XEMACPS_TXURUNCNT_OFFSET   0x00000134 + +#define XEMACPS_SNGLCOLLCNT_OFFSET   0x00000138 + +#define XEMACPS_MULTICOLLCNT_OFFSET   0x0000013C + +#define XEMACPS_EXCESSCOLLCNT_OFFSET   0x00000140 + +#define XEMACPS_LATECOLLCNT_OFFSET   0x00000144 + +#define XEMACPS_TXDEFERCNT_OFFSET   0x00000148 + +#define XEMACPS_TXCSENSECNT_OFFSET   0x0000014C + +#define XEMACPS_OCTRXL_OFFSET   0x00000150 + +#define XEMACPS_OCTRXH_OFFSET   0x00000154 + +#define XEMACPS_RXCNT_OFFSET   0x00000158 + +#define XEMACPS_RXBROADCNT_OFFSET   0x0000015C + +#define XEMACPS_RXMULTICNT_OFFSET   0x00000160 + +#define XEMACPS_RXPAUSECNT_OFFSET   0x00000164 + +#define XEMACPS_RX64CNT_OFFSET   0x00000168 + +#define XEMACPS_RX65CNT_OFFSET   0x0000016C + +#define XEMACPS_RX128CNT_OFFSET   0x00000170 + +#define XEMACPS_RX256CNT_OFFSET   0x00000174 + +#define XEMACPS_RX512CNT_OFFSET   0x00000178 + +#define XEMACPS_RX1024CNT_OFFSET   0x0000017C + +#define XEMACPS_RX1519CNT_OFFSET   0x00000180 + +#define XEMACPS_RXUNDRCNT_OFFSET   0x00000184 + +#define XEMACPS_RXOVRCNT_OFFSET   0x00000188 + +#define XEMACPS_RXJABCNT_OFFSET   0x0000018C + +#define XEMACPS_RXFCSCNT_OFFSET   0x00000190 + +#define XEMACPS_RXLENGTHCNT_OFFSET   0x00000194 + +#define XEMACPS_RXSYMBCNT_OFFSET   0x00000198 + +#define XEMACPS_RXALIGNCNT_OFFSET   0x0000019C + +#define XEMACPS_RXRESERRCNT_OFFSET   0x000001A0 + +#define XEMACPS_RXORCNT_OFFSET   0x000001A4 + +#define XEMACPS_RXIPCCNT_OFFSET   0x000001A8 + +#define XEMACPS_RXTCPCCNT_OFFSET   0x000001AC + +#define XEMACPS_RXUDPCCNT_OFFSET   0x000001B0 + +#define XEMACPS_LAST_OFFSET   0x000001B4 + +#define XEMACPS_1588_SEC_OFFSET   0x000001D0 + +#define XEMACPS_1588_NANOSEC_OFFSET   0x000001D4 + +#define XEMACPS_1588_ADJ_OFFSET   0x000001D8 + +#define XEMACPS_1588_INC_OFFSET   0x000001DC + +#define XEMACPS_PTP_TXSEC_OFFSET   0x000001E0 + +#define XEMACPS_PTP_TXNANOSEC_OFFSET   0x000001E4 + +#define XEMACPS_PTP_RXSEC_OFFSET   0x000001E8 + +#define XEMACPS_PTP_RXNANOSEC_OFFSET   0x000001EC + +#define XEMACPS_PTPP_TXSEC_OFFSET   0x000001F0 + +#define XEMACPS_PTPP_TXNANOSEC_OFFSET   0x000001F4 + +#define XEMACPS_PTPP_RXSEC_OFFSET   0x000001F8 + +#define XEMACPS_PTPP_RXNANOSEC_OFFSET   0x000001FC + +#define XEMACPS_BD_ADDR_OFFSET   0x00000000 + +#define XEMACPS_BD_STAT_OFFSET   0x00000004 + +#define XEMACPS_TXBUF_USED_MASK   0x80000000 + +#define XEMACPS_TXBUF_WRAP_MASK   0x40000000 + +#define XEMACPS_TXBUF_RETRY_MASK   0x20000000 + +#define XEMACPS_TXBUF_URUN_MASK   0x10000000 + +#define XEMACPS_TXBUF_EXH_MASK   0x08000000 + +#define XEMACPS_TXBUF_TCP_MASK   0x04000000 + +#define XEMACPS_TXBUF_NOCRC_MASK   0x00010000 + +#define XEMACPS_TXBUF_LAST_MASK   0x00008000 + +#define XEMACPS_TXBUF_LEN_MASK   0x00003FFF + +#define XEMACPS_RXBUF_BCAST_MASK   0x80000000 + +#define XEMACPS_RXBUF_MULTIHASH_MASK   0x40000000 + +#define XEMACPS_RXBUF_UNIHASH_MASK   0x20000000 + +#define XEMACPS_RXBUF_EXH_MASK   0x08000000 + +#define XEMACPS_RXBUF_AMATCH_MASK   0x06000000 + +#define XEMACPS_RXBUF_IDFOUND_MASK   0x01000000 + +#define XEMACPS_RXBUF_IDMATCH_MASK   0x00C00000 + +#define XEMACPS_RXBUF_VLAN_MASK   0x00200000 + +#define XEMACPS_RXBUF_PRI_MASK   0x00100000 + +#define XEMACPS_RXBUF_VPRI_MASK   0x000E0000 + +#define XEMACPS_RXBUF_CFI_MASK   0x00010000 + +#define XEMACPS_RXBUF_EOF_MASK   0x00008000 + +#define XEMACPS_RXBUF_SOF_MASK   0x00004000 + +#define XEMACPS_RXBUF_LEN_MASK   0x00001FFF + +#define XEMACPS_RXBUF_WRAP_MASK   0x00000002 + +#define XEMACPS_RXBUF_NEW_MASK   0x00000001 + +#define XEMACPS_RXBUF_ADD_MASK   0xFFFFFFFC + +#define XEmacPs_In32   Xil_In32 + +#define XEmacPs_Out32   Xil_Out32 + +#define XEmacPs_ReadReg(BaseAddress, RegOffset)   XEmacPs_In32((BaseAddress) + (RegOffset)) + +#define XEmacPs_WriteReg(BaseAddress, RegOffset, Data)   XEmacPs_Out32((BaseAddress) + (RegOffset), (Data)) + +

    Functions

    +void XEmacPs_ResetHw (u32 BaseAddr) + + +

    Define Documentation

    +
    - +
    #define XEMACPS_HW_H#define XEMACPS_1588_ADJ_OFFSET   0x000001D8
    +

    +1588 nanosecond adjustment counter

    -
    - +

    +

    - - -
    #define XEMACPS_IDR_OFFSET   0x0000002C
    -
    -
    -

    Interrupt Disable reg

    - -
    -
    - -
    -
    - - - - -
    #define XEMACPS_IER_OFFSET   0x00000028
    -
    -
    -

    Interrupt Enable reg

    - -
    -
    - -
    -
    - - - - -
    #define XEMACPS_IMR_OFFSET   0x00000030
    -
    -
    -

    Interrupt Mask reg

    - -
    -
    - -
    -
    - - - +
    #define XEmacPs_In32   Xil_In32#define XEMACPS_1588_INC_OFFSET   0x000001DC
    +

    +1588 nanosecond increment counter

    -
    - +

    +

    - +
    #define XEMACPS_ISR_OFFSET   0x00000024#define XEMACPS_1588_NANOSEC_OFFSET   0x000001D4
    -

    Interrupt Status reg

    + +

    +1588 nanosecond counter +

    +

    + +

    +
    + + + + +
    #define XEMACPS_1588_SEC_OFFSET   0x000001D0
    +
    +
    + +

    +1588 second counter +

    +

    + +

    +
    + + + + +
    #define XEMACPS_BD_ADDR_OFFSET   0x00000000
    +
    +
    + +

    +word 0/addr of BDs +

    +

    + +

    +
    + + + + +
    #define XEMACPS_BD_ALIGNMENT   4
    +
    +
    + +

    +Minimum buffer descriptor alignment on the local bus +

    +

    + +

    +
    + + + + +
    #define XEMACPS_BD_STAT_OFFSET   0x00000004
    +
    +
    + +

    +word 1/status of BDs +

    +

    + +

    +
    + + + + +
    #define XEMACPS_DMACR_BLENGTH_MASK   0x0000001F
    +
    +
    + +

    +buffer burst length +

    +

    + +

    +
    + + + + +
    #define XEMACPS_DMACR_ENDIAN_MASK   0x00000080
    +
    +
    + +

    +endian configuration +

    +

    + +

    +
    + + + + +
    #define XEMACPS_DMACR_INCR16_AHB_BURST   0x00000010
    +
    +
    + +

    +16 bytes AHB bursts +

    +

    + +

    +
    + + + + +
    #define XEMACPS_DMACR_INCR4_AHB_BURST   0x00000004
    +
    +
    + +

    +4 bytes AHB bursts +

    +

    + +

    +
    + + + + +
    #define XEMACPS_DMACR_INCR8_AHB_BURST   0x00000008
    +
    +
    + +

    +8 bytes AHB bursts +

    +

    + +

    +
    + + + + +
    #define XEMACPS_DMACR_OFFSET   0x00000010
    +
    +
    + +

    +DMA Control reg +

    +

    + +

    +
    + + + + +
    #define XEMACPS_DMACR_RXBUF_MASK   0x00FF0000
    +
    +
    + +

    +Mask bit for RX buffer size +

    +

    + +

    +
    + + + + +
    #define XEMACPS_DMACR_RXBUF_SHIFT   16
    +
    +
    + +

    +Shift bit for RX buffer size +

    +

    + +

    +
    + + + + +
    #define XEMACPS_DMACR_RXSIZE_MASK   0x00000300
    +
    +
    + +

    +RX buffer memory size +

    +

    + +

    +
    + + + + +
    #define XEMACPS_DMACR_SINGLE_AHB_BURST   0x00000001
    +
    +
    + +

    +single AHB bursts +

    +

    + +

    +
    + + + + +
    #define XEMACPS_DMACR_TCPCKSUM_MASK   0x00000800
    +
    +
    + +

    +enable/disable TX checksum offload +

    +

    + +

    +
    + + + + +
    #define XEMACPS_DMACR_TXSIZE_MASK   0x00000400
    +
    +
    + +

    +TX buffer memory size +

    +

    + +

    +
    + + + + +
    #define XEMACPS_EXCESSCOLLCNT_OFFSET   0x00000140
    +
    +
    + +

    +Excessive Collision Frame Counter +

    +

    + +

    +
    + + + + +
    #define XEMACPS_HASHH_OFFSET   0x00000084
    +
    +
    + +

    +Hash High address reg +

    +

    + +

    +
    + + + + +
    #define XEMACPS_HASHL_OFFSET   0x00000080
    +
    +
    + +

    +Hash Low address reg +

    +

    + +

    +
    + + + + +
    #define XEMACPS_HW_H
    +
    +
    + +

    -
    - +

    +

    - +
    #define XEMACPS_IXR_ALL_MASK   0x00007FFF#define XEMACPS_IDR_OFFSET   0x0000002C
    -

    Everything!

    + +

    +Interrupt Disable reg +

    +

    + +

    +
    + + + + +
    #define XEMACPS_IER_OFFSET   0x00000028
    +
    +
    + +

    +Interrupt Enable reg +

    +

    + +

    +
    + + + + +
    #define XEMACPS_IMR_OFFSET   0x00000030
    +
    +
    + +

    +Interrupt Mask reg +

    +

    + +

    +
    + + + + +
    #define XEmacPs_In32   Xil_In32
    +
    +
    + +

    -
    - +

    +

    - +
    #define XEMACPS_IXR_FRAMERX_MASK   0x00000002#define XEMACPS_ISR_OFFSET   0x00000024
    -

    Frame received ok

    +

    +Interrupt Status reg

    -
    - +

    +

    - +
    #define XEMACPS_IXR_HRESPNOK_MASK   0x00000800#define XEMACPS_IXR_ALL_MASK   0x00007FFF
    -

    hresp not ok

    +

    +Everything!

    -
    - +

    +

    - +
    #define XEMACPS_IXR_MGMNT_MASK   0x00000001#define XEMACPS_IXR_FRAMERX_MASK   0x00000002
    -

    PHY management complete

    +

    +Frame received ok

    -
    - +

    +

    - +
    #define XEMACPS_IXR_PAUSENZERO_MASK   0x00001000#define XEMACPS_IXR_HRESPNOK_MASK   0x00000800
    -

    Pause frame received

    +

    +hresp not ok

    -
    - +

    +

    - +
    #define XEMACPS_IXR_PAUSETX_MASK   0x00004000#define XEMACPS_IXR_MGMNT_MASK   0x00000001
    -

    Pause frame transmitted

    +

    +PHY management complete

    -
    - +

    +

    - +
    #define XEMACPS_IXR_PAUSEZERO_MASK   0x00002000#define XEMACPS_IXR_PAUSENZERO_MASK   0x00001000
    -

    Pause time has reached zero

    +

    +Pause frame received

    -
    - +

    +

    - +
    #define XEMACPS_IXR_PTPDRRX_MASK   0x00040000#define XEMACPS_IXR_PAUSETX_MASK   0x00004000
    -

    PTP Delay_req received

    +

    +Pause frame transmitted

    -
    - +

    +

    - +
    #define XEMACPS_IXR_PTPDRTX_MASK   0x00400000#define XEMACPS_IXR_PAUSEZERO_MASK   0x00002000
    -

    PTP Delay_req transmitted

    +

    +Pause time has reached zero

    -
    - +

    +

    - +
    #define XEMACPS_IXR_PTPPDRRX_MASK   0x00100000#define XEMACPS_IXR_PTPDRRX_MASK   0x00040000
    -

    PTP Pdelay_req received

    +

    +PTP Delay_req received

    -
    - +

    +

    - +
    #define XEMACPS_IXR_PTPPDRTX_MASK   0x01000000#define XEMACPS_IXR_PTPDRTX_MASK   0x00400000
    -

    PTP Pdelay_req transmitted

    +

    +PTP Delay_req transmitted

    -
    - +

    +

    - +
    #define XEMACPS_IXR_PTPPSRX_MASK   0x00200000#define XEMACPS_IXR_PTPPDRRX_MASK   0x00100000
    -

    PTP Psync received

    +

    +PTP Pdelay_req received

    -
    - +

    +

    - +
    #define XEMACPS_IXR_PTPPSTX_MASK   0x02000000#define XEMACPS_IXR_PTPPDRTX_MASK   0x01000000
    -

    PTP Psync transmitted

    +

    +PTP Pdelay_req transmitted

    -
    - +

    +

    - +
    #define XEMACPS_IXR_PTPSRX_MASK   0x00080000#define XEMACPS_IXR_PTPPSRX_MASK   0x00200000
    -

    PTP Sync received

    +

    +PTP Psync received

    -
    - +

    +

    - +
    #define XEMACPS_IXR_PTPSTX_MASK   0x00800000#define XEMACPS_IXR_PTPPSTX_MASK   0x02000000
    -

    PTP Sync transmitted

    +

    +PTP Psync transmitted

    -
    - +

    +

    - +
    #define XEMACPS_IXR_RETRY_MASK   0x00000020#define XEMACPS_IXR_PTPSRX_MASK   0x00080000
    -

    Retry limit exceeded

    +

    +PTP Sync received

    -
    - +

    +

    - +
    #define XEMACPS_IXR_RX_ERR_MASK#define XEMACPS_IXR_PTPSTX_MASK   0x00800000
    -Value:
    (XEMACPS_IXR_HRESPNOK_MASK |      \
-                                     XEMACPS_IXR_RXUSED_MASK |        \
-                                     XEMACPS_IXR_RXOVR_MASK)
+
+
    
+PTP Sync transmitted
+
    +

    + +

    +
    + + + + +
    #define XEMACPS_IXR_RETRY_MASK   0x00000020
    +
    +
    + +

    +Retry limit exceeded +

    +

    + +

    +
    + + + + +
    #define XEMACPS_IXR_RX_ERR_MASK
    +
    +
    + +

    +Value:

    (XEMACPS_IXR_HRESPNOK_MASK |      \
+                                     XEMACPS_IXR_RXUSED_MASK |        \
+                                     XEMACPS_IXR_RXOVR_MASK)
    -
    - +

    +

    - +
    #define XEMACPS_IXR_RXOVR_MASK   0x00000400#define XEMACPS_IXR_RXOVR_MASK   0x00000400
    -

    Receive overrun occurred

    +

    +Receive overrun occurred

    -
    - +

    +

    - +
    #define XEMACPS_IXR_RXUSED_MASK   0x00000004#define XEMACPS_IXR_RXUSED_MASK   0x00000004
    -

    Rx buffer used bit read

    +

    +Rx buffer used bit read

    -
    - +

    +

    - +
    #define XEMACPS_IXR_TX_ERR_MASK#define XEMACPS_IXR_TX_ERR_MASK
    -Value:
    (XEMACPS_IXR_TXEXH_MASK |         \
-                                     XEMACPS_IXR_RETRY_MASK |         \
-                                     XEMACPS_IXR_URUN_MASK  |         \
-                                     XEMACPS_IXR_TXUSED_MASK)
+
+
    
+Value:
    (XEMACPS_IXR_TXEXH_MASK |         \
+                                     XEMACPS_IXR_RETRY_MASK |         \
+                                     XEMACPS_IXR_URUN_MASK  |         \
+                                     XEMACPS_IXR_TXUSED_MASK)
    -
    - +

    +

    - +
    #define XEMACPS_IXR_TXCOMPL_MASK   0x00000080#define XEMACPS_IXR_TXCOMPL_MASK   0x00000080
    -

    Frame transmitted ok

    +

    +Frame transmitted ok

    -
    - +

    +

    - +
    #define XEMACPS_IXR_TXEXH_MASK   0x00000040#define XEMACPS_IXR_TXEXH_MASK   0x00000040
    -

    Transmit err occurred or no buffers

    +

    +Transmit err occurred or no buffers

    -
    - +

    +

    - +
    #define XEMACPS_IXR_TXUSED_MASK   0x00000008#define XEMACPS_IXR_TXUSED_MASK   0x00000008
    -

    Tx buffer used bit read

    +

    +Tx buffer used bit read

    -
    - +

    +

    - +
    #define XEMACPS_IXR_URUN_MASK   0x00000010#define XEMACPS_IXR_URUN_MASK   0x00000010
    -

    Transmit underrun

    +

    +Transmit underrun

    -
    - +

    +

    - +
    #define XEMACPS_LADDR1H_OFFSET   0x0000008C#define XEMACPS_LADDR1H_OFFSET   0x0000008C
    -

    Specific1 addr high reg

    +

    +Specific1 addr high reg

    -
    - +

    +

    - +
    #define XEMACPS_LADDR1L_OFFSET   0x00000088#define XEMACPS_LADDR1L_OFFSET   0x00000088
    -

    Specific1 addr low reg

    +

    +Specific1 addr low reg

    -
    - +

    +

    - +
    #define XEMACPS_LADDR2H_OFFSET   0x00000094#define XEMACPS_LADDR2H_OFFSET   0x00000094
    -

    Specific2 addr high reg

    +

    +Specific2 addr high reg

    -
    - +

    +

    - +
    #define XEMACPS_LADDR2L_OFFSET   0x00000090#define XEMACPS_LADDR2L_OFFSET   0x00000090
    -

    Specific2 addr low reg

    +

    +Specific2 addr low reg

    -
    - +

    +

    - +
    #define XEMACPS_LADDR3H_OFFSET   0x0000009C#define XEMACPS_LADDR3H_OFFSET   0x0000009C
    -

    Specific3 addr high reg

    +

    +Specific3 addr high reg

    -
    - +

    +

    - +
    #define XEMACPS_LADDR3L_OFFSET   0x00000098#define XEMACPS_LADDR3L_OFFSET   0x00000098
    -

    Specific3 addr low reg

    +

    +Specific3 addr low reg

    -
    - +

    +

    - +
    #define XEMACPS_LADDR4H_OFFSET   0x000000A4#define XEMACPS_LADDR4H_OFFSET   0x000000A4
    -

    Specific4 addr high reg

    +

    +Specific4 addr high reg

    -
    - +

    +

    - +
    #define XEMACPS_LADDR4L_OFFSET   0x000000A0#define XEMACPS_LADDR4L_OFFSET   0x000000A0
    -

    Specific4 addr low reg

    +

    +Specific4 addr low reg

    -
    - +

    +

    - +
    #define XEMACPS_LADDR_MACH_MASK   0x0000FFFF#define XEMACPS_LADDR_MACH_MASK   0x0000FFFF
    -

    Address bits[47:32] bit[31:0] are in BOTTOM

    +

    +Address bits[47:32] bit[31:0] are in BOTTOM

    -
    - +

    +

    - +
    #define XEMACPS_LAST_OFFSET   0x000001B4#define XEMACPS_LAST_OFFSET   0x000001B4
    -

    Last statistic counter offset, for clearing

    +

    +Last statistic counter offset, for clearing

    -
    - +

    +

    - +
    #define XEMACPS_LATECOLLCNT_OFFSET   0x00000144#define XEMACPS_LATECOLLCNT_OFFSET   0x00000144
    -

    Late Collision Frame Counter

    +

    +Late Collision Frame Counter

    -
    - +

    +

    - +
    #define XEMACPS_MATCH1_OFFSET   0x000000A8#define XEMACPS_MATCH1_OFFSET   0x000000A8
    -

    Type ID1 Match reg

    +

    +Type ID1 Match reg

    -
    - +

    +

    - +
    #define XEMACPS_MATCH2_OFFSET   0x000000AC#define XEMACPS_MATCH2_OFFSET   0x000000AC
    -

    Type ID2 Match reg

    +

    +Type ID2 Match reg

    -
    - +

    +

    - +
    #define XEMACPS_MATCH3_OFFSET   0x000000B0#define XEMACPS_MATCH3_OFFSET   0x000000B0
    -

    Type ID3 Match reg

    +

    +Type ID3 Match reg

    -
    - +

    +

    - +
    #define XEMACPS_MATCH4_OFFSET   0x000000B4#define XEMACPS_MATCH4_OFFSET   0x000000B4
    -

    Type ID4 Match reg

    +

    +Type ID4 Match reg

    -
    - +

    +

    - +
    #define XEMACPS_MAX_HASH_BITS   64#define XEMACPS_MAX_HASH_BITS   64
    -

    Maximum value for hash bits. 2**6

    +

    +Maximum value for hash bits. 2**6

    -
    - +

    +

    - +
    #define XEMACPS_MAX_MAC_ADDR   4#define XEMACPS_MAX_MAC_ADDR   4
    -

    Maxmum number of mac address supported

    +

    +Maxmum number of mac address supported

    -
    - +

    +

    - +
    #define XEMACPS_MAX_RXBD   128#define XEMACPS_MAX_RXBD   128
    -

    Size of RX buffer descriptor queues

    +

    +Size of RX buffer descriptor queues

    -
    - +

    +

    - +
    #define XEMACPS_MAX_TXBD   128#define XEMACPS_MAX_TXBD   128
    -

    Size of TX buffer descriptor queues

    +

    +Size of TX buffer descriptor queues

    -
    - +

    +

    - +
    #define XEMACPS_MAX_TYPE_ID   4#define XEMACPS_MAX_TYPE_ID   4
    -

    Maxmum number of type id supported

    +

    +Maxmum number of type id supported

    -
    - +

    +

    - +
    #define XEMACPS_MULTICOLLCNT_OFFSET   0x0000013C#define XEMACPS_MULTICOLLCNT_OFFSET   0x0000013C
    -

    Multiple Collision Frame Counter

    +

    +Multiple Collision Frame Counter

    -
    - +

    +

    - +
    #define XEMACPS_NWCFG_1000_MASK   0x00000400#define XEMACPS_NWCFG_1000_MASK   0x00000400
    -

    1000 Mbps

    +

    +1000 Mbps

    -
    - +

    +

    - +
    #define XEMACPS_NWCFG_100_MASK   0x00000001#define XEMACPS_NWCFG_100_MASK   0x00000001
    -

    100 Mbps

    +

    +100 Mbps

    -
    - +

    +

    - +
    #define XEMACPS_NWCFG_1536RXEN_MASK   0x00000100#define XEMACPS_NWCFG_1536RXEN_MASK   0x00000100
    -

    Enable 1536 byte frames reception

    +

    +Enable 1536 byte frames reception

    -
    - +

    +

    - +
    #define XEMACPS_NWCFG_BADPREAMBEN_MASK   0x20000000#define XEMACPS_NWCFG_BADPREAMBEN_MASK   0x20000000
    -

    disable rejection of non-standard preamble

    +

    +disable rejection of non-standard preamble

    -
    - +

    +

    - +
    #define XEMACPS_NWCFG_BCASTDI_MASK   0x00000020#define XEMACPS_NWCFG_BCASTDI_MASK   0x00000020
    -

    Do not receive broadcast frames

    +

    +Do not receive broadcast frames

    -
    - +

    +

    - +
    #define XEMACPS_NWCFG_COPYALLEN_MASK   0x00000010#define XEMACPS_NWCFG_COPYALLEN_MASK   0x00000010
    -

    Copy all frames

    +

    +Copy all frames

    -
    - +

    +

    - +
    #define XEMACPS_NWCFG_EXTADDRMATCHEN_MASK   0x00000200#define XEMACPS_NWCFG_EXTADDRMATCHEN_MASK   0x00000200
    -

    External address match enable

    +

    +External address match enable

    -
    - +

    +

    - +
    #define XEMACPS_NWCFG_FCSIGNORE_MASK   0x04000000#define XEMACPS_NWCFG_FCSIGNORE_MASK   0x04000000
    -

    disable rejection of FCS error

    +

    +disable rejection of FCS error

    -
    - +

    +

    - +
    #define XEMACPS_NWCFG_FCSREM_MASK   0x00020000#define XEMACPS_NWCFG_FCSREM_MASK   0x00020000
    -

    Discard FCS from received frames

    +

    +Discard FCS from received frames

    -
    - +

    +

    - +
    #define XEMACPS_NWCFG_FDEN_MASK   0x00000002#define XEMACPS_NWCFG_FDEN_MASK   0x00000002
    -

    full duplex

    +

    +full duplex

    -
    - +

    +

    - +
    #define XEMACPS_NWCFG_HDRXEN_MASK   0x02000000#define XEMACPS_NWCFG_HDRXEN_MASK   0x02000000
    -

    RX half duplex

    +

    +RX half duplex

    -
    - +

    +

    - +
    #define XEMACPS_NWCFG_IPDSTRETCH_MASK   0x10000000#define XEMACPS_NWCFG_IPDSTRETCH_MASK   0x10000000
    -

    enable transmit IPG

    +

    +enable transmit IPG

    -
    - +

    +

    - +
    #define XEMACPS_NWCFG_JUMBO_MASK   0x00000008#define XEMACPS_NWCFG_JUMBO_MASK   0x00000008
    -

    Jumbo frames

    +

    +Jumbo frames

    -
    - +

    +

    - +
    #define XEMACPS_NWCFG_LENGTHERRDSCRD_MASK   0x00010000#define XEMACPS_NWCFG_LENGTHERRDSCRD_MASK   0x00010000
    -

    RX length error discard

    +

    +RX length error discard

    -
    - +

    +

    - +
    #define XEMACPS_NWCFG_MCASTHASHEN_MASK   0x00000040#define XEMACPS_NWCFG_MCASTHASHEN_MASK   0x00000040
    -

    Receive multicast hash frames

    +

    +Receive multicast hash frames

    -
    - +

    +

    - +
    #define XEMACPS_NWCFG_MDC_SHIFT_MASK   18#define XEMACPS_NWCFG_MDC_SHIFT_MASK   18
    -

    shift bits for MDC

    +

    +shift bits for MDC

    -
    - +

    +

    - +
    #define XEMACPS_NWCFG_MDCCLKDIV_MASK   0x001C0000#define XEMACPS_NWCFG_MDCCLKDIV_MASK   0x001C0000
    -

    MDC Mask PCLK divisor

    +

    +MDC Mask PCLK divisor

    -
    - +

    +

    - +
    #define XEMACPS_NWCFG_NVLANDISC_MASK   0x00000004#define XEMACPS_NWCFG_NVLANDISC_MASK   0x00000004
    -

    Receive only VLAN frames

    +

    +Receive only VLAN frames

    -
    - +

    +

    - +
    #define XEMACPS_NWCFG_OFFSET   0x00000004#define XEMACPS_NWCFG_OFFSET   0x00000004
    -

    Network Config reg

    +

    +Network Config reg

    -
    - +

    +

    - +
    #define XEMACPS_NWCFG_PAUSECOPYDI_MASK   0x00800000#define XEMACPS_NWCFG_PAUSECOPYDI_MASK   0x00800000
    -

    Do not copy pause Frames to memory

    +

    +Do not copy pause Frames to memory

    -
    - +

    +

    - +
    #define XEMACPS_NWCFG_PAUSEEN_MASK   0x00002000#define XEMACPS_NWCFG_PAUSEEN_MASK   0x00002000
    -

    Enable pause RX

    +

    +Enable pause RX

    -
    - +

    +

    - +
    #define XEMACPS_NWCFG_RESET_MASK   0x00080000#define XEMACPS_NWCFG_RESET_MASK   0x00080000
    -

    reset value

    +

    +reset value

    -
    - +

    +

    - +
    #define XEMACPS_NWCFG_RETRYTESTEN_MASK   0x00001000#define XEMACPS_NWCFG_RETRYTESTEN_MASK   0x00001000
    -

    Retry test

    +

    +Retry test

    -
    - +

    +

    - +
    #define XEMACPS_NWCFG_RXCHKSUMEN_MASK   0x01000000#define XEMACPS_NWCFG_RXCHKSUMEN_MASK   0x01000000
    -

    enable RX checksum offload

    +

    +enable RX checksum offload

    -
    - +

    +

    - +
    #define XEMACPS_NWCFG_RXOFFS_MASK   0x0000C000#define XEMACPS_NWCFG_RXOFFS_MASK   0x0000C000
    -

    RX buffer offset

    +

    +RX buffer offset

    -
    - +

    +

    - +
    #define XEMACPS_NWCFG_UCASTHASHEN_MASK   0x00000080#define XEMACPS_NWCFG_UCASTHASHEN_MASK   0x00000080
    -

    Receive unicast hash frames

    +

    +Receive unicast hash frames

    -
    - +

    +

    - +
    #define XEMACPS_NWCTRL_FLUSH_DPRAM_MASK   0x00040000#define XEMACPS_NWCTRL_FLUSH_DPRAM_MASK   0x00040000
    -

    Flush a packet from Rx SRAM

    +

    +Flush a packet from Rx SRAM

    -
    - +

    +

    - +
    #define XEMACPS_NWCTRL_HALTTX_MASK   0x00000400#define XEMACPS_NWCTRL_HALTTX_MASK   0x00000400
    -

    Halt transmission after current frame

    +

    +Halt transmission after current frame

    -
    - +

    +

    - +
    #define XEMACPS_NWCTRL_LOOPEN_MASK   0x00000002#define XEMACPS_NWCTRL_LOOPEN_MASK   0x00000002
    -

    local loopback

    +

    +local loopback

    -
    - +

    +

    - +
    #define XEMACPS_NWCTRL_MDEN_MASK   0x00000010#define XEMACPS_NWCTRL_MDEN_MASK   0x00000010
    -

    Enable MDIO port

    +

    +Enable MDIO port

    -
    - +

    +

    - +
    #define XEMACPS_NWCTRL_OFFSET   0x00000000#define XEMACPS_NWCTRL_OFFSET   0x00000000
    -

    Network Control reg

    +

    +Network Control reg

    -
    - +

    +

    - +
    #define XEMACPS_NWCTRL_PAUSETX_MASK   0x00000800#define XEMACPS_NWCTRL_PAUSETX_MASK   0x00000800
    -

    Transmit pause frame

    +

    +Transmit pause frame

    -
    - +

    +

    - +
    #define XEMACPS_NWCTRL_RXEN_MASK   0x00000004#define XEMACPS_NWCTRL_RXEN_MASK   0x00000004
    -

    Enable receive

    +

    +Enable receive

    -
    - +

    +

    - +
    #define XEMACPS_NWCTRL_STARTTX_MASK   0x00000200#define XEMACPS_NWCTRL_STARTTX_MASK   0x00000200
    -

    Start tx (tx_go)

    +

    +Start tx (tx_go)

    -
    - +

    +

    - +
    #define XEMACPS_NWCTRL_STATCLR_MASK   0x00000020#define XEMACPS_NWCTRL_STATCLR_MASK   0x00000020
    -

    Clear statistic registers

    +

    +Clear statistic registers

    -
    - +

    +

    - +
    #define XEMACPS_NWCTRL_STATINC_MASK   0x00000040#define XEMACPS_NWCTRL_STATINC_MASK   0x00000040
    -

    Increment statistic registers

    +

    +Increment statistic registers

    -
    - +

    +

    - +
    #define XEMACPS_NWCTRL_STATWEN_MASK   0x00000080#define XEMACPS_NWCTRL_STATWEN_MASK   0x00000080
    -

    Enable writing to stat counters

    +

    +Enable writing to stat counters

    -
    - +

    +

    - +
    #define XEMACPS_NWCTRL_TXEN_MASK   0x00000008#define XEMACPS_NWCTRL_TXEN_MASK   0x00000008
    -

    Enable transmit

    +

    +Enable transmit

    -
    - +

    +

    - +
    #define XEMACPS_NWCTRL_ZEROPAUSETX_MASK   0x00000800#define XEMACPS_NWCTRL_ZEROPAUSETX_MASK   0x00000800
    -

    Transmit zero quantum pause frame

    +

    +Transmit zero quantum pause frame

    -
    - +

    +

    - +
    #define XEMACPS_NWSR_MDIO_MASK   0x00000002#define XEMACPS_NWSR_MDIO_MASK   0x00000002
    -

    Status of mdio_in

    +

    +Status of mdio_in

    -
    - +

    +

    - +
    #define XEMACPS_NWSR_MDIOIDLE_MASK   0x00000004#define XEMACPS_NWSR_MDIOIDLE_MASK   0x00000004
    -

    PHY management idle

    +

    +PHY management idle

    -
    - +

    +

    - +
    #define XEMACPS_NWSR_OFFSET   0x00000008#define XEMACPS_NWSR_OFFSET   0x00000008
    -

    Network Status reg

    +

    +Network Status reg

    -
    - +

    +

    - +
    #define XEMACPS_OCTRXH_OFFSET   0x00000154#define XEMACPS_OCTRXH_OFFSET   0x00000154
    -

    Octects Received register High

    +

    +Octects Received register High

    -
    - +

    +

    - +
    #define XEMACPS_OCTRXL_OFFSET   0x00000150#define XEMACPS_OCTRXL_OFFSET   0x00000150
    -

    Octects Received register Low

    +

    +Octects Received register Low

    -
    - +

    +

    - +
    #define XEMACPS_OCTTXH_OFFSET   0x00000104#define XEMACPS_OCTTXH_OFFSET   0x00000104
    -

    Octects transmitted High reg

    +

    +Octects transmitted High reg

    -
    - +

    +

    - +
    #define XEMACPS_OCTTXL_OFFSET   0x00000100#define XEMACPS_OCTTXL_OFFSET   0x00000100
    -

    Octects transmitted Low reg

    +

    +Octects transmitted Low reg

    -
    - +

    +

    - +
    #define XEmacPs_Out32   Xil_Out32#define XEmacPs_Out32   Xil_Out32
    +

    +

    -
    - +

    +

    - +
    #define XEMACPS_PHYMNTNC_ADDR_MASK   0x0F800000#define XEMACPS_PHYMNTNC_ADDR_MASK   0x0F800000
    -

    Address bits

    +

    +Address bits

    -
    - +

    +

    - +
    #define XEMACPS_PHYMNTNC_DATA_MASK   0x00000FFF#define XEMACPS_PHYMNTNC_DATA_MASK   0x00000FFF
    -

    data bits

    +

    +data bits

    -
    - +

    +

    - +
    #define XEMACPS_PHYMNTNC_OFFSET   0x00000034#define XEMACPS_PHYMNTNC_OFFSET   0x00000034
    -

    Phy Maintaince reg

    +

    +Phy Maintaince reg

    -
    - +

    +

    - +
    #define XEMACPS_PHYMNTNC_OP_MASK   0x40020000#define XEMACPS_PHYMNTNC_OP_MASK   0x40020000
    -

    operation mask bits

    +

    +operation mask bits

    -
    - +

    +

    - +
    #define XEMACPS_PHYMNTNC_OP_R_MASK   0x20000000#define XEMACPS_PHYMNTNC_OP_R_MASK   0x20000000
    -

    read operation

    +

    +read operation

    -
    - +

    +

    - +
    #define XEMACPS_PHYMNTNC_OP_W_MASK   0x10000000#define XEMACPS_PHYMNTNC_OP_W_MASK   0x10000000
    -

    write operation

    +

    +write operation

    -
    - +

    +

    - +
    #define XEMACPS_PHYMNTNC_PHREG_SHIFT_MASK   18#define XEMACPS_PHYMNTNC_PHREG_SHIFT_MASK   18
    -

    Shift bits for PHREG

    +

    +Shift bits for PHREG

    -
    - +

    +

    - +
    #define XEMACPS_PHYMNTNC_PHYAD_SHIFT_MASK   23#define XEMACPS_PHYMNTNC_PHYAD_SHIFT_MASK   23
    -

    Shift bits for PHYAD

    +

    +Shift bits for PHYAD

    -
    - +

    +

    - +
    #define XEMACPS_PHYMNTNC_REG_MASK   0x007C0000#define XEMACPS_PHYMNTNC_REG_MASK   0x007C0000
    -

    register bits

    +

    +register bits

    -
    - +

    +

    - +
    #define XEMACPS_PTP_RXNANOSEC_OFFSET   0x000001EC#define XEMACPS_PTP_RXNANOSEC_OFFSET   0x000001EC
    -

    1588 PTP receive nanosecond counter

    +

    +1588 PTP receive nanosecond counter

    -
    - +

    +

    - +
    #define XEMACPS_PTP_RXSEC_OFFSET   0x000001E8#define XEMACPS_PTP_RXSEC_OFFSET   0x000001E8
    -

    1588 PTP receive second counter

    +

    +1588 PTP receive second counter

    -
    - +

    +

    - +
    #define XEMACPS_PTP_TXNANOSEC_OFFSET   0x000001E4#define XEMACPS_PTP_TXNANOSEC_OFFSET   0x000001E4
    -

    1588 PTP transmit nanosecond counter

    +

    +1588 PTP transmit nanosecond counter

    -
    - +

    +

    - +
    #define XEMACPS_PTP_TXSEC_OFFSET   0x000001E0#define XEMACPS_PTP_TXSEC_OFFSET   0x000001E0
    -

    1588 PTP transmit second counter

    +

    +1588 PTP transmit second counter

    -
    - +

    +

    - +
    #define XEMACPS_PTPP_RXNANOSEC_OFFSET   0x000001FC#define XEMACPS_PTPP_RXNANOSEC_OFFSET   0x000001FC
    -

    1588 PTP peer receive nanosecond counter

    +

    +1588 PTP peer receive nanosecond counter

    -
    - +

    +

    - +
    #define XEMACPS_PTPP_RXSEC_OFFSET   0x000001F8#define XEMACPS_PTPP_RXSEC_OFFSET   0x000001F8
    -

    1588 PTP peer receive second counter

    +

    +1588 PTP peer receive second counter

    -
    - +

    +

    - +
    #define XEMACPS_PTPP_TXNANOSEC_OFFSET   0x000001F4#define XEMACPS_PTPP_TXNANOSEC_OFFSET   0x000001F4
    -

    1588 PTP peer transmit nanosecond counter

    +

    +1588 PTP peer transmit nanosecond counter

    -
    - +

    +

    - +
    #define XEMACPS_PTPP_TXSEC_OFFSET   0x000001F0#define XEMACPS_PTPP_TXSEC_OFFSET   0x000001F0
    -

    1588 PTP peer transmit second counter

    +

    +1588 PTP peer transmit second counter

    -
    - +

    +

    - + - - - + - + - +
    #define XEmacPs_ReadReg#define XEmacPs_ReadReg (BaseAddress,
    BaseAddress,
    RegOffset   )    XEmacPs_In32((BaseAddress) + (RegOffset))   XEmacPs_In32((BaseAddress) + (RegOffset))
    -

    Read the given register.

    -
    Parameters:
    + +

    +Read the given register.

    +

    Parameters:
    BaseAddress is the base address of the device
    RegOffset is the register offset to be read
    -
    -
    Returns:
    The 32-bit value of the register
    -
    Note:
    C-style signature: u32 XEmacPs_ReadReg(u32 BaseAddress, u32 RegOffset)
    +
    Returns:
    The 32-bit value of the register
    +
    Note:
    C-style signature: u32 XEmacPs_ReadReg(u32 BaseAddress, u32 RegOffset)
    -
    - +

    +

    - +
    #define XEMACPS_RECV   2#define XEMACPS_RECV   2
    -

    receive direction

    +

    +receive direction

    -
    - +

    +

    - +
    #define XEMACPS_RX1024CNT_OFFSET   0x0000017C#define XEMACPS_RX1024CNT_OFFSET   0x0000017C
    -

    Error-free 1024-1518 byte Frames Received Counter

    +

    +Error-free 1024-1518 byte Frames Received Counter

    -
    - +

    +

    - +
    #define XEMACPS_RX128CNT_OFFSET   0x00000170#define XEMACPS_RX128CNT_OFFSET   0x00000170
    -

    Error-free 128-255 byte Frames Received Counter

    +

    +Error-free 128-255 byte Frames Received Counter

    -
    - +

    +

    - +
    #define XEMACPS_RX1519CNT_OFFSET   0x00000180#define XEMACPS_RX1519CNT_OFFSET   0x00000180
    -

    Error-free 1519-max byte Frames Received Counter

    +

    +Error-free 1519-max byte Frames Received Counter

    -
    - +

    +

    - +
    #define XEMACPS_RX256CNT_OFFSET   0x00000174#define XEMACPS_RX256CNT_OFFSET   0x00000174
    -

    Error-free 256-512 byte Frames Received Counter

    +

    +Error-free 256-512 byte Frames Received Counter

    -
    - +

    +

    - +
    #define XEMACPS_RX512CNT_OFFSET   0x00000178#define XEMACPS_RX512CNT_OFFSET   0x00000178
    -

    Error-free 512-1023 byte Frames Received Counter

    +

    +Error-free 512-1023 byte Frames Received Counter

    -
    - +

    +

    - +
    #define XEMACPS_RX64CNT_OFFSET   0x00000168#define XEMACPS_RX64CNT_OFFSET   0x00000168
    -

    Error-free 64 byte Frames Received Counter

    +

    +Error-free 64 byte Frames Received Counter

    -
    - +

    +

    - +
    #define XEMACPS_RX65CNT_OFFSET   0x0000016C#define XEMACPS_RX65CNT_OFFSET   0x0000016C
    -

    Error-free 65-127 byte Frames Received Counter

    +

    +Error-free 65-127 byte Frames Received Counter

    -
    - +

    +

    - +
    #define XEMACPS_RX_BUF_ALIGNMENT   4#define XEMACPS_RX_BUF_ALIGNMENT   4
    -

    Minimum buffer alignment when using options that impose alignment restrictions on the buffer data on the local bus

    +

    +Minimum buffer alignment when using options that impose alignment restrictions on the buffer data on the local bus

    -
    - +

    +

    - +
    #define XEMACPS_RX_BUF_SIZE   1536#define XEMACPS_RX_BUF_SIZE   1536
    -

    Specify the receive buffer size in bytes, 64, 128, ... 10240

    +

    +Specify the receive buffer size in bytes, 64, 128, ... 10240

    -
    - +

    +

    - +
    #define XEMACPS_RX_BUF_UNIT   64#define XEMACPS_RX_BUF_UNIT   64
    -

    Number of receive buffer bytes as a unit, this is HW setup

    +

    +Number of receive buffer bytes as a unit, this is HW setup

    -
    - +

    +

    - +
    #define XEMACPS_RXALIGNCNT_OFFSET   0x0000019C#define XEMACPS_RXALIGNCNT_OFFSET   0x0000019C
    -

    Alignment Error Counter

    +

    +Alignment Error Counter

    -
    - +

    +

    - +
    #define XEMACPS_RXBROADCNT_OFFSET   0x0000015C#define XEMACPS_RXBROADCNT_OFFSET   0x0000015C
    -

    Error-free Broadcast Frames Received Counter

    +

    +Error-free Broadcast Frames Received Counter

    -
    - +

    +

    - +
    #define XEMACPS_RXBUF_ADD_MASK   0xFFFFFFFC#define XEMACPS_RXBUF_ADD_MASK   0xFFFFFFFC
    -

    Mask for address

    +

    +Mask for address

    -
    - +

    +

    - +
    #define XEMACPS_RXBUF_AMATCH_MASK   0x06000000#define XEMACPS_RXBUF_AMATCH_MASK   0x06000000
    -

    Specific address matched

    +

    +Specific address matched

    -
    - +

    +

    - +
    #define XEMACPS_RXBUF_BCAST_MASK   0x80000000#define XEMACPS_RXBUF_BCAST_MASK   0x80000000
    -

    Broadcast frame

    +

    +Broadcast frame

    -
    - +

    +

    - +
    #define XEMACPS_RXBUF_CFI_MASK   0x00010000#define XEMACPS_RXBUF_CFI_MASK   0x00010000
    -

    CFI frame

    +

    +CFI frame

    -
    - +

    +

    - +
    #define XEMACPS_RXBUF_EOF_MASK   0x00008000#define XEMACPS_RXBUF_EOF_MASK   0x00008000
    -

    End of frame.

    +

    +End of frame.

    -
    - +

    +

    - +
    #define XEMACPS_RXBUF_EXH_MASK   0x08000000#define XEMACPS_RXBUF_EXH_MASK   0x08000000
    -

    buffer exhausted

    +

    +buffer exhausted

    -
    - +

    +

    - +
    #define XEMACPS_RXBUF_IDFOUND_MASK   0x01000000#define XEMACPS_RXBUF_IDFOUND_MASK   0x01000000
    -

    Type ID matched

    +

    +Type ID matched

    -
    - +

    +

    - +
    #define XEMACPS_RXBUF_IDMATCH_MASK   0x00C00000#define XEMACPS_RXBUF_IDMATCH_MASK   0x00C00000
    -

    ID matched mask

    +

    +ID matched mask

    -
    - +

    +

    - +
    #define XEMACPS_RXBUF_LEN_MASK   0x00001FFF#define XEMACPS_RXBUF_LEN_MASK   0x00001FFF
    -

    Mask for length field

    +

    +Mask for length field

    -
    - +

    +

    - +
    #define XEMACPS_RXBUF_MULTIHASH_MASK   0x40000000#define XEMACPS_RXBUF_MULTIHASH_MASK   0x40000000
    -

    Multicast hashed frame

    +

    +Multicast hashed frame

    -
    - +

    +

    - +
    #define XEMACPS_RXBUF_NEW_MASK   0x00000001#define XEMACPS_RXBUF_NEW_MASK   0x00000001
    -

    Used bit..

    +

    +Used bit..

    -
    - +

    +

    - +
    #define XEMACPS_RXBUF_PRI_MASK   0x00100000#define XEMACPS_RXBUF_PRI_MASK   0x00100000
    -

    Priority tagged

    +

    +Priority tagged

    -
    - +

    +

    - +
    #define XEMACPS_RXBUF_SOF_MASK   0x00004000#define XEMACPS_RXBUF_SOF_MASK   0x00004000
    -

    Start of frame.

    +

    +Start of frame.

    -
    - +

    +

    - +
    #define XEMACPS_RXBUF_UNIHASH_MASK   0x20000000#define XEMACPS_RXBUF_UNIHASH_MASK   0x20000000
    -

    Unicast hashed frame

    +

    +Unicast hashed frame

    -
    - +

    +

    - +
    #define XEMACPS_RXBUF_VLAN_MASK   0x00200000#define XEMACPS_RXBUF_VLAN_MASK   0x00200000
    -

    VLAN tagged

    +

    +VLAN tagged

    -
    - +

    +

    - +
    #define XEMACPS_RXBUF_VPRI_MASK   0x000E0000#define XEMACPS_RXBUF_VPRI_MASK   0x000E0000
    -

    Vlan priority

    +

    +Vlan priority

    -
    - +

    +

    - +
    #define XEMACPS_RXBUF_WRAP_MASK   0x00000002#define XEMACPS_RXBUF_WRAP_MASK   0x00000002
    -

    Wrap bit, last BD

    +

    +Wrap bit, last BD

    -
    - +

    +

    - +
    #define XEMACPS_RXCNT_OFFSET   0x00000158#define XEMACPS_RXCNT_OFFSET   0x00000158
    -

    Error-free Frames Received Counter

    +

    +Error-free Frames Received Counter

    -
    - +

    +

    - +
    #define XEMACPS_RXFCSCNT_OFFSET   0x00000190#define XEMACPS_RXFCSCNT_OFFSET   0x00000190
    -

    Frame Check Sequence Error Counter

    +

    +Frame Check Sequence Error Counter

    -
    - +

    +

    - +
    #define XEMACPS_RXIPCCNT_OFFSET   0x000001A8#define XEMACPS_RXIPCCNT_OFFSET   0x000001A8
    -

    IP header Checksum Error Counter

    +

    +IP header Checksum Error Counter

    -
    - +

    +

    - +
    #define XEMACPS_RXJABCNT_OFFSET   0x0000018C#define XEMACPS_RXJABCNT_OFFSET   0x0000018C
    -

    Jabbers Received Counter

    +

    +Jabbers Received Counter

    -
    - +

    +

    - +
    #define XEMACPS_RXLENGTHCNT_OFFSET   0x00000194#define XEMACPS_RXLENGTHCNT_OFFSET   0x00000194
    -

    Length Field Error Counter

    +

    +Length Field Error Counter

    -
    - +

    +

    - +
    #define XEMACPS_RXMULTICNT_OFFSET   0x00000160#define XEMACPS_RXMULTICNT_OFFSET   0x00000160
    -

    Error-free Multicast Frames Received Counter

    +

    +Error-free Multicast Frames Received Counter

    -
    - +

    +

    - +
    #define XEMACPS_RXORCNT_OFFSET   0x000001A4#define XEMACPS_RXORCNT_OFFSET   0x000001A4
    -

    Receive Overrun Counter

    +

    +Receive Overrun Counter

    -
    - +

    +

    - +
    #define XEMACPS_RXOVRCNT_OFFSET   0x00000188#define XEMACPS_RXOVRCNT_OFFSET   0x00000188
    -

    Oversize Frames Received Counter

    +

    +Oversize Frames Received Counter

    -
    - +

    +

    - +
    #define XEMACPS_RXPAUSE_OFFSET   0x00000038#define XEMACPS_RXPAUSE_OFFSET   0x00000038
    -

    RX Pause Time reg

    +

    +RX Pause Time reg

    -
    - +

    +

    - +
    #define XEMACPS_RXPAUSECNT_OFFSET   0x00000164#define XEMACPS_RXPAUSECNT_OFFSET   0x00000164
    -

    Pause Frames Received Counter

    +

    +Pause Frames Received Counter

    -
    - +

    +

    - +
    #define XEMACPS_RXQBASE_OFFSET   0x00000018#define XEMACPS_RXQBASE_OFFSET   0x00000018
    -

    RX Q Base address reg

    +

    +RX Q Base address reg

    -
    - +

    +

    - +
    #define XEMACPS_RXRESERRCNT_OFFSET   0x000001A0#define XEMACPS_RXRESERRCNT_OFFSET   0x000001A0
    -

    Receive Resource Error Counter

    +

    +Receive Resource Error Counter

    -
    - +

    +

    - +
    #define XEMACPS_RXSR_BUFFNA_MASK   0x00000001#define XEMACPS_RXSR_BUFFNA_MASK   0x00000001
    -

    RX buffer used bit set

    +

    +RX buffer used bit set

    -
    - +

    +

    - +
    #define XEMACPS_RXSR_ERROR_MASK#define XEMACPS_RXSR_ERROR_MASK
    -Value:
    (XEMACPS_RXSR_HRESPNOK_MASK | \
-                                       XEMACPS_RXSR_RXOVR_MASK | \
-                                       XEMACPS_RXSR_BUFFNA_MASK)
+
+
    
+Value:
    (XEMACPS_RXSR_HRESPNOK_MASK | \
+                                       XEMACPS_RXSR_RXOVR_MASK | \
+                                       XEMACPS_RXSR_BUFFNA_MASK)
    -
    - +

    +

    - +
    #define XEMACPS_RXSR_FRAMERX_MASK   0x00000002#define XEMACPS_RXSR_FRAMERX_MASK   0x00000002
    -

    Frame received OK

    +

    +Frame received OK

    -
    - +

    +

    - +
    #define XEMACPS_RXSR_HRESPNOK_MASK   0x00000008#define XEMACPS_RXSR_HRESPNOK_MASK   0x00000008
    -

    Receive hresp not OK

    +

    +Receive hresp not OK

    -
    - +

    +

    - +
    #define XEMACPS_RXSR_OFFSET   0x00000020#define XEMACPS_RXSR_OFFSET   0x00000020
    -

    RX Status reg

    +

    +RX Status reg

    -
    - +

    +

    - +
    #define XEMACPS_RXSR_RXOVR_MASK   0x00000004#define XEMACPS_RXSR_RXOVR_MASK   0x00000004
    -

    Receive overrun

    +

    +Receive overrun

    -
    - +

    +

    - +
    #define XEMACPS_RXSYMBCNT_OFFSET   0x00000198#define XEMACPS_RXSYMBCNT_OFFSET   0x00000198
    -

    Symbol Error Counter

    +

    +Symbol Error Counter

    -
    - +

    +

    - +
    #define XEMACPS_RXTCPCCNT_OFFSET   0x000001AC#define XEMACPS_RXTCPCCNT_OFFSET   0x000001AC
    -

    TCP Checksum Error Counter

    +

    +TCP Checksum Error Counter

    -
    - +

    +

    - +
    #define XEMACPS_RXUDPCCNT_OFFSET   0x000001B0#define XEMACPS_RXUDPCCNT_OFFSET   0x000001B0
    -

    UDP Checksum Error Counter

    +

    +UDP Checksum Error Counter

    -
    - +

    +

    - +
    #define XEMACPS_RXUNDRCNT_OFFSET   0x00000184#define XEMACPS_RXUNDRCNT_OFFSET   0x00000184
    -

    Undersize Frames Received Counter

    +

    +Undersize Frames Received Counter

    -
    - +

    +

    - +
    #define XEMACPS_SEND   1#define XEMACPS_SEND   1
    -

    send direction

    +

    +send direction

    -
    - +

    +

    - +
    #define XEMACPS_SNGLCOLLCNT_OFFSET   0x00000138#define XEMACPS_SNGLCOLLCNT_OFFSET   0x00000138
    -

    Single Collision Frame Counter

    +

    +Single Collision Frame Counter

    -
    - +

    +

    - +
    #define XEMACPS_STRETCH_OFFSET   0x000000BC#define XEMACPS_STRETCH_OFFSET   0x000000BC
    -

    IPG Stretch reg

    +

    +IPG Stretch reg

    -
    - +

    +

    - +
    #define XEMACPS_TX1024CNT_OFFSET   0x0000012C#define XEMACPS_TX1024CNT_OFFSET   0x0000012C
    -

    Error-free 1024-1518 byte Frames transmitted counter

    +

    +Error-free 1024-1518 byte Frames transmitted counter

    -
    - +

    +

    - +
    #define XEMACPS_TX128CNT_OFFSET   0x00000120#define XEMACPS_TX128CNT_OFFSET   0x00000120
    -

    Error-free 128-255 byte Frames Transmitted counter

    +

    +Error-free 128-255 byte Frames Transmitted counter

    -
    - +

    +

    - +
    #define XEMACPS_TX1519CNT_OFFSET   0x00000130#define XEMACPS_TX1519CNT_OFFSET   0x00000130
    -

    Error-free larger than 1519 byte Frames transmitted counter

    +

    +Error-free larger than 1519 byte Frames transmitted counter

    -
    - +

    +

    - +
    #define XEMACPS_TX256CNT_OFFSET   0x00000124#define XEMACPS_TX256CNT_OFFSET   0x00000124
    -

    Error-free 256-511 byte Frames transmitted counter

    +

    +Error-free 256-511 byte Frames transmitted counter

    -
    - +

    +

    - +
    #define XEMACPS_TX512CNT_OFFSET   0x00000128#define XEMACPS_TX512CNT_OFFSET   0x00000128
    -

    Error-free 512-1023 byte Frames transmitted counter

    +

    +Error-free 512-1023 byte Frames transmitted counter

    -
    - +

    +

    - +
    #define XEMACPS_TX64CNT_OFFSET   0x00000118#define XEMACPS_TX64CNT_OFFSET   0x00000118
    -

    Error-free 64 byte Frames Transmitted counter

    +

    +Error-free 64 byte Frames Transmitted counter

    -
    - +

    +

    - +
    #define XEMACPS_TX65CNT_OFFSET   0x0000011C#define XEMACPS_TX65CNT_OFFSET   0x0000011C
    -

    Error-free 65-127 byte Frames Transmitted counter

    +

    +Error-free 65-127 byte Frames Transmitted counter

    -
    - +

    +

    - +
    #define XEMACPS_TXBCCNT_OFFSET   0x0000010C#define XEMACPS_TXBCCNT_OFFSET   0x0000010C
    -

    Error-free Broadcast Frames counter

    +

    +Error-free Broadcast Frames counter

    -
    - +

    +

    - +
    #define XEMACPS_TXBUF_EXH_MASK   0x08000000#define XEMACPS_TXBUF_EXH_MASK   0x08000000
    -

    Buffers exhausted

    +

    +Buffers exhausted

    -
    - +

    +

    - +
    #define XEMACPS_TXBUF_LAST_MASK   0x00008000#define XEMACPS_TXBUF_LAST_MASK   0x00008000
    -

    Last buffer

    +

    +Last buffer

    -
    - +

    +

    - +
    #define XEMACPS_TXBUF_LEN_MASK   0x00003FFF#define XEMACPS_TXBUF_LEN_MASK   0x00003FFF
    -

    Mask for length field

    +

    +Mask for length field

    -
    - +

    +

    - +
    #define XEMACPS_TXBUF_NOCRC_MASK   0x00010000#define XEMACPS_TXBUF_NOCRC_MASK   0x00010000
    -

    No CRC

    +

    +No CRC

    -
    - +

    +

    - +
    #define XEMACPS_TXBUF_RETRY_MASK   0x20000000#define XEMACPS_TXBUF_RETRY_MASK   0x20000000
    -

    Retry limit exceeded

    +

    +Retry limit exceeded

    -
    - +

    +

    - +
    #define XEMACPS_TXBUF_TCP_MASK   0x04000000#define XEMACPS_TXBUF_TCP_MASK   0x04000000
    -

    Late collision.

    +

    +Late collision.

    -
    - +

    +

    - +
    #define XEMACPS_TXBUF_URUN_MASK   0x10000000#define XEMACPS_TXBUF_URUN_MASK   0x10000000
    -

    Transmit underrun occurred

    +

    +Transmit underrun occurred

    -
    - +

    +

    - +
    #define XEMACPS_TXBUF_USED_MASK   0x80000000#define XEMACPS_TXBUF_USED_MASK   0x80000000
    -

    Used bit.

    +

    +Used bit.

    -
    - +

    +

    - +
    #define XEMACPS_TXBUF_WRAP_MASK   0x40000000#define XEMACPS_TXBUF_WRAP_MASK   0x40000000
    -

    Wrap bit, last descriptor

    +

    +Wrap bit, last descriptor

    -
    - +

    +

    - +
    #define XEMACPS_TXCNT_OFFSET   0x00000108#define XEMACPS_TXCNT_OFFSET   0x00000108
    -

    Error-free Frmaes transmitted counter

    +

    +Error-free Frmaes transmitted counter

    -
    - +

    +

    - +
    #define XEMACPS_TXCSENSECNT_OFFSET   0x0000014C#define XEMACPS_TXCSENSECNT_OFFSET   0x0000014C
    -

    Transmit Carrier Sense Error Counter

    +

    +Transmit Carrier Sense Error Counter

    -
    - +

    +

    - +
    #define XEMACPS_TXDEFERCNT_OFFSET   0x00000148#define XEMACPS_TXDEFERCNT_OFFSET   0x00000148
    -

    Deferred Transmission Frame Counter

    +

    +Deferred Transmission Frame Counter

    -
    - +

    +

    - +
    #define XEMACPS_TXMCCNT_OFFSET   0x00000110#define XEMACPS_TXMCCNT_OFFSET   0x00000110
    -

    Error-free Multicast Frame counter

    +

    +Error-free Multicast Frame counter

    -
    - +

    +

    - +
    #define XEMACPS_TXPAUSE_OFFSET   0x0000003C#define XEMACPS_TXPAUSE_OFFSET   0x0000003C
    -

    TX Pause Time reg

    +

    +TX Pause Time reg

    -
    - +

    +

    - +
    #define XEMACPS_TXPAUSECNT_OFFSET   0x00000114#define XEMACPS_TXPAUSECNT_OFFSET   0x00000114
    -

    Pause Frames Transmitted Counter

    +

    +Pause Frames Transmitted Counter

    -
    - +

    +

    - +
    #define XEMACPS_TXQBASE_OFFSET   0x0000001C#define XEMACPS_TXQBASE_OFFSET   0x0000001C
    -

    TX Q Base address reg

    +

    +TX Q Base address reg

    -
    - +

    +

    - +
    #define XEMACPS_TXSR_BUFEXH_MASK   0x00000010#define XEMACPS_TXSR_BUFEXH_MASK   0x00000010
    -

    Transmit buffs exhausted mid frame

    +

    +Transmit buffs exhausted mid frame

    -
    - +

    +

    - +
    #define XEMACPS_TXSR_ERROR_MASK#define XEMACPS_TXSR_ERROR_MASK
    -Value:
    (XEMACPS_TXSR_HRESPNOK_MASK | \
-                                       XEMACPS_TXSR_URUN_MASK | \
-                                       XEMACPS_TXSR_BUFEXH_MASK | \
-                                       XEMACPS_TXSR_RXOVR_MASK | \
-                                       XEMACPS_TXSR_FRAMERX_MASK | \
-                                       XEMACPS_TXSR_USEDREAD_MASK)
+
+
    
+Value:
    (XEMACPS_TXSR_HRESPNOK_MASK | \
+                                       XEMACPS_TXSR_URUN_MASK | \
+                                       XEMACPS_TXSR_BUFEXH_MASK | \
+                                       XEMACPS_TXSR_RXOVR_MASK | \
+                                       XEMACPS_TXSR_FRAMERX_MASK | \
+                                       XEMACPS_TXSR_USEDREAD_MASK)
    -
    - +

    +

    - +
    #define XEMACPS_TXSR_FRAMERX_MASK   0x00000002#define XEMACPS_TXSR_FRAMERX_MASK   0x00000002
    -

    Collision tx frame

    +

    +Collision tx frame

    -
    - +

    +

    - +
    #define XEMACPS_TXSR_HRESPNOK_MASK   0x00000100#define XEMACPS_TXSR_HRESPNOK_MASK   0x00000100
    -

    Transmit hresp not OK

    +

    +Transmit hresp not OK

    -
    - +

    +

    - +
    #define XEMACPS_TXSR_OFFSET   0x00000014#define XEMACPS_TXSR_OFFSET   0x00000014
    -

    TX Status reg

    +

    +TX Status reg

    -
    - +

    +

    - +
    #define XEMACPS_TXSR_RXOVR_MASK   0x00000004#define XEMACPS_TXSR_RXOVR_MASK   0x00000004
    -

    Retry limit exceeded

    +

    +Retry limit exceeded

    -
    - +

    +

    - +
    #define XEMACPS_TXSR_TXCOMPL_MASK   0x00000020#define XEMACPS_TXSR_TXCOMPL_MASK   0x00000020
    -

    Transmit completed OK

    +

    +Transmit completed OK

    -
    - +

    +

    - +
    #define XEMACPS_TXSR_TXGO_MASK   0x00000008#define XEMACPS_TXSR_TXGO_MASK   0x00000008
    -

    Status of go flag

    +

    +Status of go flag

    -
    - +

    +

    - +
    #define XEMACPS_TXSR_URUN_MASK   0x00000040#define XEMACPS_TXSR_URUN_MASK   0x00000040
    -

    Transmit underrun

    +

    +Transmit underrun

    -
    - +

    +

    - +
    #define XEMACPS_TXSR_USEDREAD_MASK   0x00000001#define XEMACPS_TXSR_USEDREAD_MASK   0x00000001
    -

    TX buffer used bit set

    +

    +TX buffer used bit set

    -
    - +

    +

    - +
    #define XEMACPS_TXURUNCNT_OFFSET   0x00000134#define XEMACPS_TXURUNCNT_OFFSET   0x00000134
    -

    TX under run error counter

    +

    +TX under run error counter

    -
    - +

    +

    - + - - - + - - - + - + - +
    #define XEmacPs_WriteReg#define XEmacPs_WriteReg (BaseAddress,
    BaseAddress,
    RegOffset,
    RegOffset,
    Data   )    XEmacPs_Out32((BaseAddress) + (RegOffset), (Data))   XEmacPs_Out32((BaseAddress) + (RegOffset), (Data))
    -

    Write the given register.

    -
    Parameters:
    + +

    +Write the given register.

    +

    Parameters:
    BaseAddress is the base address of the device
    RegOffset is the register offset to be written
    Data is the 32-bit value to write to the register
    -
    -
    Returns:
    None.
    -
    Note:
    C-style signature: void XEmacPs_WriteReg(u32 BaseAddress, u32 RegOffset, u32 Data)
    +
    Returns:
    None.
    +
    Note:
    C-style signature: void XEmacPs_WriteReg(u32 BaseAddress, u32 RegOffset, u32 Data)
    -
    -

    Enumeration Type Documentation

    - +

    +

    Enumeration Type Documentation

    +
    - +
    enum XEmacPs_MdcDivenum XEmacPs_MdcDiv
    -
    Enumerator:
    -
    MDC_DIV_8  + +

    +

    Enumerator:
    + + - - - - - - -
    MDC_DIV_8 
    MDC_DIV_16  +
    MDC_DIV_16 
    MDC_DIV_32  +
    MDC_DIV_32 
    MDC_DIV_48  +
    MDC_DIV_48 
    MDC_DIV_64  +
    MDC_DIV_64 
    MDC_DIV_96  +
    MDC_DIV_96 
    MDC_DIV_128  +
    MDC_DIV_128 
    MDC_DIV_224  +
    MDC_DIV_224 
    -
    - -

    Function Documentation

    - +

    +

    Function Documentation

    +
    - + - + - +
    void XEmacPs_ResetHw void XEmacPs_ResetHw ( u32  BaseAddr BaseAddr  ) 
    -

    This function perform the reset sequence to the given emacps interface by configuring the appropriate control bits in the emacps specifc registers. the emacps reset squence involves the following steps Disable all the interuupts Clear the status registers Disable Rx and Tx engines Update the Tx and Rx descriptor queue registers with reset values Update the other relevant control registers with reset value

    -
    Parameters:
    + +

    +This function perform the reset sequence to the given emacps interface by configuring the appropriate control bits in the emacps specifc registers. the emacps reset squence involves the following steps Disable all the interuupts Clear the status registers Disable Rx and Tx engines Update the Tx and Rx descriptor queue registers with reset values Update the other relevant control registers with reset value

    +

    Parameters:
    BaseAddress of the interface
    -
    -
    Returns:
    N/A
    -
    Note:
    This function will not modify the slcr registers that are relavant for emacps controller
    +
    Returns:
    N/A
    +
    Note:
    This function will not modify the slcr registers that are relavant for emacps controller
    -
    - -

    -Copyright © 1995-2014 Xilinx, Inc. All rights reserved. -

    - - +

    +Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. diff --git a/XilinxProcessorIPLib/drivers/emacps/doc/html/api/xemacps__intr_8c.html b/XilinxProcessorIPLib/drivers/emacps/doc/html/api/xemacps__intr_8c.html index 2fbbe714..e52cc9c8 100755 --- a/XilinxProcessorIPLib/drivers/emacps/doc/html/api/xemacps__intr_8c.html +++ b/XilinxProcessorIPLib/drivers/emacps/doc/html/api/xemacps__intr_8c.html @@ -2,41 +2,30 @@ - Xilinx Driver emacps v2_1: xemacps_intr.c File Reference + xemacps_intr.c File Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - - - -
    -

    xemacps_intr.c File Reference

    #include "xemacps.h"
    - - - - -

    Functions

    int XEmacPs_SetHandler (XEmacPs *InstancePtr, u32 HandlerType, void *FuncPtr, void *CallBackRef)
    void XEmacPs_IntrHandler (void *XEmacPsPtr)
    -

    Detailed Description

    -

    Functions in this file implement general purpose interrupt processing related functionality. See xemacps.h for a detailed description of the driver.

    + +
    +
    +
    +
    +

    xemacps_intr.c File Reference

    Detailed Description

    +Functions in this file implement general purpose interrupt processing related functionality. See xemacps.h for a detailed description of the driver.

    - MODIFICATION HISTORY:
     Ver   Who  Date     Changes
+ MODIFICATION HISTORY:

    +

     Ver   Who  Date     Changes
  ----- ---- -------- -------------------------------------------------------
  1.00a wsy  01/10/10 First release
  1.03a asa  01/24/13 Fix for CR #692702 which updates error handling for
@@ -48,39 +37,51 @@
 		      bit 18 to flush a packet from Rx DPRAM immediately. The
 		      changes for it are done in the function
 		      XEmacPs_IntrHandler.
-

    Function Documentation

    - + +

    +#include "xemacps.h"
    + + + + + + + +

    Functions

    int XEmacPs_SetHandler (XEmacPs *InstancePtr, u32 HandlerType, void *FuncPtr, void *CallBackRef)
    void XEmacPs_IntrHandler (void *XEmacPsPtr)
    +

    Function Documentation

    +
    - + - + - +
    void XEmacPs_IntrHandler void XEmacPs_IntrHandler ( void *  XEmacPsPtr XEmacPsPtr  ) 
    -

    Master interrupt handler for EMAC driver. This routine will query the status of the device, bump statistics, and invoke user callbacks.

    -

    This routine must be connected to an interrupt controller using OS/BSP specific methods.

    -
    Parameters:
    + +

    +Master interrupt handler for EMAC driver. This routine will query the status of the device, bump statistics, and invoke user callbacks.

    +This routine must be connected to an interrupt controller using OS/BSP specific methods.

    +

    Parameters:
    XEmacPsPtr is a pointer to the XEMACPS instance that has caused the interrupt.
    -
    -
    - +

    +

    - + @@ -106,30 +107,26 @@ - +
    int XEmacPs_SetHandler int XEmacPs_SetHandler ( XEmacPs *  InstancePtr,
    )
    -

    Install an asynchronious handler function for the given HandlerType:

    -
    Parameters:
    + +

    +Install an asynchronious handler function for the given HandlerType:

    +

    Parameters:
    InstancePtr is a pointer to the instance to be worked on.
    HandlerType indicates what interrupt handler type is. XEMACPS_HANDLER_DMASEND, XEMACPS_HANDLER_DMARECV and XEMACPS_HANDLER_ERROR.
    FuncPtr is the pointer to the callback function
    CallBackRef is the upper layer callback reference passed back when when the callback function is invoked.
    -
    -
    Returns:
    -

    None.

    -
    Note:
    There is no assert on the CallBackRef since the driver doesn't know what it is.
    +
    Returns:
    +None.

    +

    Note:
    There is no assert on the CallBackRef since the driver doesn't know what it is.
    -
    - -

    -Copyright © 1995-2014 Xilinx, Inc. All rights reserved. -

    - - +

    +Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. diff --git a/XilinxProcessorIPLib/drivers/emacps/doc/html/api/xemacps__sinit_8c.html b/XilinxProcessorIPLib/drivers/emacps/doc/html/api/xemacps__sinit_8c.html index 25e76952..96e761d1 100755 --- a/XilinxProcessorIPLib/drivers/emacps/doc/html/api/xemacps__sinit_8c.html +++ b/XilinxProcessorIPLib/drivers/emacps/doc/html/api/xemacps__sinit_8c.html @@ -2,73 +2,68 @@ - Xilinx Driver emacps v2_1: xemacps_sinit.c File Reference + xemacps_sinit.c File Reference - +

    Xilinx Processor IP Library

    Software Drivers
    - - - -
    -

    xemacps_sinit.c File Reference

    #include "xparameters.h"
    -#include "xemacps.h"
    - - - -

    Functions

    XEmacPs_Config * XEmacPs_LookupConfig (u16 DeviceId)
    -

    Detailed Description

    -

    This file contains lookup method by device ID when success, it returns pointer to config table to be used to initialize the device.

    + +
    +
    +
    +
    +

    xemacps_sinit.c File Reference

    Detailed Description

    +This file contains lookup method by device ID when success, it returns pointer to config table to be used to initialize the device.

    - MODIFICATION HISTORY:
     Ver   Who  Date     Changes
+ MODIFICATION HISTORY:

    +

     Ver   Who  Date     Changes
  ----- ---- -------- -------------------------------------------------------
  1.00a wsy  01/10/10 New
-

    Function Documentation

    - + +

    +#include "xparameters.h"
    +#include "xemacps.h"
    + + + + + +

    Functions

    XEmacPs_Config * XEmacPs_LookupConfig (u16 DeviceId)
    +

    Function Documentation

    +
    - + - + - +
    XEmacPs_Config* XEmacPs_LookupConfig XEmacPs_Config* XEmacPs_LookupConfig ( u16  DeviceId DeviceId  ) 
    -

    Lookup the device configuration based on the unique device ID. The table contains the configuration info for each device in the system.

    -
    Parameters:
    + +

    +Lookup the device configuration based on the unique device ID. The table contains the configuration info for each device in the system.

    +

    Parameters:
    DeviceId is the unique device ID of the device being looked up.
    -
    -
    Returns:
    A pointer to the configuration table entry corresponding to the given device ID, or NULL if no match is found.
    +
    Returns:
    A pointer to the configuration table entry corresponding to the given device ID, or NULL if no match is found.
    -
    -
    -

    -Copyright © 1995-2014 Xilinx, Inc. All rights reserved. -

    - - +

    +Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.