diff --git a/lib/bsp/standalone/src/changelog.txt b/lib/bsp/standalone/src/changelog.txt
index 5fdfc12d..e10506fb 100644
--- a/lib/bsp/standalone/src/changelog.txt
+++ b/lib/bsp/standalone/src/changelog.txt
@@ -246,4 +246,6 @@
  *		       defined for BSP) because XilOpenAMP library contains own file operation.
  *		       The xil-crt0.S file is modified for not initializing global timer for
  *		       OpenAMP application as it might be already in use by master CPU
+ * 5.3 pkp   10/09/15  Modified cortexa9/iccarm/xpseudo_asm_iccarm.h file to change function
+ *		       definition for dsb, isb and dmb to fix the compilation error when used
  *****************************************************************************************/
diff --git a/lib/bsp/standalone/src/cortexa9/iccarm/xpseudo_asm_iccarm.h b/lib/bsp/standalone/src/cortexa9/iccarm/xpseudo_asm_iccarm.h
index 017966d2..a3ca687f 100644
--- a/lib/bsp/standalone/src/cortexa9/iccarm/xpseudo_asm_iccarm.h
+++ b/lib/bsp/standalone/src/cortexa9/iccarm/xpseudo_asm_iccarm.h
@@ -44,6 +44,7 @@
 * ----- -------- -------- -----------------------------------------------
 * 1.00a ecm/sdm  10/28/09 First release
 * 3.12a asa		 11/02/13  Removed the macro mfcpsr to make it a function.
+* 5.3	pkp		 10/09/15 Modified dsb, dmb and isb definitions
 * </pre>
 *
 ******************************************************************************/
@@ -99,13 +100,13 @@ extern "C" {
 /* memory synchronization operations */
 
 /* Instruction Synchronization Barrier */
-#define isb() __asm volatile ("isb" : : : "memory")
+#define isb() void __ISB(void);
 
 /* Data Synchronization Barrier */
-#define dsb() __asm volatile ("dsb" : : : "memory")
+#define dsb() void __DSB(void);
 
 /* Data Memory Barrier */
-#define dmb() __asm volatile ("dmb" : : : "memory")
+#define dmb() void __DMB(void);
 
 
 /* Memory Operations */