This header file contains identifiers and register-level driver functions (or macros), range macros, structure typedefs that can be used to access the Image Statistic core instance.
The Image Enhancement core offers noise reduction and/or edge enhancement. For edge enhancement, optional anti-halo and anti-alias post-processing modules are available to reduce image artifacts that can appear from the high-pass filtering of the edge enhancement filters. The amount of noise reduction and edge enhancement is controlled through user parameters. There are two variations of the algorithm offered to choose between high performance and minimal resource usage. This core works on YCbCr 4:4:4 and 4:2:2 data. The core is capable of a maximum resolution of 7680 columns by 7680 rows with 8, 10, 12, or 16 bits per pixel and supports the bandwidth necessary for High-definition (1080p60) resolutions in all Xilinx FPGA device families. Higher resolutions can be supported in Xilinx high-performance device families.