From a9740e3b9369616d2fbf0c26e67952edbbf74901 Mon Sep 17 00:00:00 2001 From: Rohit Consul Date: Thu, 20 Aug 2015 14:04:07 -0700 Subject: [PATCH] v_vscaler: Coefficient register base address offset changed in IP Coefficient register base address offset changed in IP from 0x400 to 0x800 to accomodate all supported taps. Split Phase and Coefficient programming logic in 2 independent API's. For Bicubic and Bilinear scalers only Phase needs to be programmed. Signed-off-by: Rohit Consul Acked-by: Srikanth Vemula --- .../drivers/v_vscaler/src/xv_vscaler_hw.h | 4 ++-- .../drivers/v_vscaler/src/xv_vscaler_l2.c | 12 ++++++++++-- 2 files changed, 12 insertions(+), 4 deletions(-) diff --git a/XilinxProcessorIPLib/drivers/v_vscaler/src/xv_vscaler_hw.h b/XilinxProcessorIPLib/drivers/v_vscaler/src/xv_vscaler_hw.h index 8cbee539..ab1100d9 100644 --- a/XilinxProcessorIPLib/drivers/v_vscaler/src/xv_vscaler_hw.h +++ b/XilinxProcessorIPLib/drivers/v_vscaler/src/xv_vscaler_hw.h @@ -57,7 +57,7 @@ #define XV_VSCALER_CTRL_BITS_HWREG_HEIGHTOUT_DATA 16 #define XV_VSCALER_CTRL_ADDR_HWREG_LINERATE_DATA 0x028 #define XV_VSCALER_CTRL_BITS_HWREG_LINERATE_DATA 32 -#define XV_VSCALER_CTRL_ADDR_HWREG_VFLTCOEFF_BASE 0x400 -#define XV_VSCALER_CTRL_ADDR_HWREG_VFLTCOEFF_HIGH 0x7ff +#define XV_VSCALER_CTRL_ADDR_HWREG_VFLTCOEFF_BASE 0x800 +#define XV_VSCALER_CTRL_ADDR_HWREG_VFLTCOEFF_HIGH 0xbff #define XV_VSCALER_CTRL_WIDTH_HWREG_VFLTCOEFF 16 #define XV_VSCALER_CTRL_DEPTH_HWREG_VFLTCOEFF 384 diff --git a/XilinxProcessorIPLib/drivers/v_vscaler/src/xv_vscaler_l2.c b/XilinxProcessorIPLib/drivers/v_vscaler/src/xv_vscaler_l2.c index ae3446e7..d23a99bc 100644 --- a/XilinxProcessorIPLib/drivers/v_vscaler/src/xv_vscaler_l2.c +++ b/XilinxProcessorIPLib/drivers/v_vscaler/src/xv_vscaler_l2.c @@ -349,6 +349,7 @@ void XV_VScalerDbgReportStatus(XV_vscaler *InstancePtr) u32 widthin, heightin, heightout, linerate; u32 baseAddr, taps, phases; int val,i,j; + const char *ScalerTypeStr[] = {"Bilinear", "Bicubic", "Polyphase"}; /* * Assert validates the input arguments @@ -375,18 +376,25 @@ void XV_VScalerDbgReportStatus(XV_vscaler *InstancePtr) xil_printf("IsReady: %d\r\n", ready); xil_printf("Ctrl: 0x%x\r\n\r\n", ctrl); - xil_printf("Scaler Type: %d\r\n",pVsc->Config.ScalerType); + if(pVsc->Config.ScalerType <= XV_VSCALER_POLYPHASE) + { + xil_printf("Scaler Type: %s\r\n",ScalerTypeStr[pVsc->Config.ScalerType]); + } + else + { + xil_printf("Scaler Type: Unknown\r\n"); + } xil_printf("Input Width: %d\r\n",widthin); xil_printf("Input Height: %d\r\n",heightin); xil_printf("Output Height: %d\r\n",heightout); xil_printf("Line Rate: %d\r\n",linerate); xil_printf("Num Phases: %d\r\n",phases); - xil_printf("Num Taps: %d\r\n",taps*2); if(pVsc->Config.ScalerType == XV_VSCALER_POLYPHASE) { short lsb, msb; + xil_printf("Num Taps: %d\r\n",taps*2); xil_printf("\r\nCoefficients:"); baseAddr = XV_vscaler_Get_HwReg_vfltCoeff_BaseAddress(pVsc);