diff --git a/XilinxProcessorIPLib/drivers/nandps/src/xnandps.c b/XilinxProcessorIPLib/drivers/nandps/src/xnandps.c index ee506db6..0ed0f975 100755 --- a/XilinxProcessorIPLib/drivers/nandps/src/xnandps.c +++ b/XilinxProcessorIPLib/drivers/nandps/src/xnandps.c @@ -72,7 +72,10 @@ * of spare bytes since we don't calculate ECC for * spare bytes. * 2.01 kpc 07/24/2014 Fixed CR#808770. Update command register twice only - if flash device requires >= four address cycles. +* if flash device requires >= four address cycles. +* 2.2 sb 01/31/2015 Use the address cycles defined in onfi parameter +* page than hardcoding this value to 5 for read and +* write operations. * * ******************************************************************************/ @@ -1076,6 +1079,15 @@ void XNandPs_SendCommand(XNandPs *InstancePtr, XNandPs_CommandFormat EndCmdReq = 1; } + if ((Command->StartCmd == ONFI_CMD_READ1) || + (Command->StartCmd == ONFI_CMD_PAGE_PROG1)) { + Command->AddrCycles = InstancePtr->Geometry.RowAddrCycles + + InstancePtr->Geometry.ColAddrCycles; + } + if ((Command->StartCmd == ONFI_CMD_BLOCK_ERASE1)) { + Command->AddrCycles = InstancePtr->Geometry.RowAddrCycles; + } + /* * Construct command phase address */ diff --git a/XilinxProcessorIPLib/drivers/nandps/src/xnandps.h b/XilinxProcessorIPLib/drivers/nandps/src/xnandps.h index 804ad337..41992eab 100755 --- a/XilinxProcessorIPLib/drivers/nandps/src/xnandps.h +++ b/XilinxProcessorIPLib/drivers/nandps/src/xnandps.h @@ -166,6 +166,9 @@ * 2.0 adk 12/10/13 Updated as per the New Tcl API's * 2.1 kpc 07/24/13 Fixed CR#808770. Update command register twice only * if flash device requires >= four address cycles. +* 2.2 sb 01/31/2015 Use the address cycles defined in onfi parameter +* page than hardcoding this value to 5 for read and +* write operations. * * ******************************************************************************/