From b2f279c410af3918c779f69a85651c0837d8057e Mon Sep 17 00:00:00 2001 From: Kinjal Pravinbhai Patel Date: Thu, 28 May 2015 21:14:28 +0800 Subject: [PATCH] bsp: a53: added interrupt IDs for RTC This patch modifies xparameters_ps.h to include RTC interrupt IDs Signed-off-by: Kinjal Pravinbhai Patel --- lib/bsp/standalone/src/cortexa53/xparameters_ps.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/lib/bsp/standalone/src/cortexa53/xparameters_ps.h b/lib/bsp/standalone/src/cortexa53/xparameters_ps.h index d86e6fc5..8610cc0a 100644 --- a/lib/bsp/standalone/src/cortexa53/xparameters_ps.h +++ b/lib/bsp/standalone/src/cortexa53/xparameters_ps.h @@ -138,6 +138,8 @@ extern "C" { #define XPAR_XSMMU_FPD_INTR XPS_FPD_SMMU_INT_ID #define XPAR_XUSBPS_0_INTR XPS_USB3_0_ENDPT_INT_ID #define XPAR_XUSBPS_1_INTR XPS_USB3_1_ENDPT_INT_ID +#define XPAR_XRTCPSU_ALARM_INTR XPS_RTC_ALARM_INT_ID +#define XPAR_XRTCPSU_SECONDS_INTR XPS_RTC_SEC_INT_ID /* Canonical definitions for SCU GIC */ #define XPAR_SCUGIC_NUM_INSTANCES 1U @@ -197,6 +199,8 @@ extern "C" { #define XPS_UART1_INT_ID (22U + 32U) #define XPS_CAN0_INT_ID (23U + 32U) #define XPS_CAN1_INT_ID (24U + 32U) +#define XPS_RTC_ALARM_INT_ID (26U + 32U) +#define XPS_RTC_SEC_INT_ID (27U + 32U) #define XPS_WDT_INT_ID (52U + 32U) #define XPS_TTC0_0_INT_ID (36U + 32U) #define XPS_TTC0_1_INT_ID (37U + 32U)