diff --git a/XilinxProcessorIPLib/drivers/v_csc/data/v_csc.mdd b/XilinxProcessorIPLib/drivers/v_csc/data/v_csc.mdd index c3aae35f..dbb32a01 100644 --- a/XilinxProcessorIPLib/drivers/v_csc/data/v_csc.mdd +++ b/XilinxProcessorIPLib/drivers/v_csc/data/v_csc.mdd @@ -11,6 +11,7 @@ BEGIN driver v_csc OPTION supported_peripherals = (v_csc_v1_0 ); OPTION driver_state = ACTIVE; + OPTION DEPENDS = (video_common_v1_1); OPTION copyfiles = all; OPTION name = v_csc; OPTION version = 1.0; diff --git a/XilinxProcessorIPLib/drivers/v_csc/data/v_csc.tcl b/XilinxProcessorIPLib/drivers/v_csc/data/v_csc.tcl index d034c583..0a0fa5ae 100644 --- a/XilinxProcessorIPLib/drivers/v_csc/data/v_csc.tcl +++ b/XilinxProcessorIPLib/drivers/v_csc/data/v_csc.tcl @@ -10,14 +10,27 @@ proc generate {drv_handle} { "NUM_INSTANCES" \ "DEVICE_ID" \ "C_S_AXI_CTRL_BASEADDR" \ - "C_S_AXI_CTRL_HIGHADDR" + "C_S_AXI_CTRL_HIGHADDR" \ + "SAMPLES_PER_CLOCK" \ + "V_CSC_MAX_WIDTH" \ + "V_CSC_MAX_HEIGHT" \ + "MAX_DATA_WIDTH" xdefine_config_file $drv_handle "xv_csc_g.c" "XV_csc" \ "DEVICE_ID" \ - "C_S_AXI_CTRL_BASEADDR" + "C_S_AXI_CTRL_BASEADDR" \ + "SAMPLES_PER_CLOCK" \ + "V_CSC_MAX_WIDTH" \ + "V_CSC_MAX_HEIGHT" \ + "MAX_DATA_WIDTH" xdefine_canonical_xpars $drv_handle "xparameters.h" "XV_csc" \ "DEVICE_ID" \ "C_S_AXI_CTRL_BASEADDR" \ - "C_S_AXI_CTRL_HIGHADDR" + "C_S_AXI_CTRL_HIGHADDR" \ + "SAMPLES_PER_CLOCK" \ + "V_CSC_MAX_WIDTH" \ + "V_CSC_MAX_HEIGHT" \ + "MAX_DATA_WIDTH" } + diff --git a/XilinxProcessorIPLib/drivers/v_csc/src/xv_csc.c b/XilinxProcessorIPLib/drivers/v_csc/src/xv_csc.c index dd6dc72a..adbcbae3 100644 --- a/XilinxProcessorIPLib/drivers/v_csc/src/xv_csc.c +++ b/XilinxProcessorIPLib/drivers/v_csc/src/xv_csc.c @@ -7,6 +7,7 @@ /***************************** Include Files *********************************/ #include "xv_csc.h" +#include "string.h" /************************** Function Implementation *************************/ #ifndef __linux__ @@ -14,6 +15,11 @@ int XV_csc_CfgInitialize(XV_csc *InstancePtr, XV_csc_Config *ConfigPtr) { Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(ConfigPtr != NULL); + /* Setup the instance */ + (void)memset((void *)InstancePtr, 0, sizeof(XV_csc)); + (void)memcpy((void *)&(InstancePtr->Config), (const void *)ConfigPtr, + sizeof(XV_csc_Config)); + InstancePtr->Ctrl_BaseAddress = ConfigPtr->Ctrl_BaseAddress; InstancePtr->IsReady = XIL_COMPONENT_IS_READY; diff --git a/XilinxProcessorIPLib/drivers/v_csc/src/xv_csc.h b/XilinxProcessorIPLib/drivers/v_csc/src/xv_csc.h index be6c6aa5..381d5d83 100644 --- a/XilinxProcessorIPLib/drivers/v_csc/src/xv_csc.h +++ b/XilinxProcessorIPLib/drivers/v_csc/src/xv_csc.h @@ -38,15 +38,28 @@ typedef uint8_t u8; typedef uint16_t u16; typedef uint32_t u32; #else +/** +* This typedef contains configuration information for the CSC core. +* Each core instance should have a configuration structure +* associated. +*/ typedef struct { - u16 DeviceId; - u32 Ctrl_BaseAddress; + u16 DeviceId; /**< Unique ID of device */ + u32 Ctrl_BaseAddress; /**< The base address of the core instance. */ + int PixPerClk; /**< Samples Per Clock supported by core instance */ + u16 MaxWidth; /**< Maximum columns supported by core instance */ + u16 MaxHeight; /**< Maximum rows supported by core instance */ + int MaxDataWidth; /**< Maximum Data width of each channel */ } XV_csc_Config; #endif +/** +* Driver instance data. An instance must be allocated for each core in use. +*/ typedef struct { - u32 Ctrl_BaseAddress; - u32 IsReady; + XV_csc_Config Config; /**< Hardware Configuration */ + u32 Ctrl_BaseAddress; /**< The base address of the core instance. */ + u32 IsReady; /**< Device is initialized and ready */ } XV_csc; /***************** Macros (Inline Functions) Definitions *********************/