From b9dc06aac8067f9ef1fd16f5aba9044373af8140 Mon Sep 17 00:00:00 2001 From: Peter Crosthwaite Date: Mon, 23 Mar 2015 22:16:24 -0700 Subject: [PATCH] qspi: Fix dummy mode in examples QSPI HW doesn't actually care what the SPI mode is for the dummy phase of flash commands. We have confirmed this with randomized testing. However due to a core limitation of QEMU it is expected to match the mode of the address phase for QEMU. So since QEMU is the only platform that cares, set the dummy mode to QEMUs expectation. Signed-off-by: Peter Crosthwaite --- .../xqspipsu_generic_flash_interrupt_example.c | 16 ++++++---------- .../xqspipsu_generic_flash_polled_example.c | 16 ++++++---------- 2 files changed, 12 insertions(+), 20 deletions(-) diff --git a/XilinxProcessorIPLib/drivers/qspipsu/examples/xqspipsu_generic_flash_interrupt_example.c b/XilinxProcessorIPLib/drivers/qspipsu/examples/xqspipsu_generic_flash_interrupt_example.c index f3bb31aa..6880a17e 100644 --- a/XilinxProcessorIPLib/drivers/qspipsu/examples/xqspipsu_generic_flash_interrupt_example.c +++ b/XilinxProcessorIPLib/drivers/qspipsu/examples/xqspipsu_generic_flash_interrupt_example.c @@ -1224,17 +1224,13 @@ int FlashRead(XQspiPsu *QspiPsuPtr, u32 Address, u32 ByteCount, u8 Command, (Command == QUAD_READ_CMD) || (Command == FAST_READ_CMD_4B) || (Command == DUAL_READ_CMD_4B) || (Command == QUAD_READ_CMD_4B)) { /* Update Dummy cycles as per flash specs for QUAD IO */ - if ((Command == FAST_READ_CMD) || (Command == FAST_READ_CMD_4B)) { - FlashMsg[1].BusWidth = XQSPIPSU_SELECT_MODE_SPI; - } - if ((Command == DUAL_READ_CMD) || (Command == DUAL_READ_CMD_4B)) { - FlashMsg[1].BusWidth = XQSPIPSU_SELECT_MODE_DUALSPI; - } - - if ((Command == QUAD_READ_CMD) || (Command == QUAD_READ_CMD_4B)) { - FlashMsg[1].BusWidth = XQSPIPSU_SELECT_MODE_QUADSPI; - } + /* + * Silicon and REMUS do not care what the SPI mode is + * for dummies, but QEMU expects it to match the address + * phase. Make it so. + */ + FlashMsg[1].BusWidth = FlashMsg[0].BusWidth; FlashMsg[1].TxBfrPtr = NULL; FlashMsg[1].RxBfrPtr = NULL; diff --git a/XilinxProcessorIPLib/drivers/qspipsu/examples/xqspipsu_generic_flash_polled_example.c b/XilinxProcessorIPLib/drivers/qspipsu/examples/xqspipsu_generic_flash_polled_example.c index 01f241fd..ac78c5da 100644 --- a/XilinxProcessorIPLib/drivers/qspipsu/examples/xqspipsu_generic_flash_polled_example.c +++ b/XilinxProcessorIPLib/drivers/qspipsu/examples/xqspipsu_generic_flash_polled_example.c @@ -1142,17 +1142,13 @@ int FlashRead(XQspiPsu *QspiPsuPtr, u32 Address, u32 ByteCount, u8 Command, (Command == QUAD_READ_CMD) || (Command == FAST_READ_CMD_4B) || (Command == DUAL_READ_CMD_4B) || (Command == QUAD_READ_CMD_4B)) { /* Update Dummy cycles as per flash specs for QUAD IO */ - if ((Command == FAST_READ_CMD) || (Command == FAST_READ_CMD_4B)) { - FlashMsg[1].BusWidth = XQSPIPSU_SELECT_MODE_SPI; - } - if ((Command == DUAL_READ_CMD) || (Command == DUAL_READ_CMD_4B)) { - FlashMsg[1].BusWidth = XQSPIPSU_SELECT_MODE_DUALSPI; - } - - if ((Command == QUAD_READ_CMD) || (Command == QUAD_READ_CMD_4B)) { - FlashMsg[1].BusWidth = XQSPIPSU_SELECT_MODE_QUADSPI; - } + /* + * Silicon and REMUS do not care what the SPI mode is + * for dummies, but QEMU expects it to match the address + * phase. Make it so. + */ + FlashMsg[1].BusWidth = FlashMsg[0].BusWidth; FlashMsg[1].TxBfrPtr = NULL; FlashMsg[1].RxBfrPtr = NULL;