diff --git a/lib/bsp/standalone/src/cortexa53/sleep.c b/lib/bsp/standalone/src/cortexa53/sleep.c
index a721fda1..35a09582 100644
--- a/lib/bsp/standalone/src/cortexa53/sleep.c
+++ b/lib/bsp/standalone/src/cortexa53/sleep.c
@@ -66,10 +66,12 @@
 s32 sleep(u32 seconds)
 {
 	XTime tEnd, tCur;
+
 	/*write 50MHz frequency to System Time Stamp Generator Register*/
-	Xil_Out32(0xFF250020U,0x02FAF080U);
+	Xil_Out32((XIOU_SCNTRS_BASEADDR + XIOU_SCNTRS_FREQ_REG_OFFSET),XIOU_SCNTRS_FREQ);
+
 	/*Enable the counter*/
-	Xil_Out32(0xFF260000U,0x00000001U);
+	Xil_Out32((XIOU_SCNTRS_BASEADDR + XIOU_SCNTRS_CNT_CNTRL_REG_OFFSET),XIOU_SCNTRS_CNT_CNTRL_REG_EN);
 
 	XTime_GetTime(&tCur);
 	tEnd  = tCur + (((XTime) seconds) * COUNTS_PER_SECOND);
@@ -79,6 +81,6 @@ s32 sleep(u32 seconds)
 	} while (tCur < tEnd);
 
 	/*Disable the counter*/
-	Xil_Out32(0xFF260000U,0x00000000U);
+	Xil_Out32((XIOU_SCNTRS_BASEADDR + XIOU_SCNTRS_CNT_CNTRL_REG_OFFSET),(~(XIOU_SCNTRS_CNT_CNTRL_REG_EN)));
 	return 0;
 }
diff --git a/lib/bsp/standalone/src/cortexa53/usleep.c b/lib/bsp/standalone/src/cortexa53/usleep.c
index 96d8cfba..d93f593e 100644
--- a/lib/bsp/standalone/src/cortexa53/usleep.c
+++ b/lib/bsp/standalone/src/cortexa53/usleep.c
@@ -73,10 +73,12 @@
 s32 usleep(u32 useconds)
 {
 	XTime tEnd, tCur;
+
 	/*write 50MHz frequency to System Time Stamp Generator Register*/
-	Xil_Out32(0xFF250020U,0x02FAF080U);
+	Xil_Out32((XIOU_SCNTRS_BASEADDR + XIOU_SCNTRS_FREQ_REG_OFFSET),XIOU_SCNTRS_FREQ);
+
 	/*Enable the counter*/
-	Xil_Out32(0xFF260000U,0x00000001U);
+	Xil_Out32((XIOU_SCNTRS_BASEADDR + XIOU_SCNTRS_CNT_CNTRL_REG_OFFSET),XIOU_SCNTRS_CNT_CNTRL_REG_EN);
 
 	XTime_GetTime(&tCur);
 	tEnd = tCur + (((XTime) useconds) * COUNTS_PER_USECOND);
@@ -86,6 +88,6 @@ s32 usleep(u32 useconds)
 	} while (tCur < tEnd);
 
 	/*Disable the counter*/
-	Xil_Out32(0xFF260000U,0x00000000U);
+	Xil_Out32((XIOU_SCNTRS_BASEADDR + XIOU_SCNTRS_CNT_CNTRL_REG_OFFSET),(~(XIOU_SCNTRS_CNT_CNTRL_REG_EN)));
 	return 0;
 }
diff --git a/lib/bsp/standalone/src/cortexa53/xtime_l.h b/lib/bsp/standalone/src/cortexa53/xtime_l.h
index c9ec7eef..86496df3 100644
--- a/lib/bsp/standalone/src/cortexa53/xtime_l.h
+++ b/lib/bsp/standalone/src/cortexa53/xtime_l.h
@@ -67,6 +67,13 @@ typedef u64 XTime;
 
 /* Global Timer is always clocked at half of the CPU frequency */
 #define COUNTS_PER_SECOND          0x007A1200U
+
+#define XIOU_SCNTRS_BASEADDR      0XFF260000U
+#define XIOU_SCNTRS_CNT_CNTRL_REG_OFFSET    0x00000000U
+#define XIOU_SCNTRS_FREQ_REG_OFFSET    0x00000020U
+#define XIOU_SCNTRS_FREQ		0x02FAF080U	/* 50 MHz */
+#define XIOU_SCNTRS_CNT_CNTRL_REG_EN    0X00000001U
+
 /************************** Variable Definitions *****************************/
 
 /************************** Function Prototypes ******************************/