diff --git a/lib/bsp/standalone/src/cortexr5/gcc/boot.S b/lib/bsp/standalone/src/cortexr5/gcc/boot.S
index 944236f4..1c52614b 100644
--- a/lib/bsp/standalone/src/cortexr5/gcc/boot.S
+++ b/lib/bsp/standalone/src/cortexr5/gcc/boot.S
@@ -108,11 +108,14 @@ OKToRun:
         mcr     p15, 0, r0, c1, c0, 0       	/* Write CP15 Control Register */
         isb                                 	/* Ensure subsequent insts execute wrt new MPU settings */
 
-/* Disable Branch prediction */
+/* Disable Branch prediction, TCM ECC checks */
         mrc     p15, 0, r0, c1, c0, 1       	/* Read ACTLR */
         orr     r0, r0, #(0x1 << 17)        	/* Enable RSDIS bit 17 to disable the return stack */
         orr     r0, r0, #(0x1 << 16)        	/* Clear BP bit 15 and set BP bit 16:*/
         bic     r0, r0, #(0x1 << 15)        	/* Branch always not taken and history table updates disabled*/
+        bic     r0, r0, #(0x1 << 27)			/* Disable B1TCM ECC check */
+        bic     r0, r0, #(0x1 << 26)			/* Disable B0TCM ECC check */
+        bic     r0, r0, #(0x1 << 25)			/* Disable ATCM ECC check */
         mcr     p15, 0, r0, c1, c0, 1       	/* Write ACTLR*/
 	dsb				    	/* Complete all outstanding explicit memory operations*/