diff --git a/XilinxProcessorIPLib/drivers/dptx/src/xdptx.c b/XilinxProcessorIPLib/drivers/dptx/src/xdptx.c
index 15fc7506..b6b42738 100644
--- a/XilinxProcessorIPLib/drivers/dptx/src/xdptx.c
+++ b/XilinxProcessorIPLib/drivers/dptx/src/xdptx.c
@@ -375,8 +375,8 @@ u32 XDptx_GetEdid(XDptx *InstancePtr, u8 *Edid)
 	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
 	Xil_AssertNonvoid(Edid != NULL);
 
-	Status = XDptx_IicRead(InstancePtr, XDPTX_EDID_ADDR, 0, XDPTX_EDID_SIZE,
-									Edid);
+	Status = XDptx_IicRead(InstancePtr, XDPTX_EDID_ADDR, 0,
+						XDPTX_EDID_BLOCK_SIZE, Edid);
 
 	return Status;
 }
@@ -845,7 +845,7 @@ u32 XDptx_IicRead(XDptx *InstancePtr, u8 IicAddress, u16 Offset,
 	NumBytesLeftInSeg = 256 - Offset;
 
 	/* Set the segment pointer to 0. */
-	Status = XDptx_IicWrite(InstancePtr, 0x30, 1, &SegPtr);
+	Status = XDptx_IicWrite(InstancePtr, XDPTX_SEGPTR_ADDR, 1, &SegPtr);
 	if (Status != XST_SUCCESS) {
 		/* The I2C write to set the segment pointer failed. */
 		return Status;
@@ -897,7 +897,8 @@ u32 XDptx_IicRead(XDptx *InstancePtr, u8 IicAddress, u16 Offset,
 			Offset %= 256;
 			NumBytesLeftInSeg = 256;
 
-			Status = XDptx_IicWrite(InstancePtr, 0x30, 1, &SegPtr);
+			Status = XDptx_IicWrite(InstancePtr, XDPTX_SEGPTR_ADDR,
+								1, &SegPtr);
 			if (Status != XST_SUCCESS) {
 				return Status;
 			}
@@ -906,7 +907,7 @@ u32 XDptx_IicRead(XDptx *InstancePtr, u8 IicAddress, u16 Offset,
 
 	/* Reset the segment pointer to 0. */
 	SegPtr = 0;
-	Status = XDptx_IicWrite(InstancePtr, 0x30, 1, &SegPtr);
+	Status = XDptx_IicWrite(InstancePtr, XDPTX_SEGPTR_ADDR, 1, &SegPtr);
 
 	return Status;
 }
diff --git a/XilinxProcessorIPLib/drivers/dptx/src/xdptx_hw.h b/XilinxProcessorIPLib/drivers/dptx/src/xdptx_hw.h
index d7cb0a33..cf6a982f 100644
--- a/XilinxProcessorIPLib/drivers/dptx/src/xdptx_hw.h
+++ b/XilinxProcessorIPLib/drivers/dptx/src/xdptx_hw.h
@@ -1102,8 +1102,9 @@
 /** @name Extended Display Identification Data: Field addresses and sizes.
   * @{
   */
+#define XDPTX_SEGPTR_ADDR				0x30
 #define XDPTX_EDID_ADDR					0x50
-#define XDPTX_EDID_SIZE					128
+#define XDPTX_EDID_BLOCK_SIZE				128
 #define XDPTX_EDID_DTD_DD(Num)				(0x36 + (18 * Num))
 #define XDPTX_EDID_PTM					XDPTX_EDID_DTD_DD(0)
 /* @} */
diff --git a/XilinxProcessorIPLib/drivers/dptx/src/xdptx_mst.c b/XilinxProcessorIPLib/drivers/dptx/src/xdptx_mst.c
index 09c0fae9..1b6a266b 100644
--- a/XilinxProcessorIPLib/drivers/dptx/src/xdptx_mst.c
+++ b/XilinxProcessorIPLib/drivers/dptx/src/xdptx_mst.c
@@ -812,7 +812,7 @@ u32 XDptx_RemoteIicRead(XDptx *InstancePtr, u8 LinkCountTotal,
 
 	/* Set the segment pointer to 0. */
 	Status = XDptx_RemoteIicWrite(InstancePtr, LinkCountTotal,
-		RelativeAddress, 0x30, 1, &SegPtr);
+		RelativeAddress, XDPTX_SEGPTR_ADDR, 1, &SegPtr);
 	if (Status != XST_SUCCESS) {
 		/* The I2C write to set the segment pointer failed. */
 		return Status;
@@ -860,8 +860,8 @@ u32 XDptx_RemoteIicRead(XDptx *InstancePtr, u8 LinkCountTotal,
 			NumBytesLeftInSeg = 256;
 
 			Status = XDptx_RemoteIicWrite(InstancePtr,
-				LinkCountTotal, RelativeAddress, 0x30, 1,
-				&SegPtr);
+				LinkCountTotal, RelativeAddress,
+				XDPTX_SEGPTR_ADDR, 1, &SegPtr);
 			if (Status != XST_SUCCESS) {
 				return Status;
 			}
@@ -871,7 +871,7 @@ u32 XDptx_RemoteIicRead(XDptx *InstancePtr, u8 LinkCountTotal,
 	/* Reset the segment pointer to 0. */
 	SegPtr = 0;
 	Status = XDptx_RemoteIicWrite(InstancePtr, LinkCountTotal,
-		RelativeAddress, 0x30, 1, &SegPtr);
+				RelativeAddress, XDPTX_SEGPTR_ADDR, 1, &SegPtr);
 
 	return Status;
 }
@@ -1920,7 +1920,8 @@ u32 XDptx_GetRemoteEdid(XDptx *InstancePtr, u8 LinkCountTotal,
 	Xil_AssertNonvoid(Edid != NULL);
 
 	Status = XDptx_RemoteIicRead(InstancePtr, LinkCountTotal,
-		RelativeAddress, XDPTX_EDID_ADDR, 0, XDPTX_EDID_SIZE, Edid);
+		RelativeAddress, XDPTX_EDID_ADDR, 0, XDPTX_EDID_BLOCK_SIZE,
+									Edid);
 
 	return Status;
 }