From cf3ea2ed035b726a340698f918f0aaf948adf1df Mon Sep 17 00:00:00 2001 From: Rohit Consul Date: Wed, 9 Sep 2015 16:44:15 -0700 Subject: [PATCH] vprocss: Add 2 sec wait to example design source files VTC in example design has switched to a slower 9MHz clock.This essentially provides < 2fps frame rate. Vidout needs 3-4 frames to acquire lock. After vpss configuration wait for 2 sec (mb_sleep) before checking for vidout lock Signed-off-by: Rohit Consul Acked-by: Andrei-Liviu Simion --- XilinxProcessorIPLib/drivers/vprocss/examples/src/main.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/XilinxProcessorIPLib/drivers/vprocss/examples/src/main.c b/XilinxProcessorIPLib/drivers/vprocss/examples/src/main.c index 6f23bb7d..026e2c8f 100644 --- a/XilinxProcessorIPLib/drivers/vprocss/examples/src/main.c +++ b/XilinxProcessorIPLib/drivers/vprocss/examples/src/main.c @@ -4,6 +4,7 @@ #include "xparameters.h" #include "system.h" #include "xvprocss_vdma.h" +#include "microblaze_sleep.h" #define XVPROCSS_SW_VER "v1.00" #define VERBOSE_MODE 0 @@ -114,8 +115,13 @@ int main(void) XPeriph_TpgDbgReportStatus(PeriphPtr); #endif + /* vtc is running at 9Mhz essentially providing < 2fps frame rate + * Need to wait for 3-4 frames (~2sec) for vidout to acquire lock + */ xil_printf("\r\nWaiting for output to lock: "); + MB_Sleep(2000); + /* check for output lock */ Timeout = VIDEO_MONITOR_LOCK_TIMEOUT; while(!Lock && Timeout) {