diff --git a/XilinxProcessorIPLib/drivers/enhance/data/enhance.mdd b/XilinxProcessorIPLib/drivers/enhance/data/enhance.mdd index 2eabfa17..ed378a08 100755 --- a/XilinxProcessorIPLib/drivers/enhance/data/enhance.mdd +++ b/XilinxProcessorIPLib/drivers/enhance/data/enhance.mdd @@ -1,45 +1,43 @@ -############################################################################### -# -# Copyright (C) 2009 - 2014 Xilinx, Inc. All rights reserved. -# -# Permission is hereby granted, free of charge, to any person obtaining a copy -# of this software and associated documentation files (the "Software"), to deal -# in the Software without restriction, including without limitation the rights -# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -# copies of the Software, and to permit persons to whom the Software is -# furnished to do so, subject to the following conditions: -# -# The above copyright notice and this permission notice shall be included in -# all copies or substantial portions of the Software. -# -# Use of the Software is limited solely to applications: -# (a) running on a Xilinx device, or -# (b) that interact with a Xilinx device through a bus or interconnect. -# -# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -# XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, -# WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF -# OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE -# SOFTWARE. -# -# Except as contained in this notice, the name of the Xilinx shall not be used -# in advertising or otherwise to promote the sale, use or other dealings in -# this Software without prior written authorization from Xilinx. -# -############################################################################### - -OPTION psf_version = 2.1; - -BEGIN driver enhance - - OPTION supported_peripherals = (v_enhance_v[8]_[0-9]); - OPTION driver_state = ACTIVE; - OPTION copyfiles = all; - OPTION VERSION = 7.0; - OPTION NAME = enhance; - -END driver - - +############################################################################## +# +# Copyright (C) 2009 - 2014 Xilinx, Inc. All rights reserved. +# +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"),to deal +# in the Software without restriction, including without limitation the rights +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +# copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# Use of the Software is limited solely to applications: +# (a) running on a Xilinx device, or +# (b) that interact with a Xilinx device through a bus or interconnect. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +# XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +# WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +# OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +# SOFTWARE. +# +# Except as contained in this notice, the name of the Xilinx shall not be used +# in advertising or otherwise to promote the sale, use or other dealings in +# this Software without prior written authorization from Xilinx. +############################################################################### +OPTION psf_version = 2.1; + +BEGIN driver enhance + + OPTION supported_peripherals = (v_enhance_v[8]_[0-9]); + OPTION driver_state = ACTIVE; + OPTION copyfiles = all; + OPTION VERSION = 7.0; + OPTION NAME = enhance; + +END driver + + diff --git a/XilinxProcessorIPLib/drivers/enhance/data/enhance.tcl b/XilinxProcessorIPLib/drivers/enhance/data/enhance.tcl index 85953323..cbafc450 100755 --- a/XilinxProcessorIPLib/drivers/enhance/data/enhance.tcl +++ b/XilinxProcessorIPLib/drivers/enhance/data/enhance.tcl @@ -1,37 +1,37 @@ -############################################################################### -# -# Copyright (C) 2009 - 2014 Xilinx, Inc. All rights reserved. -# -# Permission is hereby granted, free of charge, to any person obtaining a copy -# of this software and associated documentation files (the "Software"), to deal -# in the Software without restriction, including without limitation the rights -# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -# copies of the Software, and to permit persons to whom the Software is -# furnished to do so, subject to the following conditions: -# -# The above copyright notice and this permission notice shall be included in -# all copies or substantial portions of the Software. -# -# Use of the Software is limited solely to applications: -# (a) running on a Xilinx device, or -# (b) that interact with a Xilinx device through a bus or interconnect. -# -# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -# XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, -# WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF -# OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE -# SOFTWARE. -# -# Except as contained in this notice, the name of the Xilinx shall not be used -# in advertising or otherwise to promote the sale, use or other dealings in -# this Software without prior written authorization from Xilinx. -# -############################################################################### - -proc generate {drv_handle} { - xdefine_include_file $drv_handle "xparameters.h" "ENHANCE" "NUM_INSTANCES" "C_BASEADDR" "C_HIGHADDR" "DEVICE_ID" "C_S_AXIS_VIDEO_DATA_WIDTH" "C_S_AXIS_VIDEO_FORMAT" "C_S_AXIS_VIDEO_TDATA_WIDTH" "C_M_AXIS_VIDEO_DATA_WIDTH" "C_M_AXIS_VIDEO_FORMAT" "C_M_AXIS_VIDEO_TDATA_WIDTH" "C_HAS_AXI4_LITE" "C_HAS_DEBUG" "C_HAS_INTC_IF" "C_MAX_COLS" "C_ACTIVE_COLS" "C_ACTIVE_ROWS" "C_HAS_NOISE" "C_HAS_ENHANCE" "C_HAS_HALO" "C_HAS_ALIAS" "C_OPT_SIZE" "C_NOISE_THRESHOLD" "C_ENHANCE_STRENGTH" "C_HALO_SUPPRESS" - xdefine_canonical_xpars $drv_handle "xparameters.h" "ENHANCE" "DEVICE_ID" "C_BASEADDR" "C_HIGHADDR" "C_S_AXIS_VIDEO_DATA_WIDTH" "C_S_AXIS_VIDEO_FORMAT" "C_S_AXIS_VIDEO_TDATA_WIDTH" "C_M_AXIS_VIDEO_DATA_WIDTH" "C_M_AXIS_VIDEO_FORMAT" "C_M_AXIS_VIDEO_TDATA_WIDTH" "C_HAS_AXI4_LITE" "C_HAS_DEBUG" "C_HAS_INTC_IF" "C_MAX_COLS" "C_ACTIVE_COLS" "C_ACTIVE_ROWS" "C_HAS_NOISE" "C_HAS_ENHANCE" "C_HAS_HALO" "C_HAS_ALIAS" "C_OPT_SIZE" "C_NOISE_THRESHOLD" "C_ENHANCE_STRENGTH" "C_HALO_SUPPRESS" -} - +############################################################################## +# +# Copyright (C) 2009 - 2014 Xilinx, Inc. All rights reserved. +# +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"),to deal +# in the Software without restriction, including without limitation the rights +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +# copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# Use of the Software is limited solely to applications: +# (a) running on a Xilinx device, or +# (b) that interact with a Xilinx device through a bus or interconnect. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +# XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +# WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +# OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +# SOFTWARE. +# +# Except as contained in this notice, the name of the Xilinx shall not be used +# in advertising or otherwise to promote the sale, use or other dealings in +# this Software without prior written authorization from Xilinx. +############################################################################### + +proc generate {drv_handle} { + xdefine_include_file $drv_handle "xparameters.h" "ENHANCE" "NUM_INSTANCES" "DEVICE_ID" "C_BASEADDR" "C_HIGHADDR" "C_S_AXIS_VIDEO_FORMAT" "C_M_AXIS_VIDEO_FORMAT" "C_HAS_AXI4_LITE" "C_HAS_INTC_IF" "C_HAS_DEBUG" "C_MAX_COLS" "C_ACTIVE_COLS" "C_ACTIVE_ROWS" "C_HAS_NOISE" "C_HAS_ENHANCE" "C_HAS_HALO" "C_HAS_ALIAS" "C_OPT_SIZE" "C_NOISE_THRESHOLD" "C_ENHANCE_STRENGTH" "C_HALO_SUPPRESS" + xdefine_config_file $drv_handle "xenhance_g.c" "XEnhance" "DEVICE_ID" "C_BASEADDR" "C_S_AXIS_VIDEO_FORMAT" "C_M_AXIS_VIDEO_FORMAT" "C_HAS_INTC_IF" "C_HAS_DEBUG" "C_MAX_COLS" "C_ACTIVE_COLS" "C_ACTIVE_ROWS" "C_HAS_NOISE" "C_HAS_ENHANCE" "C_HAS_HALO" "C_HAS_ALIAS" "C_OPT_SIZE" "C_NOISE_THRESHOLD" "C_ENHANCE_STRENGTH" "C_HALO_SUPPRESS" + xdefine_canonical_xpars $drv_handle "xparameters.h" "ENHANCE" "DEVICE_ID" "C_BASEADDR" "C_HIGHADDR" "C_S_AXIS_VIDEO_FORMAT" "C_M_AXIS_VIDEO_FORMAT" "C_HAS_INTC_IF" "C_HAS_DEBUG" "C_MAX_COLS" "C_ACTIVE_COLS" "C_ACTIVE_ROWS" "C_HAS_NOISE" "C_HAS_ENHANCE" "C_HAS_HALO" "C_HAS_ALIAS" "C_OPT_SIZE" "C_NOISE_THRESHOLD" "C_ENHANCE_STRENGTH" "C_HALO_SUPPRESS" +} + diff --git a/XilinxProcessorIPLib/drivers/enhance/examples/enhance_selftest_example.c b/XilinxProcessorIPLib/drivers/enhance/examples/enhance_selftest_example.c new file mode 100755 index 00000000..5ac6bb8c --- /dev/null +++ b/XilinxProcessorIPLib/drivers/enhance/examples/enhance_selftest_example.c @@ -0,0 +1,161 @@ +/****************************************************************************** +* +* (c) Copyright 2010-14 Xilinx, Inc. All rights reserved. +* +* This file contains confidential and proprietary information of Xilinx, Inc. +* and is protected under U.S. and international copyright and other +* intellectual property laws. +* +* DISCLAIMER +* This disclaimer is not a license and does not grant any rights to the +* materials distributed herewith. Except as otherwise provided in a valid +* license issued to you by Xilinx, and to the maximum extent permitted by +* applicable law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND WITH ALL +* FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES AND CONDITIONS, EXPRESS, +* IMPLIED, OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF +* MERCHANTABILITY, NON-INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE +* and (2) Xilinx shall not be liable (whether in contract or tort, including +* negligence, or under any other theory of liability) for any loss or damage +* of any kind or nature related to, arising under or in connection with these +* materials, including for any direct, or any indirect, special, incidental, +* or consequential loss or damage (including loss of data, profits, goodwill, +* or any type of loss or damage suffered as a result of any action brought by +* a third party) even if such damage or loss was reasonably foreseeable or +* Xilinx had been advised of the possibility of the same. +* +* CRITICAL APPLICATIONS +* Xilinx products are not designed or intended to be fail-safe, or for use in +* any application requiring fail-safe performance, such as life-support or +* safety devices or systems, Class III medical devices, nuclear facilities, +* applications related to the deployment of airbags, or any other applications +* that could lead to death, personal injury, or severe property or +* environmental damage (individually and collectively, "Critical +* Applications"). Customer assumes the sole risk and liability of any use of +* Xilinx products in Critical Applications, subject only to applicable laws +* and regulations governing limitations on product liability. +* +* THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS PART OF THIS FILE +* AT ALL TIMES. +* +******************************************************************************/ +/*****************************************************************************/ +/** +* +* @file enhance_selftest_example.c +* +* This file contains an example using the XEnhance driver to do self test +* on the device. +* +* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who    Date     Changes
+* ----- ------ -------- -----------------------------------------------
+* 1.00a drg/jz 01/13/10 First Release
+* 1.03a  sg    08/14/12 Updated the example for CR 666306. Modified
+*		     	the device ID to use the first Device Id
+*			Removed the printf at the start of the main
+* 7.0   adk    02/19/14 Modified function names as per guidelines
+*
+* +******************************************************************************/ + +/***************************** Include Files *********************************/ + +#include "xenhance.h" +#include "xparameters.h" +#include "xil_printf.h" + +/************************** Constant Definitions *****************************/ +/* + * The following constants map to the XPAR parameters created in the + * xparameters.h file. They are defined here such that a user can easily + * change all the needed parameters in one place. + */ +/**************************** Type Definitions *******************************/ + + +/***************** Macros (Inline Functions) Definitions *********************/ + + +/************************** Function Prototypes ******************************/ + +u32 XEnhanceSelfTestExample(u16 DeviceId); + +/************************** Variable Definitions *****************************/ + +XEnhance InstancePtr; /**< Instance of the Enhance Device */ + +/*****************************************************************************/ +/** +* +* Main function to call the example. +* +* @return XST_SUCCESS if successful, otherwise XST_FAILURE. +* +* @note None. +* +******************************************************************************/ +int main(void) +{ + u32 Status; + + /* + * Run the selftest example + */ + Status = XEnhanceSelfTestExample((u16)XPAR_ENHANCE_0_DEVICE_ID); + if (Status != XST_SUCCESS) { + xil_printf("ENHANCE Selftest Example Failed\r\n"); + return XST_FAILURE; + } + + xil_printf("Successfully ran ENHANCE Selftest Example\r\n"); + + return XST_SUCCESS; +} + +/*****************************************************************************/ +/** +* +* This function does a minimal test on the XEnhance driver. +* +* +* @param DeviceId is the XPAR__DEVICE_ID value from +* xparameters.h. +* +* @return XST_SUCCESS if successful, otherwise XST_FAILURE. +* +* @note None. +* +******************************************************************************/ +u32 XEnhanceSelfTestExample(u16 DeviceId) +{ + u32 Status; + XEnhance_Config *Config; + + /* + * Initialize the ENHANCE driver so that it's ready to use + * Look up the configuration in the config table, + * then initialize it. + */ + Config = XEnhance_LookupConfig(DeviceId); + if (NULL == Config) { + return XST_FAILURE; + } + + Status = XEnhance_CfgInitialize(&InstancePtr, Config, + Config->BaseAddress); + if (Status != (u32)XST_SUCCESS) { + return (u32)XST_FAILURE; + } + + /* + * Perform a self-test to check hardware build. + */ + Status = XEnhance_SelfTest(&InstancePtr); + if (Status != (u32)XST_SUCCESS) { + return (u32)XST_FAILURE; + } + + return XST_SUCCESS; +} diff --git a/XilinxProcessorIPLib/drivers/enhance/examples/example.c b/XilinxProcessorIPLib/drivers/enhance/examples/example.c deleted file mode 100755 index 47991e65..00000000 --- a/XilinxProcessorIPLib/drivers/enhance/examples/example.c +++ /dev/null @@ -1,152 +0,0 @@ -/****************************************************************************** -* (c) Copyright 2009-2013 Xilinx, Inc. All rights reserved. -* -* This file contains confidential and proprietary information -* of Xilinx, Inc. and is protected under U.S. and -* international copyright and other intellectual property -* laws. -* -* DISCLAIMER -* This disclaimer is not a license and does not grant any -* rights to the materials distributed herewith. Except as -* otherwise provided in a valid license issued to you by -* Xilinx, and to the maximum extent permitted by applicable -* law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND -* WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES -* AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING -* BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- -* INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and -* (2) Xilinx shall not be liable (whether in contract or tort, -* including negligence, or under any other theory of -* liability) for any loss or damage of any kind or nature -* related to, arising under or in connection with these -* materials, including for any direct, or any indirect, -* special, incidental, or consequential loss or damage -* (including loss of data, profits, goodwill, or any type of -* loss or damage suffered as a result of any action brought -* by a third party) even if such damage or loss was -* reasonably foreseeable or Xilinx had been advised of the -* possibility of the same. -* -* CRITICAL APPLICATIONS -* Xilinx products are not designed or intended to be fail- -* safe, or for use in any application requiring fail-safe -* performance, such as life-support or safety devices or -* systems, Class III medical devices, nuclear facilities, -* applications related to the deployment of airbags, or any -* other applications that could lead to death, personal -* injury, or severe property or environmental damage -* (individually and collectively, "Critical -* Applications"). Customer assumes the sole risk and -* liability of any use of Xilinx products in Critical -* Applications, subject only to applicable laws and -* regulations governing limitations on product liability. -* -* THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS -* PART OF THIS FILE AT ALL TIMES. -******************************************************************************/ - -/*****************************************************************************/ -/** - * - * @file example.c - * - * This file demonstrates how to use Xilinx Image Enhancement (Enhance) - * driver of the Xilinx Image Enhancement core. This code does not - * cover the Enhance setup and any other configuration which might be - * required to get the Enhance device working properly. - * - * 
- * MODIFICATION HISTORY:
- *
- * Ver   Who  Date     Changes
- * ----- ---- -------- -------------------------------------------------------
- * 5.00a vc   06/19/13 Updated for new edge enhancement and noise reduction algorithms and registers
- * 4.00a vc   12/18/12 Updated for new gain quantization levels
- * 4.00a vc   10/16/12 Switched from Xuint32 to u32
- *                     Renamed example function to main()
- *                     Renamed reference to XPAR_ENHANCE_0_BASEADDR
- * 4.00a vc   04/24/12 Updated for v4.00.a
- * 2.00a vc   12/14/10 First release
- *
- * - * *************************************************************************** - */ - -#include "enhance.h" -#include "xparameters.h" - -/***************************************************************************/ -// Image Enhancement Register Reading Example -// This function provides an example of how to read the current configuration -// settings of the Enhance core. -/***************************************************************************/ -void report_enhance_settings(u32 BaseAddress) { - - xil_printf("Image Edge Enhancement Core Configuration:\r\n"); - xil_printf(" Enhance Version: 0x%08x\r\n", ENHANCE_ReadReg(BaseAddress, ENHANCE_VERSION)); - xil_printf(" Enhance Enable Bit: %1d\r\n", ENHANCE_ReadReg(BaseAddress, ENHANCE_CONTROL) & ENHANCE_CTL_EN_MASK); - xil_printf(" Enhance Register Update Bit: %1d\r\n", (ENHANCE_ReadReg(BaseAddress, ENHANCE_CONTROL) & ENHANCE_CTL_RU_MASK) >> 1); - xil_printf(" Enhance Reset Bit: %1d\r\n", (ENHANCE_ReadReg(BaseAddress, ENHANCE_CONTROL) & ENHANCE_CTL_RESET) >> 31); - xil_printf(" Enhance AutoReset Bit: %1d\r\n", (ENHANCE_ReadReg(BaseAddress, ENHANCE_CONTROL) & ENHANCE_CTL_AUTORESET) >> 30); - xil_printf(" Active Columns=%d, Active Rows=%d\r\n", - ENHANCE_ReadReg(BaseAddress, ENHANCE_ACTIVE_SIZE)&0x0000FFFF, - ENHANCE_ReadReg(BaseAddress, ENHANCE_ACTIVE_SIZE)>>16); - xil_printf(" Noise Threshold=%d, Enhance Strength=%d, Halo Suppression=%d\r\n", - ENHANCE_ReadReg(BaseAddress, ENHANCE_NOISE_THRESHOLD), - ENHANCE_ReadReg(BaseAddress, ENHANCE_ENHANCE_STRENGTH), - ENHANCE_ReadReg(BaseAddress, ENHANCE_HALO_SUPPRESS)); -} - -/***************************************************************************/ -// Image Enhancement Register Update Example -// This function provides an example of the process used to update -// the noise, enhance, and halo registers in the Enhance core. -// In most video systems, it is expected that this process would be executed -// in response to an interrupt connected to the SOF video timing signal -// or a timeout signal associated with a watchdog timer. -/***************************************************************************/ -void ENHANCE_Update_Example(u32 BaseAddress) { - - //Enable the Enhance software enable - ENHANCE_Enable(BaseAddress); - - //Disable register updates. - //This is the default operating mode for the Enhance core, and allows - //registers to be updated without effecting the core's behavior. - ENHANCE_RegUpdateDisable(BaseAddress); - - //Set the noise threshold - // These values are integers in the range: [0, 2^DATA_WIDTH-1] - ENHANCE_WriteReg(BaseAddress, ENHANCE_NOISE_THRESHOLD, 255); //maximum value for 8 bit data - - //Set the enhance strength and halo suppression factor - // These values are floating point values in the range: [0, 1] - // These are represented as integers by multiplying by 2^15, - // resulting in an integer value in the range from [0, 32728] - ENHANCE_WriteReg(BaseAddress, ENHANCE_ENHANCE_STRENGTH, 32768); //maximum value - ENHANCE_WriteReg(BaseAddress, ENHANCE_HALO_SUPPRESS, 32768); //maximum value - - //Enable register updates. - //This mode will cause the active size and noise, enhance, halo registers internal - //to the Enhance core to automatically be updated on the next SOF - ENHANCE_RegUpdateEnable(BaseAddress); - -} - - -/*****************************************************************************/ -// -// This is the main function for the Enhance example. -// -/*****************************************************************************/ -int main(void) -{ - //Print the current settings for the Enhance core - report_enhance_settings(XPAR_ENHANCE_0_BASEADDR); - - //Call the Enhance example, specify the Device ID generated in xparameters.h - ENHANCE_Update_Example(XPAR_ENHANCE_0_BASEADDR); - - return 0; -} diff --git a/XilinxProcessorIPLib/drivers/enhance/examples/index.html b/XilinxProcessorIPLib/drivers/enhance/examples/index.html index 54729c5b..f7b975f7 100755 --- a/XilinxProcessorIPLib/drivers/enhance/examples/index.html +++ b/XilinxProcessorIPLib/drivers/enhance/examples/index.html @@ -1,17 +1,18 @@ - - - - - -Driver example applications - - - -

Example Applications for the driver enhance_v6_0

-
- -

Copyright � 1995-2014 Xilinx, Inc. All rights reserved.

- - \ No newline at end of file + + + + + +Driver example applications + + + +

Example Applications for the driver enhance_v7_0

+
+ +

Copyright ? 1995-2014 Xilinx, Inc. All rights reserved.

+ + + diff --git a/XilinxProcessorIPLib/drivers/enhance/src/Makefile b/XilinxProcessorIPLib/drivers/enhance/src/Makefile index 36194c11..059349eb 100755 --- a/XilinxProcessorIPLib/drivers/enhance/src/Makefile +++ b/XilinxProcessorIPLib/drivers/enhance/src/Makefile @@ -1,29 +1,29 @@ -COMPILER= -ARCHIVER= -CP=cp -COMPILER_FLAGS= -EXTRA_COMPILER_FLAGS= -LIB=libxil.a -LEVEL=0 - -RELEASEDIR=../../../lib -INCLUDEDIR=../../../include -INCLUDES=-I./. -I${INCLUDEDIR} - -INCLUDEFILES=*.h -LIBSOURCES=*.c - -OUTS = *.o - -libs: - echo "Compiling enhance" - $(COMPILER) $(COMPILER_FLAGS) $(EXTRA_COMPILER_FLAGS) $(INCLUDES) $(LIBSOURCES) - $(ARCHIVER) -r ${RELEASEDIR}/${LIB} ${OUTS} - make clean - -include: - ${CP} $(INCLUDEFILES) $(INCLUDEDIR) - -clean: - rm -rf ${OUTS} - +COMPILER= +ARCHIVER= +CP=cp +COMPILER_FLAGS= +EXTRA_COMPILER_FLAGS= +LIB=libxil.a +LEVEL=0 + +RELEASEDIR=../../../lib +INCLUDEDIR=../../../include +INCLUDES=-I./. -I${INCLUDEDIR} + +INCLUDEFILES=*.h +LIBSOURCES=*.c + +OUTS = *.o + +libs: + echo "Compiling enhance" + $(COMPILER) $(COMPILER_FLAGS) $(EXTRA_COMPILER_FLAGS) $(INCLUDES) $(LIBSOURCES) + $(ARCHIVER) -r ${RELEASEDIR}/${LIB} ${OUTS} + make clean + +include: + ${CP} $(INCLUDEFILES) $(INCLUDEDIR) + +clean: + rm -rf ${OUTS} + diff --git a/XilinxProcessorIPLib/drivers/enhance/src/enhance.h b/XilinxProcessorIPLib/drivers/enhance/src/enhance.h deleted file mode 100755 index 23d12a89..00000000 --- a/XilinxProcessorIPLib/drivers/enhance/src/enhance.h +++ /dev/null @@ -1,277 +0,0 @@ -/****************************************************************************** -* -* Copyright (C) 2009 - 2014 Xilinx, Inc. All rights reserved. -* -* Permission is hereby granted, free of charge, to any person obtaining a copy -* of this software and associated documentation files (the "Software"), to deal -* in the Software without restriction, including without limitation the rights -* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -* copies of the Software, and to permit persons to whom the Software is -* furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in -* all copies or substantial portions of the Software. -* -* Use of the Software is limited solely to applications: -* (a) running on a Xilinx device, or -* (b) that interact with a Xilinx device through a bus or interconnect. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, -* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF -* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE -* SOFTWARE. -* -* Except as contained in this notice, the name of the Xilinx shall not be used -* in advertising or otherwise to promote the sale, use or other dealings in -* this Software without prior written authorization from Xilinx. -* -******************************************************************************/ -/** -* -* @file enhance.h -* -* This header file contains identifiers and register-level driver functions (or -* macros) that can be used to access the Xilinx Image Enhancement core instance. -* -* MODIFICATION HISTORY: -* -* Ver Who Date Changes -* ----- ---- -------- ------------------------------------------------------- -* 5.00a vyc 06/19/13 Updated for ENHANCE V8.0 -* New edge enhancement algorithm and registers -* Noise reduction support added -* 4.00a vyc 04/24/12 Updated for ENHANCE V4.00.a -* Converted from xio.h to xil_io.h, translating -* basic type, MB cache functions, exceptions and -* assertion to xil_io format. -* 3.00a rc 09/11/11 Updated for ENHANCE V3.0 -* 2.00a vc 12/14/10 Updated for ENHANCE V2.0 -* 6.0 adk 19/12/13 Updated as per the New Tcl API's -* -******************************************************************************/ - -#ifndef ENHANCE_DRIVER_H /* prevent circular inclusions */ -#define ENHANCE_DRIVER_H /* by using protection macros */ - -#ifdef __cplusplus -extern "C" { -#endif - -/***************************** Include Files *********************************/ - -#include "xil_io.h" - -/************************** Constant Definitions *****************************/ - -/** - * Register Offsets - */ -/* General Control Registers */ -#define ENHANCE_CONTROL 0x0000 /**< Control */ -#define ENHANCE_STATUS 0x0004 /**< Status */ -#define ENHANCE_ERROR 0x0008 /**< Error */ -#define ENHANCE_IRQ_ENABLE 0x000C /**< IRQ Enable */ -#define ENHANCE_VERSION 0x0010 /**< Version */ -#define ENHANCE_SYSDEBUG0 0x0014 /**< System Debug 0 */ -#define ENHANCE_SYSDEBUG1 0x0018 /**< System Debug 1 */ -#define ENHANCE_SYSDEBUG2 0x001C /**< System Debug 2 */ -/* Timing Control Registers */ -#define ENHANCE_ACTIVE_SIZE 0x0020 /**< Horizontal and Vertical Active Frame Size */ -/* Core Specific Registers */ -#define ENHANCE_NOISE_THRESHOLD 0x0100 /**< Noise Reduction Control */ -#define ENHANCE_ENHANCE_STRENGTH 0x0104 /**< Edge Enhancement Control */ -#define ENHANCE_HALO_SUPPRESS 0x0108 /**< Halo Suppression Control */ - - -/*****************************************************************************/ -/** - * Control Register bit definition - */ -#define ENHANCE_CTL_EN_MASK 0x00000001 /**< Enable */ -#define ENHANCE_CTL_RU_MASK 0x00000002 /**< Register Update */ -#define ENHANCE_CTL_AUTORESET 0x40000000 /**< Software Reset - Auto-synchronize to SOF */ -#define ENHANCE_CTL_RESET 0x80000000 /**< Software Reset - Instantaneous */ - -/***************** Macros (Inline Functions) Definitions *********************/ -#define ENHANCE_In32 Xil_In32 -#define ENHANCE_Out32 Xil_Out32 - -/*****************************************************************************/ -/** -* -* Read the given register. -* -* @param BaseAddress is the Xilinx base address of the Image Enhancement core (from xparameters.h) -* @param RegOffset is the register offset of the register (defined at top of this file) -* -* @return The 32-bit value of the register -* -* @note -* C-style signature: -* u32 ENHANCE_ReadReg(u32 BaseAddress, u32 RegOffset) -* -******************************************************************************/ -#define ENHANCE_ReadReg(BaseAddress, RegOffset) \ - ENHANCE_In32((BaseAddress) + (RegOffset)) - -/*****************************************************************************/ -/** -* -* Write the given register. -* -* @param BaseAddress is the Xilinx base address of the Image Enhancement core (from xparameters.h) -* @param RegOffset is the register offset of the register (defined at top of this file) -* @param Data is the 32-bit value to write to the register -* -* @return None. -* -* @note -* C-style signature: -* void ENHANCE_WriteReg(u32 BaseAddress, u32 RegOffset, u32 Data) -* -******************************************************************************/ -#define ENHANCE_WriteReg(BaseAddress, RegOffset, Data) \ - ENHANCE_Out32((BaseAddress) + (RegOffset), (Data)) - -/*****************************************************************************/ -/** -* -* This macro enables a Image Enhancement core instance. -* -* @param BaseAddress is the Xilinx base address of the Image Enhancement core (from xparameters.h) -* -* @return None. -* -* @note -* C-style signature: -* void ENHANCE_Enable(u32 BaseAddress); -* -******************************************************************************/ -#define ENHANCE_Enable(BaseAddress) \ - ENHANCE_WriteReg(BaseAddress, ENHANCE_CONTROL, \ - ENHANCE_ReadReg(BaseAddress, ENHANCE_CONTROL) | \ - ENHANCE_CTL_EN_MASK) - -/*****************************************************************************/ -/** -* -* This macro disables a Image Enhancement core instance. -* -* @param BaseAddress is the Xilinx base address of the Image Enhancement core (from xparameters.h) -* -* @return None. -* -* @note -* C-style signature: -* void ENHANCE_Disable(u32 BaseAddress); -* -******************************************************************************/ -#define ENHANCE_Disable(BaseAddress) \ - ENHANCE_WriteReg(BaseAddress, ENHANCE_CONTROL, \ - ENHANCE_ReadReg(BaseAddress, ENHANCE_CONTROL) & \ - ~ENHANCE_CTL_EN_MASK) - -/*****************************************************************************/ -/** -* -* This macro commits all the register value changes made so far by the software -* to the Image Enhancement core instance. The registers will be automatically updated -* on the next rising-edge of the SOF signal on the core. -* It is up to the user to manually disable the register update after a sufficient -* amount of time. -* -* This function only works when the Image Enhancement core is enabled. -* -* @param BaseAddress is the Xilinx base address of the Image Enhancement core (from xparameters.h) -* -* @return None. -* -* @note -* C-style signature: -* void ENHANCE_RegUpdateEnable(u32 BaseAddress); -* -******************************************************************************/ -#define ENHANCE_RegUpdateEnable(BaseAddress) \ - ENHANCE_WriteReg(BaseAddress, ENHANCE_CONTROL, \ - ENHANCE_ReadReg(BaseAddress, ENHANCE_CONTROL) | \ - ENHANCE_CTL_RU_MASK) - -/*****************************************************************************/ -/** -* -* This macro prevents the Image Enhancement core instance from committing recent changes made -* so far by the software. When disabled, changes to other configuration registers -* are stored, but do not effect the behavior of the core. -* -* This function only works when the Image Enhancement core is enabled. -* -* @param BaseAddress is the Xilinx base address of the Image Enhancement core (from xparameters.h) -* -* @return None. -* -* @note -* C-style signature: -* void ENHANCE_RegUpdateDisable(u32 BaseAddress); -* -******************************************************************************/ -#define ENHANCE_RegUpdateDisable(BaseAddress) \ - ENHANCE_WriteReg(BaseAddress, ENHANCE_CONTROL, \ - ENHANCE_ReadReg(BaseAddress, ENHANCE_CONTROL) & \ - ~ENHANCE_CTL_RU_MASK) - -/*****************************************************************************/ - -/** -* -* This macro resets a Image Enhancement core instance. This reset effects the core immediately, -* and may cause image tearing. -* -* This reset resets the Image Enhancement's configuration registers. -* -* -* @param BaseAddress is the Xilinx base address of the Image Enhancement core (from xparameters.h) -* -* @return None. -* -* @note -* C-style signature: -* void ENHANCE_Reset(u32 BaseAddress); -* -******************************************************************************/ -#define ENHANCE_Reset(BaseAddress) \ - ENHANCE_WriteReg(BaseAddress, ENHANCE_CONTROL, ENHANCE_CTL_RESET) \ - -/*****************************************************************************/ -/** -* -* This macro resets a Image Enhancement core instance, but differs from ENHANCE_Reset() in that it -* automatically synchronizes to the SOF input of the core to prevent tearing. -* -* On the next SOF following a call to ENHANCE_AutoSyncReset(), -* all of the core's configuration registers and outputs will be reset, then the -* reset flag will be immediately released, allowing the core to immediately resume -* default operation. -* -* @param BaseAddress is the Xilinx base address of the Image Enhancement core (from xparameters.h) -* -* @return None. -* -* @note -* C-style signature: -* void ENHANCE_AutoSyncReset(u32 BaseAddress); -* -******************************************************************************/ -#define ENHANCE_AutoSyncReset(BaseAddress) \ - ENHANCE_WriteReg(BaseAddress, ENHANCE_CONTROL, ENHANCE_CTL_AUTORESET) \ - - -/************************** Function Prototypes ******************************/ - -#ifdef __cplusplus -} -#endif - -#endif /* end of protection macro */ diff --git a/XilinxProcessorIPLib/drivers/enhance/src/xenhance.c b/XilinxProcessorIPLib/drivers/enhance/src/xenhance.c new file mode 100755 index 00000000..040f0c93 --- /dev/null +++ b/XilinxProcessorIPLib/drivers/enhance/src/xenhance.c @@ -0,0 +1,749 @@ +/****************************************************************************** +* +* Copyright (C) 2009 - 2014 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +* (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in +* this Software without prior written authorization from Xilinx. +* +******************************************************************************/ +/*****************************************************************************/ +/** +* +* @file xenhance.c +* +* This file contains the implementation of the interface functions for +* Enhance core. Refer to the header file xenhance.h for more detailed +* information. +* +* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- --- -------- ---------------------------------------------------
+* 2.00a vc  12/14/10 Updated for ENHANCE V2.0
+* 3.00a rc  09/11/11 Updated for ENHANCE V3.0
+* 4.00a vyc 04/24/12 Updated for ENHANCE V4.00.a
+*                    Converted from xio.h to xil_io.h, translating
+*                    basic type, MB cache functions, exceptions and
+*                    assertion to xil_io format.
+* 5.00a vyc 06/19/13 Updated for ENHANCE V8.0
+*                    New edge enhancement algorithm and registers
+*                    Noise reduction support added
+* 6.0   adk 19/12/13 Updated as per the New Tcl API's
+* 7.0   adk 02/19/14 Changed the filename from enhance.c to xenhance.c.
+*                    Modified the following functions
+*                    XENHANCE_CfgInitialize -> XEnhance_CfgInitialize
+*                    XENHANCE_Setup -> XEnhance_Setup
+*
+*                    Implemented the following functions:
+*                    XEnhance_GetVersion, XEnhance_EnableDbgByPass
+*                    XEnhance_IsDbgByPassEnabled, XEnhance_DisableDbgBypass
+*                    XEnhance_EnableDbgTestPattern,
+*                    XEnhance_IsDbgTestPatternEnabled
+*                    XEnhance_DisableDbgTestPattern
+*                    XEnhance_GetDbgFrameCount, XEnhance_GetDbgLineCount,
+*                    XEnhance_GetDbgPixelCount, XEnhance_SetActiveSize,
+*                    XEnhance_GetActiveSize, XEnhance_SetNoiseThreshold,
+*                    XEnhance_GetNoiseThreshold, XEnhance_SetEdgeStrength,
+*                    XEnhance_GetEdgeStrength, XEnhance_SetHaloSuppress
+*                    XEnhance_GetHaloSuppress.
+*
+* +******************************************************************************/ + +/***************************** Include Files *********************************/ + +#include "xenhance.h" + +/************************** Constant Definitions *****************************/ + + +/***************** Macros (Inline Functions) Definitions *********************/ + + +/**************************** Type Definitions *******************************/ + + +/************************** Function Prototypes ******************************/ + +static void StubErrCallBack(void *CallBackRef, u32 ErrorMask); +static void StubCallBack(void *CallBackRef); + +/************************** Variable Definitions *****************************/ + + +/************************** Function Definitions *****************************/ + +/****************************************************************************/ +/** +* +* This function initializes a Enhance core. This function must be called +* prior to using a Enhance core. Initialization of a Enhance includes +* setting up the instance data, and ensuring the hardware is in a quiescent +* state. +* +* @param InstancePtr is a pointer to XEnhance instance to be worked on. +* @param CfgPtr is a reference to a configuration structure +* containing information about the Enhance core. +* @param EffectiveAddr is the base address of the core. If address +* translation is being used then this parameter must +* reflect the virtual base address. Otherwise, the physical +* address should be used. +* +* @return +* - XST_SUCCESS if initialization was successful. +* +* @note None. +* +******************************************************************************/ +int XEnhance_CfgInitialize(XEnhance *InstancePtr, XEnhance_Config *CfgPtr, + u32 EffectiveAddr) +{ + /* Verify arguments. */ + Xil_AssertNonvoid(CfgPtr != NULL); + Xil_AssertNonvoid(EffectiveAddr != ((u32)0x0U)); + + /* Setup the instance */ + (void)memset((void *)InstancePtr, 0, sizeof(XEnhance)); + (void)memcpy((void *)&(InstancePtr->Config), (const void *)CfgPtr, + sizeof(XEnhance_Config)); + InstancePtr->Config.BaseAddress = EffectiveAddr; + + /* Set all handlers to stub values, let user configure this data + * later + */ + InstancePtr->ProcStartCallBack = + (XEnhance_CallBack)((void *)StubCallBack); + InstancePtr->FrameDoneCallBack = + (XEnhance_CallBack)((void *)StubCallBack); + InstancePtr->ErrCallBack = + (XEnhance_ErrorCallBack)((void *)StubErrCallBack); + + /* Reset the hardware and set the flag to indicate the core is + * ready + */ + XEnhance_Reset(InstancePtr); + InstancePtr->IsReady = (u32)(XIL_COMPONENT_IS_READY); + + return (XST_SUCCESS); +} + +/*****************************************************************************/ +/** +* +* This function sets the input/output frame size in Active Size register and +* enables the register update. +* +* @param InstancePtr is a pointer to XEnhance instance to be worked on. +* +* @return None. +* +* @note None. +* +******************************************************************************/ +void XEnhance_Setup(XEnhance *InstancePtr) +{ + u32 Data; + + /* Verify arguments. */ + Xil_AssertVoid(InstancePtr != NULL); + + XEnhance_RegUpdateDisable(InstancePtr); + + /* Write active size register */ + Data = ((((InstancePtr)->VSize) << (XENH_ACTSIZE_NUM_LINE_SHIFT)) & + (XENH_ACTSIZE_NUM_LINE_MASK)) | + (((InstancePtr)->HSize) & + (XENH_ACTSIZE_NUM_PIXEL_MASK)); + + XEnhance_WriteReg((InstancePtr)->Config.BaseAddress, + (XENH_ACTIVE_SIZE_OFFSET), Data); + XEnhance_RegUpdateEnable(InstancePtr); +} + +/*****************************************************************************/ +/** +* +* This sets the bypass bit of the control register to switch the core to bypass +* mode if debug is enabled in the Enhance core. +* +* @param InstancePtr is a pointer to XEnhance instance to be worked on. +* +* @return None. +* +* @note Debug functionality should be enabled.. +* +******************************************************************************/ +void XEnhance_EnableDbgByPass(XEnhance *InstancePtr) +{ + /* Verify arguments. */ + Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid((InstancePtr)->Config.HasDebug != (u16)0x0U); + + /* Write into control register to set debug bypass. */ + XEnhance_WriteReg((InstancePtr)->Config.BaseAddress, + (XENH_CONTROL_OFFSET), + (XEnhance_ReadReg((InstancePtr)->Config.BaseAddress, + (XENH_CONTROL_OFFSET)) | ((XENH_CTL_BPE_MASK)))); +} + +/*****************************************************************************/ +/** +* +* This function gets the current status of the bypass setting of the Enhance +* core. +* +* @param InstancePtr is a pointer to XEnhance instance to be worked on. +* +* @return Core debug bypass mode. +* - TRUE = Bypass mode is enabled. +* - FALSE = Bypass mode is not enabled. +* +* @note Debug functionality should be enabled. +* +******************************************************************************/ +int XEnhance_IsDbgByPassEnabled(XEnhance *InstancePtr) +{ + u32 Data; + int Status; + + /* Verify arguments. */ + Xil_AssertNonvoid(InstancePtr != NULL); + Xil_AssertNonvoid((InstancePtr)->Config.HasDebug != (u16)0x0U); + + /* Read from control register to know debug bypass status. */ + Data = XEnhance_ReadReg((InstancePtr)->Config.BaseAddress, + (XENH_CONTROL_OFFSET)) & ((u32)((XENH_CTL_BPE_MASK))); + if (Data == (XENH_CTL_BPE_MASK)) { + Status = (TRUE); + } + else { + Status = (FALSE); + } + + return Status; +} + +/*****************************************************************************/ +/** +* +* This function disables Bypass mode of the Enhance core. +* +* @param InstancePtr is a pointer to XEnhance instance to be worked on. +* +* @return None. +* +* @note Debug functionality should be enabled. +* +******************************************************************************/ +void XEnhance_DisableDbgBypass(XEnhance *InstancePtr) +{ + /* Verify arguments. */ + Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid((InstancePtr)->Config.HasDebug != (u16)0x0U); + + /* Write into control register to disable debug bypass. */ + XEnhance_WriteReg((InstancePtr)->Config.BaseAddress, + (XENH_CONTROL_OFFSET), + (XEnhance_ReadReg((InstancePtr)->Config.BaseAddress, + (XENH_CONTROL_OFFSET)) & (~(XENH_CTL_BPE_MASK)))); +} + +/*****************************************************************************/ +/** +* +* This function sets the test-pattern mode of the Enhance core if debug +* features is enabled. +* +* @param InstancePtr is a pointer to XEnhance instance to be worked on. +* +* @return None. +* +* @note Debug functionality should be enabled. +* +******************************************************************************/ +void XEnhance_EnableDbgTestPattern(XEnhance *InstancePtr) +{ + /* Verify arguments. */ + Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(InstancePtr->Config.HasDebug != (u16)0x0U); + + /* Write into control register to set test pattern. */ + XEnhance_WriteReg((InstancePtr)->Config.BaseAddress, + (XENH_CONTROL_OFFSET), + ((XEnhance_ReadReg((InstancePtr)->Config.BaseAddress, + (XENH_CONTROL_OFFSET))) | + ((XENH_CTL_TPE_MASK)))); +} + +/*****************************************************************************/ +/** +* +* This function gets the test-pattern mode if debug feature is enabled. +* +* @param InstancePtr is a pointer to XEnhance instance to be worked on. +* +* @return Test-pattern generator mode. +* - TRUE = Test-pattern mode is enabled. +* - FALSE = Test-pattern mode is not enabled. +* +* @note Debug functionality should be enabled. +* +******************************************************************************/ +int XEnhance_IsDbgTestPatternEnabled(XEnhance *InstancePtr) +{ + u32 Data; + int Status; + + /* Verify arguments. */ + Xil_AssertNonvoid(InstancePtr != NULL); + Xil_AssertNonvoid(InstancePtr->Config.HasDebug != (u16)0x0U); + + /* Read from control register to know debug test pattern status. */ + Data = XEnhance_ReadReg((InstancePtr)->Config.BaseAddress, + (XENH_CONTROL_OFFSET)) & ((XENH_CTL_TPE_MASK)); + if (Data == (XENH_CTL_TPE_MASK)) { + Status = (TRUE); + } + else { + Status = (FALSE); + } + + return Status; +} + +/*****************************************************************************/ +/** +* +* This function disables the test Pattern mode of the Enhance core. +* +* @param InstancePtr is a pointer to XEnhance instance to be worked on. +* +* @return None. +* +* @note Debug functionality should be enabled. +* +******************************************************************************/ +void XEnhance_DisableDbgTestPattern(XEnhance *InstancePtr) +{ + /* Verify arguments. */ + Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid((InstancePtr)->Config.HasDebug != (u16)0x0U); + + /* Write into control register to disable debug bypass. */ + XEnhance_WriteReg((InstancePtr)->Config.BaseAddress, + (XENH_CONTROL_OFFSET), + ((XEnhance_ReadReg((InstancePtr)->Config.BaseAddress, + (XENH_CONTROL_OFFSET))) & + (~(XENH_CTL_TPE_MASK)))); +} +/*****************************************************************************/ +/** +* +* This function returns the contents of Version register. +* +* @param InstancePtr is a pointer to XEnhance instance to be worked on. +* +* @return Returns the contents of the Version register. +* +* @note None. +* +******************************************************************************/ +u32 XEnhance_GetVersion(XEnhance *InstancePtr) +{ + u32 Data; + + /* Verify arguments. */ + Xil_AssertNonvoid(InstancePtr != NULL); + + /* Read version register of the Enhance core */ + Data = XEnhance_ReadReg((InstancePtr)->Config.BaseAddress, + (XENH_VERSION_OFFSET)); + + return Data; +} + +/*****************************************************************************/ +/** +* +* This function gets number of frames processed since power-up or last +* time the core is reset. +* +* @param InstancePtr is a pointer to XEnhance instance to be worked on. +* +* @return FrameCount is the number of frames processed since power-up. +* +* @note Debug functionality should be enabled. +* +******************************************************************************/ +u32 XEnhance_GetDbgFrameCount(XEnhance *InstancePtr) +{ + u32 FrameCount; + + /* Verify argument. */ + Xil_AssertNonvoid(InstancePtr != NULL); + Xil_AssertNonvoid(InstancePtr->Config.HasDebug != (u16)0x0); + + /* Reads Frame Throughput monitor */ + FrameCount = XEnhance_ReadReg(InstancePtr->Config.BaseAddress, + (XENH_SYSDEBUG0_OFFSET)); + + return FrameCount; +} + +/*****************************************************************************/ +/** +* +* This function gets the number of lines processed since power-up or last +* time the core is reset. +* +* @param InstancePtr is a pointer to XEnhance instance to be worked on. +* +* @return LineCount is the number of lines processed since power-up. +* +* @note Debug functionality should be enabled. +* +******************************************************************************/ +u32 XEnhance_GetDbgLineCount(XEnhance *InstancePtr) +{ + u32 LineCount; + + /* Verify argument. */ + Xil_AssertNonvoid(InstancePtr != NULL); + Xil_AssertNonvoid(InstancePtr->Config.HasDebug != (u16)0x0); + + /* Reads Line throughput monitor */ + LineCount = XEnhance_ReadReg(InstancePtr->Config.BaseAddress, + (XENH_SYSDEBUG1_OFFSET)); + + return LineCount; +} + +/*****************************************************************************/ +/** +* +* This function gets the number of pixels processed since power-up or last +* time the core is reset. +* +* @param InstancePtr is a pointer to XEnhance instance to be worked on. +* +* @return PixelCount is the number of pixels processed since power-up. +* +* @note Debug functionality should be enabled. +* +******************************************************************************/ +u32 XEnhance_GetDbgPixelCount(XEnhance *InstancePtr) +{ + u32 PixelCount; + + /* Verify argument. */ + Xil_AssertNonvoid(InstancePtr != NULL); + Xil_AssertNonvoid(InstancePtr->Config.HasDebug != (u16)0x0); + + /* Reads Pixel Throughput monitor */ + PixelCount=XEnhance_ReadReg(InstancePtr->Config.BaseAddress, + (XENH_SYSDEBUG2_OFFSET)); + + return PixelCount; +} + +/*****************************************************************************/ +/** +* +* This function sets active H/V sizes in the Active size register. +* +* @param InstancePtr is a pointer to XEnhance instance to be worked on. +* @param HSize is number of Active Pixels per scan line to be set. +* Range of HSize is 32 to 7680. +* @param VSize is number of Active Lines per frame to be set. +* Range of VSize is 32 to 7680. +* +* @return None. +* +* @note None. +* +******************************************************************************/ +void XEnhance_SetActiveSize(XEnhance *InstancePtr, u16 HSize, u16 VSize) +{ + u32 Size; + + /* Verify arguments. */ + Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid((VSize >= (u16)(XENH_VSIZE_FIRST)) && + (VSize <= (u16)(XENH_VSIZE_LAST))); + Xil_AssertVoid((HSize >= (u16)(XENH_HSIZE_FIRST)) && + (HSize <= (u16)(XENH_HSIZE_LAST))); + + Size = (((u32)VSize) << ((u32)(XENH_ACTSIZE_NUM_LINE_SHIFT))) | (HSize); + XEnhance_WriteReg(InstancePtr->Config.BaseAddress, + (XENH_ACTIVE_SIZE_OFFSET), Size); +} + +/*****************************************************************************/ +/** +* +* This function gets the number of Active Pixel per Scan line +* and number of Active Lines per Frame from the Active Frame Size register. +* +* @param InstancePtr is a pointer to XEnhance instance to be worked on. +* @param HSize is a pointer to 16-bit variable in which +* the number of Active Pixels per Scan Line is returned. +* (Range is 32 to 7680). +* @param VSize is a pointer to 16-bit variable in which +* the number of Active Lines per Frame is returned. +* (Range is 32 to 7680). +* +* @return None. +* +* @note None. +* +*****************************************************************************/ +void XEnhance_GetActiveSize(XEnhance *InstancePtr, u16 *HSize, u16 *VSize) +{ + u32 Data; + + /* Verify arguments. */ + Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(HSize != NULL); + Xil_AssertVoid(VSize != NULL); + + Data = XEnhance_ReadReg(InstancePtr->Config.BaseAddress, + XENH_ACTIVE_SIZE_OFFSET); + + /* Reads Number of Active Lines per Frame */ + *HSize = (u16)((Data) & (XENH_ACTSIZE_NUM_PIXEL_MASK)); + + /* Reads Number of Active Lines per Frame */ + *VSize = (u16)((Data) & (XENH_ACTSIZE_NUM_LINE_MASK)) >> + (XENH_ACTSIZE_NUM_LINE_SHIFT); +} + +/*****************************************************************************/ +/** +* +* This function sets the Noise Threshold value for the Enhance core +* The amount of noise reduction can be controlled through Noise +* Threshold parameter. +* +* @param InstancePtr is a pointer to XEnhance instance to be worked on. +* @param Threshold is the value to set the Noise Threshold. +* +* @return None. +* +* @note None. +* +******************************************************************************/ +void XEnhance_SetNoiseThreshold(XEnhance *InstancePtr, u32 Threshold) +{ + /* Verify argument. */ + Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(Threshold <= (u32)XENH_NOISETHRES_MAX); + + XEnhance_WriteReg((InstancePtr)->Config.BaseAddress, + (XENH_NOISE_THRESHOLD_OFFSET), Threshold); + +} + +/*****************************************************************************/ +/** +* +* This function gets the Noise Threshold value for the Enhance core. +* +* @param InstancePtr is a pointer to XEnhance instance to be worked on. +* +* @return The amount of noise reduction that can be controlled. +* +* @note None. +* +******************************************************************************/ +u32 XEnhance_GetNoiseThreshold(XEnhance *InstancePtr) +{ + u32 NoiseThreshold; + + /* Verify argument. */ + Xil_AssertNonvoid(InstancePtr != NULL); + + NoiseThreshold = (XEnhance_ReadReg(InstancePtr-> Config.BaseAddress, + (XENH_NOISE_THRESHOLD_OFFSET))) & + (XENH_NOISE_THRESHOLD_MASK); + + return NoiseThreshold; +} + +/*****************************************************************************/ +/** +* +* This function sets the Edge Strength value for the Enhance core. +* i.e. The amount of edge enhancement can be controlled through the +* programmable Enhance Strength parameter. +* +* @param InstancePtr is a pointer to XEnhance instance to be worked on. +* @param Strength is the value to set the Edge Strength of the core. +* +* @return None. +* +* @note The larger the strength, the stronger the edge enhancement. +* +******************************************************************************/ +void XEnhance_SetEdgeStrength(XEnhance *InstancePtr, u32 Strength) +{ + /* Verify arguments. */ + Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(Strength <= (u32)XENH_ENHSTRENGTH_MAX); + + XEnhance_WriteReg((InstancePtr)->Config.BaseAddress, + (XENH_ENHANCE_STRENGTH_OFFSET), Strength); +} + +/*****************************************************************************/ +/** +* +* This function gets the Edge Strength value for the Enhance core. +* +* @param InstancePtr is a pointer to XEnhance instance to be worked on. +* +* @return The amount of edge enhancement that can be controlled. +* +* @note None. +* +******************************************************************************/ +u32 XEnhance_GetEdgeStrength(XEnhance *InstancePtr) +{ + u32 EdgeStrength; + + /* Verify argument. */ + Xil_AssertNonvoid(InstancePtr != NULL); + + EdgeStrength = (XEnhance_ReadReg(InstancePtr->Config.BaseAddress, + (XENH_ENHANCE_STRENGTH_OFFSET))) & + (XENH_STRENGTH_MASK); + + return EdgeStrength; +} + +/*****************************************************************************/ +/** +* +* This function sets the Halo Suppress value for the Enhance core. +* i.e. The amount of halo suppression can be controlled through the +* programmable Halo Suppress parameter. +* +* @param InstancePtr is a pointer to XEnhance instance to be worked on. +* @param Suppress is the value to set the Suppression value. +* +* @return None. +* +* @note None. +* +******************************************************************************/ +void XEnhance_SetHaloSuppress(XEnhance *InstancePtr, u32 Suppress) +{ + /* Verify arguments. */ + Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(Suppress <= (u32)XENH_HALOSUPPRESS_MAX); + + XEnhance_WriteReg((InstancePtr)->Config.BaseAddress, + (XENH_HALO_SUPPRESS_OFFSET), Suppress); +} + +/*****************************************************************************/ +/** +* +* This function gets the Halo Suppress value for the Enhance core. +* +* @param InstancePtr is a pointer to XEnhance instance to be worked on. +* +* @return The amount of halo suppression that can be controlled. +* +* @note None. +* +******************************************************************************/ +u32 XEnhance_GetHaloSuppress(XEnhance *InstancePtr) +{ + u32 HaloSuppress; + + /* Verify argument. */ + Xil_AssertNonvoid(InstancePtr != NULL); + + HaloSuppress = (XEnhance_ReadReg(InstancePtr->Config.BaseAddress, + (XENH_HALO_SUPPRESS_OFFSET))) & + (XENH_HALO_SUPPRESS_MASK); + + return HaloSuppress; +} + +/*****************************************************************************/ +/** +* +* This routine is a stub for the asynchronous callbacks. The stub is here in +* case the upper layer forgot to set the handlers. On initialization, All +* handlers except error handler are set to this callback. It is considered an +* error for this handler to be invoked. +* +* @param CallBackRef is a callback reference passed in by the upper +* layer when setting the callback functions, and passed back +* to the upper layer when the callback is invoked. +* +* @return None. +* +* @note None. +* +*****************************************************************************/ +static void StubCallBack(void *CallBackRef) +{ + /* Verify arguments. */ + Xil_AssertVoid(CallBackRef != NULL); + Xil_AssertVoidAlways(); +} + +/*****************************************************************************/ +/** +* +* This routine is a stub for the asynchronous error interrupt callback. The +* stub is here in case the upper layer forgot to set the handler. On +* initialization, Error interrupt handler is set to this callback. It is +* considered an error for this handler to be invoked. +* +* @param CallBackRef is a callback reference passed in by the upper +* layer when setting the callback functions, and passed back +* to the upper layer when the callback is invoked. +* @param ErrorMask is a bit mask indicating the cause of the error. Its +* value equals 'OR'ing one or more XENH_IXR_*_MASK values defined +* in xenhance_hw.h. +* +* @return None. +* +* @note None. +* +*****************************************************************************/ +static void StubErrCallBack(void *CallBackRef, u32 ErrorMask) +{ + /* Verify arguments. */ + Xil_AssertVoid((ErrorMask == ((u32)0x0U)) || + (ErrorMask > ((u32)0x0U))); + Xil_AssertVoid(CallBackRef != NULL); + Xil_AssertVoidAlways(); +} diff --git a/XilinxProcessorIPLib/drivers/enhance/src/xenhance.h b/XilinxProcessorIPLib/drivers/enhance/src/xenhance.h new file mode 100755 index 00000000..933e3c15 --- /dev/null +++ b/XilinxProcessorIPLib/drivers/enhance/src/xenhance.h @@ -0,0 +1,643 @@ +/****************************************************************************** +* +* Copyright (C) 2009 - 2014 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +* (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in +* this Software without prior written authorization from Xilinx. +* +******************************************************************************/ +/*****************************************************************************/ +/** +* +* @file xenhance.h +* +* This header file contains identifiers and register-level driver functions (or +* macros), range macros, structure typedefs that can be used to access the +* Image Statistic core instance. +* +* The Image Enhancement core offers noise reduction and/or edge enhancement. +* For edge enhancement, optional anti-halo and anti-alias post-processing +* modules are available to reduce image artifacts that can appear from the +* high-pass filtering of the edge enhancement filters. The amount of noise +* reduction and edge enhancement is controlled through user parameters. +* There are two variations of the algorithm offered to choose between high +* performance and minimal resource usage. This core works on YCbCr 4:4:4 and +* 4:2:2 data. The core is capable of a maximum resolution of 7680 columns by +* 7680 rows with 8, 10, 12, or 16 bits per pixel and supports the bandwidth +* necessary for High-definition (1080p60) resolutions in all Xilinx FPGA device +* families. Higher resolutions can be supported in Xilinx high-performance +* device families. +* +* Initialization & Configuration +* +* The device driver enables higher layer software (e.g., an application) to +* communicate to the Enhance core. +* +* XEnhance_CfgInitialize() API is used to initialize the Enhance core. +* The user needs to first call the XEnhance_LookupConfig() API which returns +* the Configuration structure pointer which is passed as a parameter to the +* XEnhance_CfgInitialize() API. +* +* Interrupts +* +* The driver provides an interrupt handler XEnhance_IntrHandler for handling +* the interrupt from the Enhance core. The users of this driver have to +* register this handler with the interrupt system and provide the callback +* functions by using XEnhance_SetCallBack API. +* +* Virtual Memory +* +* This driver supports Virtual Memory. The RTOS is responsible for calculating +* the correct device base address in Virtual Memory space. +* +* Threads +* +* This driver is not thread safe. Any needs for threads or thread mutual +* exclusion must be satisfied by the layer above this driver. +* +* Asserts +* +* Asserts are used within all Xilinx drivers to enforce constraints on argument +* values. Asserts can be turned off on a system-wide basis by defining, at +* compile time, the NDEBUG identifier. By default, asserts are turned on and it +* is recommended that users leave asserts on during development. +* +* Building the driver +* +* The XEnhance driver is composed of several source files. This allows the user +* to build and link only those parts of the driver that are necessary. +* +* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who Date     Changes
+* ----- ---- -------- -----------------------------------------------------
+* 2.00a vc  12/14/10 Updated for ENHANCE V2.0
+* 3.00a rc  09/11/11 Updated for ENHANCE V3.0
+* 4.00a vyc 04/24/12 Updated for ENHANCE V4.00.a
+*                    Converted from xio.h to xil_io.h, translating
+*                    basic type, MB cache functions, exceptions and
+*                    assertion to xil_io format.
+* 5.00a vyc 06/19/13 Updated for ENHANCE V8.0
+*                    New edge enhancement algorithm and registers
+*                    Noise reduction support added
+* 6.0   adk 19/12/13 Updated as per the New Tcl API's
+* 7.0   adk 02/19/14 Changed the filename from enhance.h to xenhance.h.
+*                    Changes in xenhance.h:
+*                    Removed the following macros
+*                    ENHANCE_Enable, ENHANCE_Disable, ENHANCE_RegUpdateEnable,
+*                    ENHANCE_RegUpdateDisable, ENHANCE_Reset,
+*                    ENHANCE_AutoSyncReset
+*
+*                    Added the following function macros
+*                    XEnhance_Enable, XEnhance_Disable,
+*                    XEnhance_RegUpdateDisable, XEnhance_RegUpdateDisable
+*                    XEnhance_Reset, XEnhance_SyncReset, XEnhance_IntrEnable
+*                    XEnhance_IntrDisable, XEnhance_StatusGetPending
+*                    XEnhance_IntrGetPending, XEnhance_IntrClear
+*
+*                    Added the following type definitions:
+*                    XEnhance_Config and XEnhance structures.
+*                    XEnhance_CallBack and XEnhance_ErrorCallBack.
+*
+*                    Changes in xenhance.c:
+*                    Modified the following functions
+*                    XENHANCE_CfgInitialize -> XEnhance_CfgInitialize
+*                    XENHANCE_Setup -> XEnhance_Setup
+*
+*                    Implemented the following functions:
+*                    XEnhance_CfgInitialize, XEnhance_Setup,
+*                    XEnhance_GetVersion, XEnhance_EnableDbgByPass,
+*                    XEnhance_IsDbgByPassEnabled, XEnhance_DisableDbgBypass
+*                    XEnhance_EnableDbgTestPattern,
+*                    XEnhance_IsDbgTestPatternEnabled
+*                    XEnhance_DisableDbgTestPattern
+*                    XEnhance_GetDbgFrameCount, XEnhance_GetDbgLineCount,
+*                    XEnhance_GetDbgPixelCount, XEnhance_SetActiveSize,
+*                    XEnhance_GetActiveSize, XEnhance_SetNoiseThreshold,
+*                    XEnhance_GetNoiseThreshold, XEnhance_SetEdgeStrength,
+*                    XEnhance_GetEdgeStrength, XEnhance_SetHaloSuppress
+*                    XEnhance_GetHaloSuppress.
+*
+*                    Changes in xenhance_hw.h:
+*                    Added the register offsets and bit masks for the
+*                    registers and added backward compatibility for macros.
+*
+*                    Changes in xenhance_intr.c:
+*                    Implemented the following functions
+*                    XEnhance_IntrHandler
+*                    XEnhance_SetCallBack
+*
+*                    Changes in xenhance_sinit.c:
+*                    Implemented the following function
+*                    XEnhance_LookupConfig
+*
+*                    Changes in xenhance_selftest.c:
+*                    Implemented the following function
+*                    XEnhance_SelfTest
+*
+* +******************************************************************************/ + +#ifndef XENHANCE_H_ +#define XENHANCE_H_ /**< Prevent circular inclusions by using + * protection macros */ + +#ifdef __cplusplus +extern "C" { +#endif + +/***************************** Include Files *********************************/ + +#include "xil_assert.h" +#include "xstatus.h" +#include "xenhance_hw.h" + +/************************** Constant Definitions *****************************/ + +/** @name Handler Types +* @{ +*/ +/** +* These constants specify different types of handlers and used to +* differentiate interrupt requests from core. +* +*/ +enum { + XENH_HANDLER_PROCSTART = 1, /**< A processing start event + * interrupt type */ + XENH_HANDLER_FRAMEDONE, /**< A frame done event + * interrupt type */ + XENH_HANDLER_ERROR /**< An error condition event + * interrupt type */ +} ; +/*@}*/ + +/** @name Active size range macros +* @{ +*/ +#define XENH_VSIZE_FIRST 32 /**< Vertical Size starting + * value */ +#define XENH_VSIZE_LAST 7680 /**< Vertical Size ending + * value */ +#define XENH_HSIZE_FIRST 32 /**< Horizontal Size starting + * value */ +#define XENH_HSIZE_LAST 7680 /**< Horizontal Size ending + * value */ +/*@}*/ + +/** @name Noise threshold range macros +* @{ +*/ +#define XENH_NOISETHRES_MIN 0 /**< Noise threshold starting + * value */ +#define XENH_NOISETHRES_MAX 255 /**< Noise threshold ending + * value */ +/*@}*/ + +/** @name Strength range macros +* @{ +*/ +#define XENH_ENHSTRENGTH_MIN 0 /**< Strength starting value */ +#define XENH_ENHSTRENGTH_MAX 32768 /**< Strength ending value */ +/*@}*/ + +/** @name Halo Suppress range macros +* @{ +*/ +#define XENH_HALOSUPPRESS_MIN 0 /**< Halo Suppress starting + * value */ +#define XENH_HALOSUPPRESS_MAX 32768 /**< Halo Suppress ending + * value */ +/*@}*/ + +/***************** Macros (Inline Functions) Definitions *********************/ + +/*****************************************************************************/ +/** +* +* This function macro enables the Image Enhancement core instance. +* +* @param InstancePtr is a pointer to the Enhance core instance to be +* worked on. +* +* @return None. +* +* @note C-style signature: +* void XEnhance_Enable(XEnhance *InstancePtr) +* +******************************************************************************/ +#define XEnhance_Enable(InstancePtr) \ + XEnhance_WriteReg((InstancePtr)->Config.BaseAddress, \ + (XENH_CONTROL_OFFSET), \ + XEnhance_ReadReg((InstancePtr)->Config.BaseAddress, \ + (XENH_CONTROL_OFFSET)) | (XENH_CTL_SW_EN_MASK)) + +/*****************************************************************************/ +/** +* +* This function macro disables the Image Enhancement core instance. +* +* @param InstancePtr is a pointer to the Enhance core instance to be +* worked on. +* +* @return None. +* +* @note C-style signature: +* void XEnhance_Disable(XEnhance *InstancePtr) +* +******************************************************************************/ +#define XEnhance_Disable(InstancePtr) \ + XEnhance_WriteReg((InstancePtr)->Config.BaseAddress, \ + (XENH_CONTROL_OFFSET), \ + XEnhance_ReadReg((InstancePtr)->Config.BaseAddress, \ + (XENH_CONTROL_OFFSET)) & (~(XENH_CTL_SW_EN_MASK))) + +/*****************************************************************************/ +/** +* +* This function macro starts the Image Enhancement core instance. +* +* @param InstancePtr is a pointer to the Enhance core instance to be +* worked on. +* +* @return None. +* +* @note C-style signature: +* void XEnhance_Start(XEnhance *InstancePtr) +* +******************************************************************************/ +#define XEnhance_Start XEnhance_Enable + +/*****************************************************************************/ +/** +* +* This function macro stops the Image Enhancement core instance. +* +* @param InstancePtr is a pointer to the Enhance core instance to be +* worked on. +* +* @return None. +* +* @note C-style signature: +* void XEnhance_Stop(XEnhance *InstancePtr) +* +******************************************************************************/ +#define XEnhance_Stop XEnhance_Disable + +/*****************************************************************************/ +/** +* +* This function macro commits all the register value changes made so far by the +* software to the Image Enhancement core instance. +* +* @param InstancePtr is a pointer to the Enhance core instance to be +* worked on. +* +* @return None. +* +* @note C-style signature: +* void XEnhance_RegUpdateEnable(XEnhance *InstancePtr) +* +******************************************************************************/ +#define XEnhance_RegUpdateEnable(InstancePtr) \ + XEnhance_WriteReg((InstancePtr)->Config.BaseAddress, \ + (XENH_CONTROL_OFFSET), \ + (XEnhance_ReadReg((InstancePtr)->Config.BaseAddress, \ + (XENH_CONTROL_OFFSET))) | (XENH_CTL_RUE_MASK)) + +/*****************************************************************************/ +/** +* +* This function macro prevents the Image Enhancement core instance from +* committing recent changes made so far by the software. When disabled, changes +* to other configuration registers are stored, but do not effect the behavior +* of the core. +* +* @param InstancePtr is a pointer to the Enhance core instance to be +* worked on. +* +* @return None. +* +* @note C-style signature: +* void XEnhance_RegUpdateDisable(XEnhance *InstancePtr) +* +******************************************************************************/ +#define XEnhance_RegUpdateDisable(InstancePtr) \ + XEnhance_WriteReg((InstancePtr)->Config.BaseAddress, \ + (XENH_CONTROL_OFFSET), \ + ((XEnhance_ReadReg((InstancePtr)->Config.BaseAddress, \ + (XENH_CONTROL_OFFSET))) & \ + (~(XENH_CTL_RUE_MASK)))) + +/*****************************************************************************/ +/** +* +* This function macro resets a Image Enhancement core instance, but differs from +* XEnhance_Reset() in that it automatically synchronizes to the SOF input of +* the core to prevent tearing. +* +* On the next SOF following a call to XEnhance_SyncReset(), +* all of the core's configuration registers and outputs will be reset, then the +* reset flag will be immediately released, allowing the core to immediately +* resume default operation. +* +* @param InstancePtr is a pointer to the Enhance core instance to be +* worked on. +* +* @return None. +* +* @note C-style signature: +* void Enhance_SyncReset(XEnhance *InstancePtr) +* +******************************************************************************/ +#define XEnhance_SyncReset(InstancePtr) \ + XEnhance_WriteReg((InstancePtr)->Config.BaseAddress, \ + (XENH_CONTROL_OFFSET), (XENH_CTL_AUTORESET_MASK)) + +/*****************************************************************************/ +/** +* +* This function macro resets a Image Enhancement core instance. This reset +* effects the core immediately, and may cause image tearing. +* +* @param InstancePtr is a pointer to the Enhance core instance to be +* worked on. +* +* @return None. +* +* @note C-style signature: +* void XEnhance_Reset(XEnhance *InstancePtr) +* +******************************************************************************/ +#define XEnhance_Reset(InstancePtr) \ + XEnhance_WriteReg((InstancePtr)->Config.BaseAddress, \ + (XENH_CONTROL_OFFSET), (XENH_CTL_RESET_MASK)) + +/*****************************************************************************/ +/** +* +* This function macro returns the pending status of a Enhance core. +* +* @param InstancePtr is a pointer to the Enhance core instance to be +* worked on. +* +* @return The pending interrupts of the Enhance core. Use XENH_IXR_*_MASK +* constants defined in xenhance_hw.h to interpret this value. +* +* @note C-style signature: +* u32 XEnhance_StatusGePending(XEnhance *InstancePtr). +* +******************************************************************************/ +#define XEnhance_StatusGetPending(InstancePtr) \ + XEnhance_ReadReg((InstancePtr)->Config.BaseAddress, \ + (XENH_STATUS_OFFSET)) & (XENH_IXR_ALLINTR_MASK) + +/*****************************************************************************/ +/** +* +* This function macro clears/acknowledges pending interrupts of a Enhance core. +* +* @param InstancePtr is a pointer to the Enhance core instance to be +* worked on. +* @param IntrType is the pending interrupts to clear/acknowledge. Use +* OR'ing of XENH_IXR_*_MASK constants defined in xEnhance_hw.h +* to create this parameter value. +* +* @return None. +* +* @note C-style signature: +* void XEnhance_IntrClear(XEnhance *InstancePtr, u32 IntrType) +* +******************************************************************************/ +#define XEnhance_IntrClear(InstancePtr, IntrType) \ + XEnhance_WriteReg((InstancePtr)->Config.BaseAddress, \ + (XENH_STATUS_OFFSET), ((IntrType) & (XENH_IXR_ALLINTR_MASK))) + +/*****************************************************************************/ +/** +* +* This function macro enables the given individual interrupt(s) on the Enhance +* core. +* +* @param InstancePtr is a pointer to the Enhance core instance to be +* worked on. +* @param IntrType is the bit-mask of the interrupts to be enabled. +* Bit positions of 1 will be enabled. Bit positions of 0 will +* keep the previous setting. This mask is formed by OR'ing +* XENH_IXR_*_MASK bits defined in xenhance_hw.h. +* +* @return None. +* +* @note The existing enabled interrupt(s) will remain enabled. +* C-style signature: +* void XEnhance_IntrEnable(XEnhance *InstancePtr, u32 IntrType) +* +******************************************************************************/ +#define XEnhance_IntrEnable(InstancePtr, IntrType) \ + XEnhance_WriteReg((InstancePtr)->Config.BaseAddress, \ + (XENH_IRQ_EN_OFFSET), \ + ((IntrType) & (XENH_IXR_ALLINTR_MASK)) | \ + (XEnhance_ReadReg((InstancePtr)->Config.BaseAddress, \ + (XENH_IRQ_EN_OFFSET)))) + +/*****************************************************************************/ +/** +* +* This function macro disables the given individual interrupt(s) on the +* Enhance core by updating Irq_Enable register. +* +* @param InstancePtr is a pointer to the Enhance core instance to be +* worked on. +* @param IntrType is the bit-mask of the interrupts to be disabled. +* Bit positions of 1 will be disabled. Bit positions of 0 will +* keep the previous setting. This mask is formed by OR'ing +* XENH_IXR_*_MASK bits defined in xenhance_hw.h. +* +* @return None. +* +* @note Any other interrupt not covered by parameter IntrType, if +* enabled before this macro is called, will remain enabled. +* C-style signature: +* void XEnhance_IntrDisable(XEnhance *InstancePtr, u32 IntrType) +* +******************************************************************************/ +#define XEnhance_IntrDisable(InstancePtr, IntrType) \ + XEnhance_WriteReg((InstancePtr)->Config.BaseAddress, \ + (XENH_IRQ_EN_OFFSET), \ + (XEnhance_ReadReg((InstancePtr)->Config.BaseAddress, \ + (XENH_IRQ_EN_OFFSET)) & ((~(IntrType)) & \ + (XENH_IXR_ALLINTR_MASK)))) + +/*****************************************************************************/ +/** +* +* This function macro returns the pending interrupts of a Enhance core. +* +* @param InstancePtr is a pointer to the Enhance core instance to be +* worked on. +* +* @return The pending interrupts of the Enhance core. Use XENH_IXR_*_MASK +* constants defined in xenhance_hw.h to interpret this value. +* +* @note C-style signature: +* u32 XEnhance_IntrGetPending(XEnhance *InstancePtr) +* +******************************************************************************/ +#define XEnhance_IntrGetPending(InstancePtr) \ + XEnhance_ReadReg((InstancePtr)->Config.BaseAddress, \ + (XENH_IRQ_EN_OFFSET)) & \ + (XEnhance_ReadReg((InstancePtr)->Config.BaseAddress, \ + (XENH_STATUS_OFFSET))) & ((u32)(XENH_IXR_ALLINTR_MASK)) + +/**************************** Type Definitions *******************************/ + +/** +* This typedef contains configuration information for a Video Enhance core. +* Each Video Enhance core should have a configuration structure associated. +* +******************************************************************************/ +typedef struct { + u16 DeviceId; /**< DeviceId is the unique ID of the + * device */ + u32 BaseAddress; /**< BaseAddress is the physical base + * address of the core registers */ + u32 SlaveAxisVideoFormat; /**< Slave axis video format */ + u32 MasteAxisVideoFoemat; /**< Master axis video format */ + u32 SlaveAxiClkFreqHz; /**< Slave axi clock */ + u16 HasIntcIf; /**< Has Intc IF */ + u16 HasDebug; /**< Has Debug */ + u32 MaxColumns; /**< Maximum columns */ + u32 ActiveColumns; /**< Active columns */ + u32 ActiveRows; /**< Active Rows */ + u16 HasNoise; /**< Has noise */ + u16 HasEnhance; /**< Has enhance */ + u16 HasHalo; /**< Has halo suppression */ + u16 HasAlias; /**< Has Alias */ + u32 OptSize; /**< Optional size */ + u16 NoiseThreshold; /**< Noise Threshold */ + u32 EnhanceStrength; /**< Enhance strength */ + u16 HaloSuppress; /**< Halo suppression */ +} XEnhance_Config; + +/*****************************************************************************/ +/** +* +* Callback type for all interrupts except error interrupt. +* +* @param CallBackRef is a callback reference passed in by the upper +* layer when setting the callback functions, and passed back to +* the upper layer when the callback is invoked. +* +******************************************************************************/ +typedef void (*XEnhance_CallBack)(void *CallBackRef); + +/*****************************************************************************/ +/** +* +* Callback type for Error interrupt. +* +* @param CallBackRef is a callback reference passed in by the upper +* layer when setting the callback functions, and passed back to +* the upper layer when the callback is invoked. +* @param ErrorMask is a bit mask indicating the cause of the error. Its +* value equals 'OR'ing one or more XENH_IXR_*_MASK values defined in +* xenhance_hw.h +* +******************************************************************************/ +typedef void (*XEnhance_ErrorCallBack)(void *CallBackRef, u32 ErrorMask); + +/** +* The Enhance driver instance data structure. A pointer to an instance data +* structure is passed around by functions to refer to a specific driver +* instance. +*/ +typedef struct { + XEnhance_Config Config; /**< Hardware configuration */ + u32 IsReady; /**< Device and the driver instantly + * are initialized */ + u16 HSize; /**< Active Video Horizontal Size */ + u16 VSize; /**< Active Video Vertical Size */ + + /* IRQ Callbacks */ + XEnhance_CallBack ProcStartCallBack; /**< Callback for Processing + * Start interrupt */ + void *ProcStartRef; /**< To be passed to Process + * Start interrupt + * callback */ + XEnhance_CallBack FrameDoneCallBack; /**< Callback for Frame Done + * interrupt */ + void *FrameDoneRef; /**< To be passed to the Frame + * Done interrupt callback */ + XEnhance_ErrorCallBack ErrCallBack; /**< Callback for Error + * interrupt */ + void *ErrRef; /**< To be passed to the Error + * interrupt callback */ +} XEnhance; + +/************************** Function Prototypes ******************************/ + +int XEnhance_CfgInitialize(XEnhance *InstancePtr, XEnhance_Config *CfgPtr, + u32 EffectiveAddr); +void XEnhance_Setup(XEnhance *InstancePtr); +void XEnhance_EnableDbgByPass(XEnhance *InstancePtr); +int XEnhance_IsDbgByPassEnabled(XEnhance *InstancePtr); +void XEnhance_DisableDbgBypass(XEnhance *InstancePtr); +void XEnhance_EnableDbgTestPattern(XEnhance *InstancePtr); +int XEnhance_IsDbgTestPatternEnabled(XEnhance *InstancePtr); +void XEnhance_DisableDbgTestPattern(XEnhance *InstancePtr); +u32 XEnhance_GetVersion(XEnhance *InstancePtr); +u32 XEnhance_GetDbgFrameCount(XEnhance *InstancePtr); +u32 XEnhance_GetDbgLineCount(XEnhance *InstancePtr); +u32 XEnhance_GetDbgPixelCount(XEnhance *InstancePtr); +void XEnhance_SetActiveSize(XEnhance *InstancePtr, u16 HSize, u16 VSize); +void XEnhance_GetActiveSize(XEnhance *InstancePtr, u16 *HSize, u16 *VSize); +void XEnhance_SetNoiseThreshold(XEnhance *InstancePtr, u32 Threshold); +u32 XEnhance_GetNoiseThreshold(XEnhance *InstancePtr); +void XEnhance_SetEdgeStrength(XEnhance *InstancePtr, u32 Strength); +u32 XEnhance_GetEdgeStrength(XEnhance *InstancePtr); +void XEnhance_SetHaloSuppress(XEnhance *InstancePtr, u32 Suppress); +u32 XEnhance_GetHaloSuppress(XEnhance *InstancePtr); + +/* Initialization functions in xEnhance_sinit.c */ +XEnhance_Config *XEnhance_LookupConfig(u16 DeviceId); + +/* Self test functions in xenhance_selftest.c */ +int XEnhance_SelfTest(XEnhance*InstancePtr); + +/* Interrupt related functions in xEnhance_intr.c */ +void XEnhance_IntrHandler(void *InstancePtr); +int XEnhance_SetCallBack(XEnhance *InstancePtr, u32 HandlerType, + void *CallBackFunc, void *CallBackRef); + +/************************** Variable Declarations ****************************/ + + +#ifdef __cplusplus +} +#endif + +#endif /* End of protection macro */ diff --git a/XilinxProcessorIPLib/drivers/enhance/src/xenhance_g.c b/XilinxProcessorIPLib/drivers/enhance/src/xenhance_g.c new file mode 100755 index 00000000..8629f2df --- /dev/null +++ b/XilinxProcessorIPLib/drivers/enhance/src/xenhance_g.c @@ -0,0 +1,68 @@ +/****************************************************************************** +* +* Copyright (C) 2010 - 2014 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +* (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in +* this Software without prior written authorization from Xilinx. +* +******************************************************************************/ + +#include "xparameters.h" +#include "xenhance.h" + +/* +* The configuration table for devices +*/ + +XEnhance_Config XEnhance_ConfigTable[] = +{ + { + XPAR_FMC_SENSOR_INPUT_V_ENHANCE_1_DEVICE_ID, + XPAR_FMC_SENSOR_INPUT_V_ENHANCE_1_BASEADDR, + XPAR_FMC_SENSOR_INPUT_V_ENHANCE_1_S_AXIS_VIDEO_DATA_WIDTH, + XPAR_FMC_SENSOR_INPUT_V_ENHANCE_1_M_AXIS_VIDEO_DATA_WIDTH, + XPAR_FMC_SENSOR_INPUT_V_ENHANCE_1_S_AXIS_VIDEO_FORMAT, + XPAR_FMC_SENSOR_INPUT_V_ENHANCE_1_M_AXIS_VIDEO_FORMAT, + XPAR_FMC_SENSOR_INPUT_V_ENHANCE_1_S_AXIS_VIDEO_TDATA_WIDTH, + XPAR_FMC_SENSOR_INPUT_V_ENHANCE_1_M_AXIS_VIDEO_TDATA_WIDTH, + XPAR_FMC_SENSOR_INPUT_V_ENHANCE_1_HAS_AXI4_LITE, + XPAR_FMC_SENSOR_INPUT_V_ENHANCE_1_HAS_INTC_IF, + XPAR_FMC_SENSOR_INPUT_V_ENHANCE_1_HAS_DEBUG, + XPAR_FMC_SENSOR_INPUT_V_ENHANCE_1_MAX_COLS, + XPAR_FMC_SENSOR_INPUT_V_ENHANCE_1_ACTIVE_COLS, + XPAR_FMC_SENSOR_INPUT_V_ENHANCE_1_ACTIVE_ROWS, + XPAR_FMC_SENSOR_INPUT_V_ENHANCE_1_HAS_NOISE, + XPAR_FMC_SENSOR_INPUT_V_ENHANCE_1_HAS_ENHANCE, + XPAR_FMC_SENSOR_INPUT_V_ENHANCE_1_HAS_HALO, + XPAR_FMC_SENSOR_INPUT_V_ENHANCE_1_HAS_ALIAS, + XPAR_FMC_SENSOR_INPUT_V_ENHANCE_1_OPT_SIZE, + XPAR_FMC_SENSOR_INPUT_V_ENHANCE_1_NOISE_THRESHOLD, + XPAR_FMC_SENSOR_INPUT_V_ENHANCE_1_ENHANCE_STRENGTH, + XPAR_FMC_SENSOR_INPUT_V_ENHANCE_1_HALO_SUPPRESS + } +}; + + diff --git a/XilinxProcessorIPLib/drivers/enhance/src/xenhance_hw.h b/XilinxProcessorIPLib/drivers/enhance/src/xenhance_hw.h new file mode 100755 index 00000000..2509ce7f --- /dev/null +++ b/XilinxProcessorIPLib/drivers/enhance/src/xenhance_hw.h @@ -0,0 +1,287 @@ +/****************************************************************************** +* +* Copyright (C) 2014 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +* (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in +* this Software without prior written authorization from Xilinx. +* +******************************************************************************/ +/*****************************************************************************/ +/** +* +* @file xenhance_hw.h +* +* This header file contains identifiers and register-level driver functions (or +* macros) that can be used to access the Xilinx Video Image Enhancement +* core. +* +* For more information about the operation of this core, see the hardware +* specification and documentation in the higher level driver xenhance.h source +* code file. +* +* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who Date     Changes
+* ----- --- -------- -------------------------------------------------------
+* 7.0   adk 01/07/14 First release.
+*                    Added the register offsets and bit masks for the
+*                    registers and added backward compatibility for macros.
+*
+* +******************************************************************************/ + +#ifndef XENHANCE_HW_H_ +#define XENHANCE_HW_H_ /**< Prevent circular inclusions by using + * protection macros */ + +#ifdef __cplusplus +extern "C" { +#endif + +/***************************** Include Files *********************************/ + +#include "xil_io.h" + +/************************** Constant Definitions *****************************/ + +/** @name Control Registers + * @{ + */ +#define XENH_CONTROL_OFFSET 0x0000 /**< Control Offset */ +#define XENH_STATUS_OFFSET 0x0004 /**< Status Offset */ +#define XENH_ERROR_OFFSET 0x0008 /**< Error Offset */ +#define XENH_IRQ_EN_OFFSET 0x000C /**< IRQ Enable Offset */ +#define XENH_VERSION_OFFSET 0x0010 /**< Version Offset */ +#define XENH_SYSDEBUG0_OFFSET 0x0014 /**< System Debug 0 + * Offset */ +#define XENH_SYSDEBUG1_OFFSET 0x0018 /**< System Debug 1 + * Offset */ +#define XENH_SYSDEBUG2_OFFSET 0x001C /**< System Debug 2 + * Offset */ +/*@}*/ + +/** @name Timing Control Registers + * @{ + */ +#define XENH_ACTIVE_SIZE_OFFSET 0x0020 /**< Horizontal and Vertical + * Active Frame Size Offset */ +/*@}*/ + +/** @name Core Specific Registers + * @{ + */ +#define XENH_NOISE_THRESHOLD_OFFSET 0x0100 /**< Noise Reduction + * Control Active */ +#define XENH_ENHANCE_STRENGTH_OFFSET 0x0104 /**< Edge Enhancement + * Control Active */ +#define XENH_HALO_SUPPRESS_OFFSET 0x0108 /**< Halo Suppression + * Control Active */ +/*@}*/ + +/** @name Enhance Control Register Bit Masks + * @{ + */ +#define XENH_CTL_SW_EN_MASK 0x00000001 /**< Enable Mask */ +#define XENH_CTL_RUE_MASK 0x00000002 /**< Register + * Update Enable Mask */ +#define XENH_CTL_BPE_MASK 0x00000010 /**< Bypass Mask */ +#define XENH_CTL_TPE_MASK 0x00000020 /**< Test Pattern Mask */ +#define XENH_CTL_AUTORESET_MASK 0x40000000 /**< Software Reset - + * Auto-synchronize to + * SOF Mask */ +#define XENH_CTL_RESET_MASK 0x80000000 /**< Software Reset - + * Instantaneous + * Mask */ +/*@}*/ + +/** @name Interrupt Register Bit Masks. It is applicable for + * Status and Irq_Enable Registers + * @{ + */ +#define XENH_IXR_PROCS_STARTED_MASK 0x00000001 /**< Process started + * Mask */ +#define XENH_IXR_EOF_MASK 0x00000002 /**< End-Of-Frame Mask */ +#define XENH_IXR_SE_MASK 0x00010000 /**< Slave Error Mask */ +#define XENH_IXR_ALLINTR_MASK 0x00010003 /**< OR'ing of all Mask */ +/*@}*/ + +/** @name Enhance Error Register Bit Masks + * @{ + */ +#define XENH_ERR_EOL_EARLY_MASK 0x00000001 /**< Frame EOL early Mask */ +#define XENH_ERR_EOL_LATE_MASK 0x00000002 /**< Frame EOL late Mask */ +#define XENH_ERR_SOF_EARLY_MASK 0x00000004 /**< Frame SOF early Mask */ +#define XENH_ERR_SOF_LATE_MASK 0x00000008 /**< Frame SOF late Mask */ +/*@}*/ + +/** @name Enhance Version Register bit definition + * @{ + */ +#define XENH_VER_REV_NUM_MASK 0x000000FF /**< Revision Number Mask */ +#define XENH_VER_PID_MASK 0x00000F00 /**< Patch ID Mask */ +#define XENH_VER_MINOR_MASK 0x00FF0000 /**< Version Minor Mask */ +#define XENH_VER_MAJOR_MASK 0xFF000000 /**< Version Major Mask */ +#define XENH_VER_REV_MASK 0x0000F000 /**< VersionRevision Mask */ +#define XENH_VER_INTERNAL_SHIFT 8 /**< Version Internal Shift */ +#define XENH_VER_REV_SHIFT 12 /**< Version Revision Shift */ +#define XENH_VER_MINOR_SHIFT 16 /**< Version Minor Shift */ +#define XENH_VER_MAJOR_SHIFT 24 /**< Version Major Shift */ +/*@}*/ + +/** @name Enhance ActiveSize register Masks and Shifts + * @{ + */ +#define XENH_ACTSIZE_NUM_PIXEL_MASK 0x00001FFF /**< Active size + * Mask */ +#define XENH_ACTSIZE_NUM_LINE_MASK 0x1FFF0000 /**< Number of Active + * lines per Frame + * (Vertical) Mask */ +#define XENH_ACTSIZE_NUM_LINE_SHIFT 16 /**< Active size + * Shift */ +/*@}*/ + +/** @name Enhance Noise Threshold Register Bit Masks + * @{ + */ +#define XENH_NOISE_THRESHOLD_MASK 0x0000FFFF /**< Noise Threshold + * Mask */ +/*@}*/ + +/** @name Enhance Strength Register Bit Masks + * @{ + */ +#define XENH_STRENGTH_MASK 0x0000FFFF /**< Enhance Strength + * Mask */ +/*@}*/ + +/** @name Enhance Halo Suppress Register Bit Masks +* @{ +*/ +#define XENH_HALO_SUPPRESS_MASK 0x0000FFFF /**< Halo Suppress + * Mask */ +/*@}*/ + +/**@name Backward compatibility macros + * @{ + */ +#define ENHANCE_CONTROL XENH_CONTROL_OFFSET +#define ENHANCE_STATUS XENH_STATUS_OFFSET +#define ENHANCE_ERROR XENH_ERROR_OFFSET +#define ENHANCE_IRQ_ENABLE XENH_IRQ_EN_OFFSET +#define ENHANCE_VERSION XENH_VERSION_OFFSET +#define ENHANCE_SYSDEBUG0 XENH_SYSDEBUG0_OFFSET +#define ENHANCE_SYSDEBUG1 XENH_SYSDEBUG1_OFFSET +#define ENHANCE_SYSDEBUG2 XENH_SYSDEBUG2_OFFSET +#define ENHANCE_ACTIVE_SIZE XENH_ACTIVE_SIZE_OFFSET +#define ENHANCE_NOISE_THRESHOLD XENH_NOISE_THRESHOLD_OFFSET +#define ENHANCE_ENHANCE_STRENGTH XENH_ENHANCE_STRENGTH_OFFSET +#define ENHANCE_HALO_SUPPRESS XENH_HALO_SUPPRESS_OFFSET + +#define ENHANCE_CTL_EN_MASK XENH_CTL_SW_EN_MASK +#define ENHANCE_CTL_RU_MASK XENH_CTL_RUE_MASK +#define ENHANCE_CTL_RESET XENH_CTL_RESET_MASK +#define ENHANCE_CTL_AUTORESET XENH_CTL_AUTORESET_MASK + +#define ENHANCE_In32 XEnhance_In32 +#define ENHANCE_Out32 XEnhance_Out32 +#define ENHANCE_ReadReg XEnhance_ReadReg +#define ENHANCE_WriteReg XEnhance_WriteReg +/*@}*/ + +/** @name Interrupt Registers + * @{ + */ +/** +* Interrupt status register generates a interrupt if the corresponding bits of +* interrupt enable register bits are set. +*/ + +#define XENH_ISR_OFFSET XENH_STATUS_OFFSET /**< Interrupt Status + * Register */ +#define XENH_IER_OFFSET XENH_IRQ_EN_OFFSET /**< Interrupt Enable + * Register corresponds + * to Status bits */ +/*@}*/ + +/***************** Macros (Inline Functions) Definitions *********************/ + +#define XEnhance_In32 Xil_In32 /**< Enhance Input Operation. */ +#define XEnhance_Out32 Xil_Out32 /**< Enhance Output Operation. */ + +/*****************************************************************************/ +/** +* +* This function macro reads the given register. +* +* @param BaseAddress is the base address of the Image Enhancement core. +* @param RegOffset is the register offset of the core (defined at. +* top of this file). +* +* @return The 32-bit value of the register. +* +* @note C-style signature:2 +* u32 XEnhance_ReadReg(u32 BaseAddress, u32 RegOffset). +* +******************************************************************************/ +#define XEnhance_ReadReg(BaseAddress, RegOffset) \ + XEnhance_In32((BaseAddress) + (u32)(RegOffset)) + +/*****************************************************************************/ +/** +* +* This function macro writes the given register. +* +* @param BaseAddress is the base address of the Image Enhancement core. +* @param RegOffset is the register offset of the core (defined +* at top of this file). +* @param Data is the 32-bit value to write to the register. +* +* @return None. +* +* @note C-style signature: +* void XEnhance_WriteReg(u32 BaseAddress, u32 RegOffset, +* u32 Data). +* +******************************************************************************/ +#define XEnhance_WriteReg(BaseAddress, RegOffset, Data) \ + XEnhance_Out32((BaseAddress) + (u32)(RegOffset), (Data)) + +/**************************** Type Definitions *******************************/ + + +/************************** Function Prototypes ******************************/ + + +/************************** Variable Declarations ****************************/ + + +#ifdef __cplusplus +} + +#endif + +#endif /* End of protection macro */ diff --git a/XilinxProcessorIPLib/drivers/enhance/src/xenhance_intr.c b/XilinxProcessorIPLib/drivers/enhance/src/xenhance_intr.c new file mode 100755 index 00000000..0597c1f1 --- /dev/null +++ b/XilinxProcessorIPLib/drivers/enhance/src/xenhance_intr.c @@ -0,0 +1,208 @@ +/****************************************************************************** +* +* Copyright (C) 2014 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +* (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in +* this Software without prior written authorization from Xilinx. +* +******************************************************************************/ +/*****************************************************************************/ +/** +* +* @file xenhance_intr.c +* +* This code contains interrupt related functions of Xilinx Enhance core. +* Please see xenhance.h for more details of the core. +* +* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who Date     Changes
+* ----- --- -------- -----------------------------------------------
+* 7.0   adk 02/19/14 First release.
+*                    Implemented the following functions
+*                    XEnhance_IntrHandler
+*                    XEnhance_SetCallBack
+*
+* +******************************************************************************/ + +/***************************** Include Files *********************************/ + +#include "xenhance.h" + +/************************** Constant Definitions *****************************/ + + +/***************** Macros (Inline Functions) Definitions *********************/ + + +/**************************** Type Definitions *******************************/ + + +/************************** Function Prototypes ******************************/ + + +/************************** Variable Definitions *****************************/ + + +/************************** Function Definitions *****************************/ + +/*****************************************************************************/ +/** +* +* This function is the interrupt handler for the Enhance driver. +* +* This handler reads the pending interrupt from the IER/ISR, determines the +* source of the interrupts, calls according callbacks, and finally clears the +* interrupts. +* +* The application is responsible for connecting this function to the interrupt +* system. Application beyond this driver is also responsible for providing +* callbacks to handle interrupts and installing the callbacks using +* XEnhance_SetCallBack() during initialization phase. +* +* @param InstancePtr is a pointer to the XEnhance instance that just +* interrupted. +* +* @return None. +* +* @note Interrupt interface should be enabled. +* +******************************************************************************/ +void XEnhance_IntrHandler(void *InstancePtr) +{ + u32 PendingIntr; + u32 ErrorStatus; + XEnhance *XEnhancePtr = (XEnhance *)((void *)InstancePtr); + + /* Verify arguments. */ + Xil_AssertVoid(XEnhancePtr != NULL); + Xil_AssertVoid(XEnhancePtr->IsReady == (u32)(XIL_COMPONENT_IS_READY)); + Xil_AssertVoid(XEnhancePtr->Config.HasIntcIf != (u16)0x0); + + /* Get pending interrupts. */ + PendingIntr = (u32)(XEnhance_IntrGetPending(XEnhancePtr)); + + /* A Slave Error interrupt has happened. */ + if (((PendingIntr) & (XENH_IXR_SE_MASK)) == + ((XENH_IXR_SE_MASK))) { + ErrorStatus = (PendingIntr) & (XENH_IXR_SE_MASK); + XEnhancePtr->ErrCallBack(XEnhancePtr->ErrRef, ErrorStatus); + } + + /* A Processing Start has happened. */ + if (((PendingIntr) & (XENH_IXR_PROCS_STARTED_MASK)) == + (XENH_IXR_PROCS_STARTED_MASK)) { + XEnhancePtr->ProcStartCallBack + (XEnhancePtr->ProcStartRef); + } + + /* A Frame Done interrupt has happened */ + if (((PendingIntr) & (XENH_IXR_EOF_MASK)) == + (XENH_IXR_EOF_MASK)) { + XEnhancePtr->FrameDoneCallBack + (XEnhancePtr->FrameDoneRef); + } + + /* Clear pending interrupt(s). */ + XEnhance_IntrClear(XEnhancePtr, PendingIntr); + +} + +/*****************************************************************************/ +/** +* +* This routine installs an asynchronous callback function for the given +* HandlerType: +* +* 
+* HandlerType              Callback Function Type
+* -----------------------  --------------------------------
+* XENH_HANDLER_PROCSTART   ProcStartCallBack
+* XENH_HANDLER_FRAMEDONE   FrameDoneCallBack
+* XENH_HANDLER_ERROR       ErrCallBack
+*
+* +* @param InstancePtr is a pointer to the XEnhance instance to be worked +* on. +* @param HandlerType specifies which callback is to be attached. +* @param CallBackFunc is the address of the callback function. +* @param CallBackRef is a user data item that will be passed to the +* callback function when it is invoked. +* +* @return +* - XST_SUCCESS when handler is installed. +* - XST_INVALID_PARAM when HandlerType is invalid. +* +* @note Invoking this function for a handler that already has been +* installed replaces it with the new handler. +* +******************************************************************************/ +int XEnhance_SetCallBack(XEnhance *InstancePtr, u32 HandlerType, + void *CallBackFunc, void *CallBackRef) +{ + int Status; + + /* Verify arguments. */ + Xil_AssertNonvoid(InstancePtr != NULL); + Xil_AssertNonvoid(InstancePtr->IsReady == + (u32)(XIL_COMPONENT_IS_READY)); + Xil_AssertNonvoid(CallBackFunc != NULL); + Xil_AssertNonvoid(CallBackRef != NULL); + Xil_AssertNonvoid((HandlerType >= (u32)(XENH_HANDLER_PROCSTART)) && + (HandlerType <= (u32)(XENH_HANDLER_ERROR))); + + /* Calls the respective callbacks according to handler type. */ + switch (HandlerType) { + case XENH_HANDLER_PROCSTART: + InstancePtr->ProcStartCallBack = + (XEnhance_CallBack)((void *)CallBackFunc); + InstancePtr->ProcStartRef = CallBackRef; + Status = (XST_SUCCESS); + break; + + case XENH_HANDLER_FRAMEDONE: + InstancePtr->FrameDoneCallBack = + (XEnhance_CallBack)((void *)CallBackFunc); + InstancePtr->FrameDoneRef = CallBackRef; + Status = (XST_SUCCESS); + break; + + case XENH_HANDLER_ERROR: + InstancePtr->ErrCallBack = + (XEnhance_ErrorCallBack)((void *)CallBackFunc); + InstancePtr->ErrRef = CallBackRef; + Status = (XST_SUCCESS); + break; + + default: + Status = (XST_INVALID_PARAM); + break; + } + + return Status; +} diff --git a/XilinxProcessorIPLib/drivers/enhance/src/enhance.c b/XilinxProcessorIPLib/drivers/enhance/src/xenhance_selftest.c similarity index 53% rename from XilinxProcessorIPLib/drivers/enhance/src/enhance.c rename to XilinxProcessorIPLib/drivers/enhance/src/xenhance_selftest.c index 08decfba..0b0bcbe6 100755 --- a/XilinxProcessorIPLib/drivers/enhance/src/enhance.c +++ b/XilinxProcessorIPLib/drivers/enhance/src/xenhance_selftest.c @@ -1,63 +1,111 @@ -/****************************************************************************** -* -* Copyright (C) 2009 - 2014 Xilinx, Inc. All rights reserved. -* -* Permission is hereby granted, free of charge, to any person obtaining a copy -* of this software and associated documentation files (the "Software"), to deal -* in the Software without restriction, including without limitation the rights -* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -* copies of the Software, and to permit persons to whom the Software is -* furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in -* all copies or substantial portions of the Software. -* -* Use of the Software is limited solely to applications: -* (a) running on a Xilinx device, or -* (b) that interact with a Xilinx device through a bus or interconnect. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, -* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF -* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE -* SOFTWARE. -* -* Except as contained in this notice, the name of the Xilinx shall not be used -* in advertising or otherwise to promote the sale, use or other dealings in -* this Software without prior written authorization from Xilinx. -* +/****************************************************************************** +* +* Copyright (C) 2014 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +* (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in +* this Software without prior written authorization from Xilinx. +* ******************************************************************************/ -/*****************************************************************************/ -/** -* -* @file enhance.c -* -* This is main code of Xilinx Image Enhancement (ENHANCE) -* device driver. Please see enhance.h for more details of the driver. -* -* MODIFICATION HISTORY: -* -* Ver Who Date Changes -* ----- ---- -------- ------------------------------------------------------- -* 5.00a vyc 06/19/13 Updated for ENHANCE V8.0 -* 4.00a vyc 04/24/12 Updated for ENHANCE V4.00.a -* 3.00a rc 09/11/11 Updated for ENHANCE V3.0 -* 2.00a vc 12/14/10 Updated for ENHANCE V2.0 -* -******************************************************************************/ - -/***************************** Include Files *********************************/ - -#include "enhance.h" -#include "xenv.h" - - - -/*****************************************************************************/ -// Note: All functions are currently implemented as high-performance macros -// within enhance.h -/*****************************************************************************/ - - +/*****************************************************************************/ +/** +* +* @file xenhance_selftest.c +* +* This file contains the self-test functions for the Enhance driver. +* The self test function reads the Version register. +* +* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 7.0   adk  19/02/14 First Release.
+*                     Implemented the following function
+*                     XEnhance_SelfTest
+*
+* +******************************************************************************/ + +/***************************** Include Files *********************************/ + +#include "xenhance.h" +#include "xstatus.h" + +/************************** Constant Definitions *****************************/ + + +/***************** Macros (Inline Functions) Definitions *********************/ + + +/**************************** Type Definitions *******************************/ + + +/************************** Function Prototypes ******************************/ + + +/************************** Variable Definitions *****************************/ + + +/************************** Function Definitions *****************************/ + +/*****************************************************************************/ +/** +* +* This function reads complete Version register of Enhance core and compares +* with zero values as part of self test. +* +* @param InstancePtr is a pointer to the XEnhance instance to be worked +* on. +* +* @return +* - XST_SUCCESS if the test was successful. +* - XST_FAILURE if the test failed. +* +* @note None. +* +******************************************************************************/ +int XEnhance_SelfTest(XEnhance *InstancePtr) +{ + u32 Version; + int Status; + + /* Verify arguments. */ + Xil_AssertNonvoid(InstancePtr != NULL); + + /* Read Enhance core version register. */ + Version = XEnhance_ReadReg((InstancePtr)->Config.BaseAddress, + (XENH_VERSION_OFFSET)); + + /* Compare Version with non-zero */ + if(Version != (u32)0x00) { + Status = (XST_SUCCESS); + } + else { + Status = (XST_FAILURE); + } + + return Status; +} diff --git a/XilinxProcessorIPLib/drivers/enhance/src/xenhance_sinit.c b/XilinxProcessorIPLib/drivers/enhance/src/xenhance_sinit.c new file mode 100755 index 00000000..d92adbef --- /dev/null +++ b/XilinxProcessorIPLib/drivers/enhance/src/xenhance_sinit.c @@ -0,0 +1,110 @@ +/****************************************************************************** +* +* Copyright (C) 2014 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a copy +* of this software and associated documentation files (the "Software"), to deal +* in the Software without restriction, including without limitation the rights +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +* copies of the Software, and to permit persons to whom the Software is +* furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in +* all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +* (a) running on a Xilinx device, or +* (b) that interact with a Xilinx device through a bus or interconnect. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +* SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in +* this Software without prior written authorization from Xilinx. +* +******************************************************************************/ +/*****************************************************************************/ +/** +* +* @file xenhance_sinit.c +* +* This file contains static initialization methods for Xilinx Enhance core. +* +* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- ------------------------------------------------------
+* 7.0   adk  02/19/14 First release.
+*                     Implemented the following function
+*                     XEnhance_LookupConfig
+*
+* +******************************************************************************/ + +/***************************** Include Files *********************************/ + +#include "xenhance.h" +#include "xparameters.h" + +/************************** Constant Definitions *****************************/ + + +/**************************** Type Definitions *******************************/ + + +/***************** Macros (Inline Functions) Definitions *********************/ + + +/************************** Function Prototypes ******************************/ + + +/************************** Variable Declaration *****************************/ + + +/************************** Function Definitions *****************************/ + +/*****************************************************************************/ +/** +* +* This function returns a reference to an XEnhance_Config structure +* based on the unique device id, DeviceId. The return value will refer +* to an entry in the device configuration table defined in the xenhance_g.c. +* file. +* +* @param DeviceId is the unique device ID of the device for the lookup +* operation. +* +* @return XEnhance_LookupConfig returns a reference to a config record in +* the configuration table (in xenhance_g.c) corresponding to +* DeviceId, or NULL if no match is found. +* +* @note None. +* +******************************************************************************/ +XEnhance_Config *XEnhance_LookupConfig(u16 DeviceId) +{ + extern XEnhance_Config + XEnhance_ConfigTable[XPAR_ENHANCE_NUM_INSTANCES]; + XEnhance_Config *CfgPtr = NULL; + u32 Index; + + /* To get the reference pointer to XEnhance_Config structure */ + for (Index = (u32)0x0; Index < (u32)(XPAR_ENHANCE_NUM_INSTANCES); + Index++) { + + /* Compare device Id with configTable's device Id */ + if (XEnhance_ConfigTable[Index].DeviceId == DeviceId) { + CfgPtr = &XEnhance_ConfigTable[Index]; + break; + } + } + + return (XEnhance_Config *)CfgPtr; +}