+: xdptx.c Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. diff --git a/XilinxProcessorIPLib/drivers/dptx/doc/html/api/globals_eval.html b/XilinxProcessorIPLib/drivers/dptx/doc/html/api/globals_eval.html index 905c867e..846cb328 100755 --- a/XilinxProcessorIPLib/drivers/dptx/doc/html/api/globals_eval.html +++ b/XilinxProcessorIPLib/drivers/dptx/doc/html/api/globals_eval.html @@ -32,109 +32,14 @@
-
+: xdptx.h
-The Xilinx DisplayPort transmitter (DPTX) driver. This driver supports the Xilinx DisplayPort soft IP core in source (TX) mode. This driver follows the DisplayPort 1.2a specification.
-The Xilinx DisplayPort soft IP supports the following features:
-The Xilinx DisplayPort soft IP does not support the following features:
-DisplayPort overview
-A DisplayPort link consists of:
-Driver description
-The device driver enables higher-level software (e.g., an application) to configure and control a DisplayPort TX soft IP, communicate and control an RX device/sink monitor over the AUX channel, and to initialize and transmit data streams over the main link.
-This driver implements link layer functionality: a Link Policy Maker (LPM) and a Stream Policy Maker (SPM) as per the DisplayPort 1.2a specification.
-Using AUX transactions to read/write from/to the sink's DisplayPort Configuration Data (DPCD) address space, the LPM obtains the link capabilities, obtains link configuration and link and sink status, and configures and controls the link and sink. The main link is trained this way.
-I2C-over-AUX transactions are used to obtain the sink's Extended Display Identification Data (EDID) which give information on the display capabilities of the monitor. The SPM may use this information to determine what available screen resolutions and video timing are possible.
-Device configuration
-The device can be configured in various ways during the FPGA implementation process. Configuration parameters are stored in the xdptx_g.c file which is generated when compiling the board support package (BSP). A table is defined where each entry contains configuration information for the DisplayPort instances present in the system. This information includes parameters that are defined in the driver's data/dptx.tcl file such as the base address of the memory-mapped device and the maximum number of lanes, maximum link rate, and video interface that the DisplayPort instance supports, among others.
-Interrupt processing
-DisplayPort interrupts occur on the HPD signal line when the DisplayPort cable is connected/disconnected or when the RX device sends a pulse. The user hardware design must contain an interrupt controller which the DisplayPort TX instance's interrupt signal is connected to. The user application must enable interrupts in the system and set up the interrupt controller such that the XDptx_HpdInterruptHandler handler will service DisplayPort interrupts. When the XDptx_HpdInterruptHandler function is invoked, the handler will identify what type of DisplayPort interrupt has occurred, and will call either the HPD event handler function or the HPD pulse handler function, depending on whether a an HPD event on an HPD pulse event occurred.
-The DisplayPort TX's XDPTX_INTERRUPT_STATUS register indicates the type of interrupt that has occured, and the XDptx_HpdInterruptHandler will use this information to decide which handler to call. An HPD event is identified if bit XDPTX_INTERRUPT_STATUS_HPD_EVENT_MASK is set, and an HPD pulse is identified from the XDPTX_INTERRUPT_STATUS_HPD_PULSE_DETECTED_MASK bit.
-The HPD event handler may be set up by using the XDptx_SetHpdEventHandler function and, for the HPD pulse handler, the XDptx_SetHpdPulseHandler function.
-Multi-stream transport (MST) mode
-The driver handles MST mode functionality, including sideband messaging, topology discovery, virtual channel payload ID table management, and directing streams to different sinks.
-MST testing has been done at 5.40Gbps per 4 lanes, with 4 sinks in a daisy- chain configuration, with each stream having the same resolution. Testing has been done at the following resolutions: 640x480, 720x480, 800x600, 848x480, 1024x768, 1280x720, 1280x1024, 1080p, and UHD (UHD/2 on 2 streams). Each resolutions was tested at 24 bits per pixel using 1, 2, 3, and 4 streams. Color depths of 18, 30, 36, and 48 bits per pixel were also tested.
-Audio
-The driver does not handle audio. For an example as to how to configure and transmit audio, examples/xdptx_audio_example.c illustrates the required sequence. The user will need to configure the audio source connected to the Displayport TX instance and set up the audio info frame as per user requirements.
-Asserts
-Asserts are used within all Xilinx drivers to enforce constraints on argument values. Asserts can be turned off on a system-wide basis by defining, at compile time, the NDEBUG identifier. By default, asserts are turned on and it is recommended that application developers leave asserts on during development.
-Limitations and known issues
-
-
- MODIFICATION HISTORY:
-
Ver Who Date Changes - ----- ---- -------- ----------------------------------------------- - 1.0 als 05/17/14 Initial release. - als 08/03/14 Initial MST addition. - 2.0 als 09/21/14 Added XDptx_DiscoverTopology function and changed - XDptx_IsConnected from macro to function. -Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. +Copyright @ 1995-2014 Xilinx, Inc. All rights reserved. diff --git a/XilinxProcessorIPLib/drivers/dptx/doc/html/api/struct_x_dptx-members.html b/XilinxProcessorIPLib/drivers/dptx/doc/html/api/struct_x_dptx-members.html index bbab7dff..afead409 100755 --- a/XilinxProcessorIPLib/drivers/dptx/doc/html/api/struct_x_dptx-members.html +++ b/XilinxProcessorIPLib/drivers/dptx/doc/html/api/struct_x_dptx-members.html @@ -22,22 +22,22 @@
Public Attributes | |
| u32 | MstEnable |
| u32 | MstEnable |
| u32 | IsReady |
| u32 | IsReady |
| u8 | TrainAdaptive |
| u8 | TrainAdaptive |
| XDptx_Config | Config |
| XDptx_Config | Config |
| XDptx_SinkConfig | RxConfig |
| XDptx_SinkConfig | RxConfig |
| XDptx_LinkConfig | LinkConfig |
| XDptx_LinkConfig | LinkConfig |
| XDptx_BoardChar | BoardChar |
| XDptx_BoardChar | BoardChar |
| XDptx_MainStreamAttributes | MsaConfig [4] |
| XDptx_MainStreamAttributes | MsaConfig [4] |
| XDptx_MstStream | MstStreamConfig [4] |
| XDptx_MstStream | MstStreamConfig [4] |
| XDptx_Topology | Topology |
| XDptx_Topology | Topology |
| u32 | AuxDelayUs |
| u32 | AuxDelayUs |
| u32 | SbMsgDelayUs |
| u32 | SbMsgDelayUs |
| XDptx_TimerHandler | UserTimerWaitUs |
| XDptx_TimerHandler | UserTimerWaitUs |
| void * | UserTimerPtr |
| void * | UserTimerPtr |
| XDptx_HpdEventHandler | HpdEventHandler |
| XDptx_HpdEventHandler | HpdEventHandler |
| void * | HpdEventCallbackRef |
| void * | HpdEventCallbackRef |
| XDptx_HpdPulseHandler | HpdPulseHandler |
| XDptx_HpdPulseHandler | HpdPulseHandler |
| void * | HpdPulseCallbackRef |
| void * | HpdPulseCallbackRef |
| u32 XDptx::AuxDelayUs | +u32 XDptx::AuxDelayUs |
-Amount of latency in micro- seconds to use between AUX transactions. +Amount of latency in micro- seconds to use between AUX transactions.
-Some board characteristics information that affects link training. +Some board characteristics information that affects link training.
-Configuration structure for the DisplayPort TX core. +Configuration structure for the DisplayPort TX core.
| void* XDptx::HpdEventCallbackRef | +void* XDptx::HpdEventCallbackRef |
-A pointer to the user data passed to the HPD event callback function. +A pointer to the user data passed to the HPD event callback function.
-Callback function for Hot- Plug-Detect (HPD) event interrupts. +Callback function for Hot- Plug-Detect (HPD) event interrupts.
| void* XDptx::HpdPulseCallbackRef | +void* XDptx::HpdPulseCallbackRef |
-A pointer to the user data passed to the HPD pulse callback function. +A pointer to the user data passed to the HPD pulse callback function.
-Callback function for Hot- Plug-Detect (HPD) pulse interrupts. +Callback function for Hot- Plug-Detect (HPD) pulse interrupts.
| u32 XDptx::IsReady | +u32 XDptx::IsReady |
-Device is initialized and ready. +Device is initialized and ready.
-Configuration structure for the main link. +Configuration structure for the main link.
-Configuration structure for the main stream attributes (MSA). Each stream has its own set of attributes. When MST mode is disabled, only MsaConfig[0] is used. +Configuration structure for the main stream attributes (MSA). Each stream has its own set of attributes. When MST mode is disabled, only MsaConfig[0] is used.
| u32 XDptx::MstEnable | +u32 XDptx::MstEnable |
-Multi-stream transport (MST) mode. Enables functionality, allowing multiple streams to be sent over the main link. +Multi-stream transport (MST) mode. Enables functionality, allowing multiple streams to be sent over the main link.
-Configuration structure for a multi-stream transport (MST) stream. +Configuration structure for a multi-stream transport (MST) stream.
-Configuration structure for the RX device. +Configuration structure for the RX device.
| u32 XDptx::SbMsgDelayUs | +u32 XDptx::SbMsgDelayUs |
-Amount of latency in micro- seconds to use between sideband messages for multi-stream transport (MST) mode. +Amount of latency in micro- seconds to use between sideband messages for multi-stream transport (MST) mode.
-The topology of connected downstream DisplayPort devices when the driver is running in MST mode. +The topology of connected downstream DisplayPort devices when the driver is running in MST mode.
| u8 XDptx::TrainAdaptive | +u8 XDptx::TrainAdaptive |
-Downshift lane count and link rate if necessary during training. +Downshift lane count and link rate if necessary during training.
| void* XDptx::UserTimerPtr | +void* XDptx::UserTimerPtr |
-Pointer to a timer instance used by the custom user delay/sleep function. +Pointer to a timer instance used by the custom user delay/sleep function.
Public Attributes | |
| u16 | CmdCode |
| u16 | CmdCode |
| u8 | NumBytes |
| u8 | NumBytes |
| u32 | Address |
| u32 | Address |
| u8 * | Data |
| u8 * | Data |
-The AUX or I2C start address that the AUX transaction will perform work on. +The AUX or I2C start address that the AUX transaction will perform work on.
-The AUX command code that specifies what type of AUX transaction is taking place. +The AUX command code that specifies what type of AUX transaction is taking place.
| u8* XDptx_AuxTransaction::Data | +u8* XDptx_AuxTransaction::Data |
-The data buffer that will store the data read from AUX read transactions or the data to write for AUX write transactions. +The data buffer that will store the data read from AUX read transactions or the data to write for AUX write transactions.
Public Attributes | |
| u8 | HasRedriverInPath |
| u8 | HasRedriverInPath |
| u8 | TxVsLevels [4] |
| u8 | TxVsLevels [4] |
| u8 | TxPeLevels [4] |
| u8 | TxPeLevels [4] |
| u8 | TxVsOffset |
| u8 | TxVsOffset |
-Redriver in path requires different voltage swing and pre-emphasis. +Redriver in path requires different voltage swing and pre-emphasis.
| u8 XDptx_BoardChar::TxPeLevels[4] | +u8 XDptx_BoardChar::TxPeLevels[4] |
-The pre-emphasis/cursor level to be used by the DisplayPort TX. +The pre-emphasis/cursor level to be used by the DisplayPort TX.
| u8 XDptx_BoardChar::TxVsLevels[4] | +u8 XDptx_BoardChar::TxVsLevels[4] |
-The voltage swing levels to be used by the DisplayPort TX. +The voltage swing levels to be used by the DisplayPort TX.
Public Attributes | |
| u16 | DeviceId |
| u16 | DeviceId |
| u32 | BaseAddr |
| u32 | BaseAddr |
| u32 | SAxiClkHz |
| u32 | SAxiClkHz |
| u8 | MaxLaneCount |
| u8 | MaxLaneCount |
| u8 | MaxLinkRate |
| u8 | MaxLinkRate |
| u8 | MaxBitsPerColor |
| u8 | MaxBitsPerColor |
| u8 | QuadPixelEn |
| u8 | QuadPixelEn |
| u8 | DualPixelEn |
| u8 | DualPixelEn |
| u8 | YCrCbEn |
| u8 | YCrCbEn |
| u8 | YOnlyEn |
| u8 | YOnlyEn |
| u8 | PayloadDataWidth |
| u8 | PayloadDataWidth |
| u8 | SecondaryChEn |
| u8 | SecondaryChEn |
| u8 | NumAudioChs |
| u8 | NumAudioChs |
| u8 | MstSupport |
| u8 | MstSupport |
| u8 | NumMstStreams |
| u8 | NumMstStreams |
| u8 | DpProtocol |
| u8 | DpProtocol |
| u32 XDptx_Config::BaseAddr | +u32 XDptx_Config::BaseAddr |
-The base address of the core instance. +The base address of the core instance.
| u16 XDptx_Config::DeviceId | +u16 XDptx_Config::DeviceId |
-Device instance ID. +Device instance ID.
-The DisplayPort protocol version that this core instance is configured for. 0 = v1.1a, 1 = v1.2. +The DisplayPort protocol version that this core instance is configured for. 0 = v1.1a, 1 = v1.2.
-Dual pixel support by this core instance. +Dual pixel support by this core instance.
-The maximum bits/color supported by this core instance +The maximum bits/color supported by this core instance
-The maximum lane count supported by this core instance. +The maximum lane count supported by this core instance.
-The maximum link rate supported by this core instance. +The maximum link rate supported by this core instance.
-Multi-stream transport (MST) mode is enabled by this core instance. +Multi-stream transport (MST) mode is enabled by this core instance.
-The number of audio channels supported by this core instance. +The number of audio channels supported by this core instance.
-The total number of MST streams supported by this core instance. +The total number of MST streams supported by this core instance.
-The payload data width used by this core instance. +The payload data width used by this core instance.
-Quad pixel support by this core instance. +Quad pixel support by this core instance.
| u32 XDptx_Config::SAxiClkHz | +u32 XDptx_Config::SAxiClkHz |
-The clock frequency of the core instance's S_AXI_ACLK port. +The clock frequency of the core instance's S_AXI_ACLK port.
-This core instance supports audio packets being sent by the secondary channel. +This core instance supports audio packets being sent by the secondary channel.
| u8 XDptx_Config::YCrCbEn | +u8 XDptx_Config::YCrCbEn |
-YCrCb format support by this core instance. +YCrCb format support by this core instance.
| u8 XDptx_Config::YOnlyEn | +u8 XDptx_Config::YOnlyEn |
Public Attributes | |
| u8 | LaneCount |
| u8 | LaneCount |
| u8 | LinkRate |
| u8 | LinkRate |
| u8 | ScramblerEn |
| u8 | ScramblerEn |
| u8 | EnhancedFramingMode |
| u8 | EnhancedFramingMode |
| u8 | DownspreadControl |
| u8 | DownspreadControl |
| u8 | MaxLaneCount |
| u8 | MaxLaneCount |
| u8 | MaxLinkRate |
| u8 | MaxLinkRate |
| u8 | SupportEnhancedFramingMode |
| u8 | SupportEnhancedFramingMode |
| u8 | SupportDownspreadControl |
| u8 | SupportDownspreadControl |
| u8 | VsLevel |
| u8 | VsLevel |
| u8 | PeLevel |
| u8 | PeLevel |
| u8 | Pattern |
| u8 | Pattern |
-Downspread control is currently in use over the main link. +Downspread control is currently in use over the main link.
-Enhanced frame mode is currently in use over the main link. +Enhanced frame mode is currently in use over the main link.
-The current lane count of the main link. +The current lane count of the main link.
-The current link rate of the main link. +The current link rate of the main link.
-The maximum lane count of the main link. +The maximum lane count of the main link.
-The maximum link rate of the main link. +The maximum link rate of the main link.
-The current pattern currently in use over the main link. +The current pattern currently in use over the main link.
-The current pre-emphasis/cursor level for each lane. +The current pre-emphasis/cursor level for each lane.
-Symbol scrambling is currently in use over the main link. +Symbol scrambling is currently in use over the main link.
-Downspread control is supported by the RX device. +Downspread control is supported by the RX device.
-Enhanced frame mode is supported by the RX device. +Enhanced frame mode is supported by the RX device.
Public Attributes | |
| XDptx_DmtMode | Dmt |
| XVid_VideoTimingMode | Vtm |
| u32 | HClkTotal |
| u32 | HClkTotal |
| u32 | VClkTotal |
| u32 | VClkTotal |
| u32 | HStart |
| u32 | HStart |
| u32 | VStart |
| u32 | VStart |
| u32 | Misc0 |
| u32 | Misc0 |
| u32 | Misc1 |
| u32 | Misc1 |
| u32 | NVid |
| u32 | NVid |
| u32 | UserPixelWidth |
| u32 | UserPixelWidth |
| u32 | DataPerLane |
| u32 | DataPerLane |
| u32 | AvgBytesPerTU |
| u32 | AvgBytesPerTU |
| u32 | TransferUnitSize |
| u32 | TransferUnitSize |
| u32 | InitWait |
| u32 | InitWait |
| u32 | BitsPerColor |
| u32 | BitsPerColor |
| u8 | ComponentFormat |
| u8 | ComponentFormat |
| u8 | DynamicRange |
| u8 | DynamicRange |
| u8 | YCbCrColorimetry |
| u8 | YCbCrColorimetry |
| u8 | SynchronousClockMode |
| u8 | SynchronousClockMode |
| u8 | OverrideUserPixelWidth |
| u8 | OverrideUserPixelWidth |
-Average number of bytes per transfer unit, scaled up by a factor of 1000. +Average number of bytes per transfer unit, scaled up by a factor of 1000.
-Number of bits per color component. +Number of bits per color component.
-The component format currently in use by the video stream. +The component format currently in use by the video stream.
-Used to translate the number of pixels per line to the native internal 16-bit datapath. +Used to translate the number of pixels per line to the native internal 16-bit datapath.
-Holds the set of Display Mode Timing (DMT) attributes that correspond to the information stored in the XDptx_DmtModes table. +The dynamic range currently in use by the video stream.
-The dynamic range currently in use by the video stream. +Horizontal total time (in pixels).
-Horizontal total time (in pixels). +Horizontal blank start (in pixels).
-Horizontal blank start (in pixels). +Number of initial wait cycles at the start of a new line by the framing logic.
-Number of initial wait cycles at the start of a new line by the framing logic. +Miscellaneous stream attributes 0 as specified by the DisplayPort 1.2 specification.
-Miscellaneous stream attributes 0 as specified by the DisplayPort 1.2 specification. +Miscellaneous stream attributes 1 as specified by the DisplayPort 1.2 specification.
-Miscellaneous stream attributes 1 as specified by the DisplayPort 1.2 specification. +N value for the video stream.
-N value for the video stream. +If set to 1, the value stored for UserPixelWidth will be used as the pixel width.
| u8 XDptx_MainStreamAttributes::OverrideUserPixelWidth | +u8 XDptx_MainStreamAttributes::SynchronousClockMode |
-If set to 1, the value stored for UserPixelWidth will be used as the pixel width. +Synchronous clock mode is currently in use by the video stream.
| u8 XDptx_MainStreamAttributes::SynchronousClockMode | +u32 XDptx_MainStreamAttributes::TransferUnitSize |
-Synchronous clock mode is currently in use by the video stream. +Size of the transfer unit in the framing logic. In MST mode, this is also the number of time slots that are alloted in the payload ID table.
-Size of the transfer unit in the framing logic. In MST mode, this is also the number of time slots that are alloted in the payload ID table. +The width of the user data input port.
-The width of the user data input port. +Vertical total time (in pixels).
-Vertical total time (in pixels). +Vertical blank start (in lines).
| u32 XDptx_MainStreamAttributes::VStart | +XVid_VideoTimingMode XDptx_MainStreamAttributes::Vtm |
-Vertical blank start (in lines). +The video timing.
Public Attributes | |
| u8 | LinkCountTotal |
| u8 | LinkCountTotal |
| u8 | RelativeAddress [15] |
| u8 | RelativeAddress [15] |
| u16 | MstPbn |
| u16 | MstPbn |
| u8 | MstStreamEnable |
| u8 | MstStreamEnable |
| u16 XDptx_MstStream::MstPbn | +u16 XDptx_MstStream::MstPbn |
-The relative address from the DisplayPort TX to the sink device that this MST stream is targeting. Payload bandwidth number used to allocate bandwidth for the MST stream. +The relative address from the DisplayPort TX to the sink device that this MST stream is targeting. Payload bandwidth number used to allocate bandwidth for the MST stream.
-In MST mode, enables the corresponding stream for this MSA configuration. +In MST mode, enables the corresponding stream for this MSA configuration.
| u8 XDptx_MstStream::RelativeAddress[15] | +u8 XDptx_MstStream::RelativeAddress[15] |
Public Attributes | |
| u8 | ReplyType |
| u8 | ReplyType |
| u8 | RequestId |
| u8 | RequestId |
| u32 | Guid [4] |
| u32 | Guid [4] |
| u8 | NumPorts |
| u8 | NumPorts |
| XDptx_SbMsgLinkAddressReplyPortDetail | PortDetails [16] |
| XDptx_SbMsgLinkAddressReplyPortDetail | PortDetails [16] |
| u32 XDptx_SbMsgLinkAddressReplyDeviceInfo::Guid[4] | +u32 XDptx_SbMsgLinkAddressReplyDeviceInfo::Guid[4] |
-The global unique identifier (GUID) of the branch device. +The global unique identifier (GUID) of the branch device.
| u8 XDptx_SbMsgLinkAddressReplyDeviceInfo::NumPorts | +u8 XDptx_SbMsgLinkAddressReplyDeviceInfo::NumPorts |
-The number of ports associated with this branch device. +The number of ports associated with this branch device.
| XDptx_SbMsgLinkAddressReplyPortDetail XDptx_SbMsgLinkAddressReplyDeviceInfo::PortDetails[16] | +XDptx_SbMsgLinkAddressReplyPortDetail XDptx_SbMsgLinkAddressReplyDeviceInfo::PortDetails[16] |
-An array describing all ports attached to this branch device. +An array describing all ports attached to this branch device.
| u8 XDptx_SbMsgLinkAddressReplyDeviceInfo::ReplyType | +u8 XDptx_SbMsgLinkAddressReplyDeviceInfo::ReplyType |
-The reply type of the sideband message. A value of 1 indicates that the request wasn't successful and the return data will give the reason for a negative-acknowledge (NACK). +The reply type of the sideband message. A value of 1 indicates that the request wasn't successful and the return data will give the reason for a negative-acknowledge (NACK).
| u8 XDptx_SbMsgLinkAddressReplyDeviceInfo::RequestId | +u8 XDptx_SbMsgLinkAddressReplyDeviceInfo::RequestId |
Public Attributes | |
| u8 | InputPort |
| u8 | InputPort |
| u8 | PeerDeviceType |
| u8 | PeerDeviceType |
| u8 | PortNum |
| u8 | PortNum |
| u8 | MsgCapStatus |
| u8 | MsgCapStatus |
| u8 | DpDevPlugStatus |
| u8 | DpDevPlugStatus |
| u8 | LegacyDevPlugStatus |
| u8 | LegacyDevPlugStatus |
| u8 | DpcdRev |
| u8 | DpcdRev |
| u32 | Guid [4] |
| u32 | Guid [4] |
| u8 | NumSdpStreams |
| u8 | NumSdpStreams |
| u8 | NumSdpStreamSinks |
| u8 | NumSdpStreamSinks |
| u8 XDptx_SbMsgLinkAddressReplyPortDetail::DpcdRev | +u8 XDptx_SbMsgLinkAddressReplyPortDetail::DpcdRev |
-The DisplayPort Configuration Data (DPCD) revision of the device connected to this port. +The DisplayPort Configuration Data (DPCD) revision of the device connected to this port.
| u8 XDptx_SbMsgLinkAddressReplyPortDetail::DpDevPlugStatus | +u8 XDptx_SbMsgLinkAddressReplyPortDetail::DpDevPlugStatus |
-There is a device connected to this port. +There is a device connected to this port.
| u32 XDptx_SbMsgLinkAddressReplyPortDetail::Guid[4] | +u32 XDptx_SbMsgLinkAddressReplyPortDetail::Guid[4] |
-The global unique identifier (GUID) of the device connected to this port. +The global unique identifier (GUID) of the device connected to this port.
| u8 XDptx_SbMsgLinkAddressReplyPortDetail::InputPort | +u8 XDptx_SbMsgLinkAddressReplyPortDetail::InputPort |
-Specifies that this port is an input port. +Specifies that this port is an input port.
| u8 XDptx_SbMsgLinkAddressReplyPortDetail::LegacyDevPlugStatus | +u8 XDptx_SbMsgLinkAddressReplyPortDetail::LegacyDevPlugStatus |
-This port is connected to a legacy device. +This port is connected to a legacy device.
| u8 XDptx_SbMsgLinkAddressReplyPortDetail::MsgCapStatus | +u8 XDptx_SbMsgLinkAddressReplyPortDetail::MsgCapStatus |
-This port or the device at this port can send and receive MST messages. +This port or the device at this port can send and receive MST messages.
| u8 XDptx_SbMsgLinkAddressReplyPortDetail::NumSdpStreams | +u8 XDptx_SbMsgLinkAddressReplyPortDetail::NumSdpStreams |
-The total number of Secondary-Data Packet (SDP) streams that this port can handle. +The total number of Secondary-Data Packet (SDP) streams that this port can handle.
| u8 XDptx_SbMsgLinkAddressReplyPortDetail::NumSdpStreamSinks | +u8 XDptx_SbMsgLinkAddressReplyPortDetail::NumSdpStreamSinks |
-The number of SDP streams associated with this port. +The number of SDP streams associated with this port.
| u8 XDptx_SbMsgLinkAddressReplyPortDetail::PeerDeviceType | +u8 XDptx_SbMsgLinkAddressReplyPortDetail::PeerDeviceType |
-Specifies the device type connected to this port. +Specifies the device type connected to this port.
| u8 XDptx_SbMsgLinkAddressReplyPortDetail::PortNum | +u8 XDptx_SbMsgLinkAddressReplyPortDetail::PortNum |
| Body | XDptx_SidebandMsg | |
| Header | XDptx_SidebandMsg | |
| Body | XDptx_SidebandMsg | |
| Header | XDptx_SidebandMsg |
Public Attributes | |
| XDptx_SidebandMsgHeader | Header |
| XDptx_SidebandMsgHeader | Header |
| XDptx_SidebandMsgBody | Body |
| XDptx_SidebandMsgBody | Body |
-The body segment of the sideband message. +The body segment of the sideband message.
| XDptx_SidebandMsgHeader XDptx_SidebandMsg::Header | +XDptx_SidebandMsgHeader XDptx_SidebandMsg::Header |
| Crc | XDptx_SidebandMsgBody | |
| MsgData | XDptx_SidebandMsgBody | |
| MsgDataLength | XDptx_SidebandMsgBody | |
| Crc | XDptx_SidebandMsgBody | |
| MsgData | XDptx_SidebandMsgBody | |
| MsgDataLength | XDptx_SidebandMsgBody |
Public Attributes | |
| u8 | MsgData [62] |
| u8 | MsgData [62] |
| u8 | MsgDataLength |
| u8 | MsgDataLength |
| u8 | Crc |
| u8 | Crc |
-The cyclic-redundancy check (CRC) value of the body data. +The cyclic-redundancy check (CRC) value of the body data.
| u8 XDptx_SidebandMsgBody::MsgData[62] | +u8 XDptx_SidebandMsgBody::MsgData[62] |
-The raw body data of the sideband message. +The raw body data of the sideband message.
Public Attributes | |
| u8 | LinkCountTotal |
| u8 | LinkCountTotal |
| u8 | LinkCountRemaining |
| u8 | LinkCountRemaining |
| u8 | RelativeAddress [15] |
| u8 | RelativeAddress [15] |
| u8 | BroadcastMsg |
| u8 | BroadcastMsg |
| u8 | PathMsg |
| u8 | PathMsg |
| u8 | MsgBodyLength |
| u8 | MsgBodyLength |
| u8 | StartOfMsgTransaction |
| u8 | StartOfMsgTransaction |
| u8 | EndOfMsgTransaction |
| u8 | EndOfMsgTransaction |
| u8 | MsgSequenceNum |
| u8 | MsgSequenceNum |
| u8 | Crc |
| u8 | Crc |
| u8 | MsgHeaderLength |
| u8 | MsgHeaderLength |
-Specifies that this message is a broadcast message, to be handled by all downstream devices. +Specifies that this message is a broadcast message, to be handled by all downstream devices.
-The cyclic-redundancy check (CRC) value of the header data. +The cyclic-redundancy check (CRC) value of the header data.
-This message is the last sideband message in the transaction. +This message is the last sideband message in the transaction.
-The remaining link count until the sideband message reaches the target device. +The remaining link count until the sideband message reaches the target device.
-The total number of DisplayPort links connecting the device device that this sideband message is targeted from the DisplayPort TX. +The total number of DisplayPort links connecting the device device that this sideband message is targeted from the DisplayPort TX.
-The total number of data bytes that are stored in the sideband message body. +The total number of data bytes that are stored in the sideband message body.
-The number of data bytes stored as part of the sideband message header. +The number of data bytes stored as part of the sideband message header.
-Identifies invidiual message transactions to a given DisplayPort device. +Identifies invidiual message transactions to a given DisplayPort device.
-Specifies that this message is a path message, to be handled by all the devices between the origin and the target device. +Specifies that this message is a path message, to be handled by all the devices between the origin and the target device.
-The relative address from the DisplayPort TX to the target device. +The relative address from the DisplayPort TX to the target device.
| u8 XDptx_SidebandMsgHeader::StartOfMsgTransaction | +u8 XDptx_SidebandMsgHeader::StartOfMsgTransaction |
| Data | XDptx_SidebandReply | |
| Length | XDptx_SidebandReply | |
| Data | XDptx_SidebandReply | |
| Length | XDptx_SidebandReply |
Public Attributes | |
| u8 | Length |
| u8 | Length |
| u8 | Data [256] |
| u8 | Data [256] |
| u8 XDptx_SidebandReply::Data[256] | +u8 XDptx_SidebandReply::Data[256] |
-The raw reply data. +The raw reply data.
| DpcdRxCapsField | XDptx_SinkConfig | |
| LaneStatusAdjReqs | XDptx_SinkConfig | |
| DpcdRxCapsField | XDptx_SinkConfig | |
| LaneStatusAdjReqs | XDptx_SinkConfig |
Public Attributes | |
| u8 | DpcdRxCapsField [XDPTX_DPCD_RECEIVER_CAP_FIELD_SIZE] |
| u8 | DpcdRxCapsField [16] |
| u8 | LaneStatusAdjReqs [6] |
| u8 | LaneStatusAdjReqs [6] |
| u8 XDptx_SinkConfig::DpcdRxCapsField[XDPTX_DPCD_RECEIVER_CAP_FIELD_SIZE] | +u8 XDptx_SinkConfig::DpcdRxCapsField[16] |
-The raw capabilities field of the RX device's DisplayPort Configuration Data (DPCD). +The first 16 bytes of the raw capabilities field of the RX device's DisplayPort Configuration Data (DPCD).
Public Attributes | |
| u8 | NodeTotal |
| u8 | NodeTotal |
| XDptx_TopologyNode | NodeTable [63] |
| XDptx_TopologyNode | NodeTable [63] |
| u8 | SinkTotal |
| u8 | SinkTotal |
| XDptx_TopologyNode * | SinkList [63] |
| XDptx_TopologyNode * | SinkList [63] |
| XDptx_TopologyNode XDptx_Topology::NodeTable[63] | +XDptx_TopologyNode XDptx_Topology::NodeTable[63] |
-A table listing all the nodes in the MST topology. +A table listing all the nodes in the MST topology.
-The total number of nodes that were found in the MST topology. +The total number of nodes that were found in the MST topology.
| XDptx_TopologyNode* XDptx_Topology::SinkList[63] | +XDptx_TopologyNode* XDptx_Topology::SinkList[63] |
-A pointer list of sinks in the MST topology. The entries will point to the sinks in the NodeTable. +A pointer list of sinks in the MST topology. The entries will point to the sinks in the NodeTable.
Public Attributes | |
| u32 | Guid [4] |
| u32 | Guid [4] |
| u8 | RelativeAddress [15] |
| u8 | RelativeAddress [15] |
| u8 | DeviceType |
| u8 | DeviceType |
| u8 | LinkCountTotal |
| u8 | LinkCountTotal |
| u8 | DpcdRev |
| u8 | DpcdRev |
| u8 | MsgCapStatus |
| u8 | MsgCapStatus |
-The type of DisplayPort device. Either a branch or sink. +The type of DisplayPort device. Either a branch or sink.
-The revision of the device's DisplayPort Configuration Data (DPCD). For this device to support MST features, this value must represent a protocl version greater or equal to 1.2. +The revision of the device's DisplayPort Configuration Data (DPCD). For this device to support MST features, this value must represent a protocl version greater or equal to 1.2.
| u32 XDptx_TopologyNode::Guid[4] | +u32 XDptx_TopologyNode::Guid[4] |
-The global unique identifier (GUID) of the device. +The global unique identifier (GUID) of the device.
-The total number of DisplayPort links connecting this device to the DisplayPort TX. +The total number of DisplayPort links connecting this device to the DisplayPort TX.
-This device is capable of sending and receiving sideband messages. +This device is capable of sending and receiving sideband messages.
| u8 XDptx_TopologyNode::RelativeAddress[15] | +u8 XDptx_TopologyNode::RelativeAddress[15] |
#include "xstatus.h"| enum XDptx_TrainingState | +enum XDptx_TrainingState |
| - | XDptx_TimerHandler | +XDptx_TimerHandler | CallbackFunc, | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Classes | |
| struct | XDptx_LinkConfig |
| struct | XDptx_DmtMode |
| struct | XDptx_MainStreamAttributes |
| struct | XDptx_MstStream |
| struct | XDptx |
Typedefs | |
| typedef void(*) | XDptx_TimerHandler (void *InstancePtr, u32 MicroSeconds) |
| typedef void(*) | XDptx_TimerHandler (void *InstancePtr, u32 MicroSeconds) |
| typedef void(*) | XDptx_HpdEventHandler (void *InstancePtr) |
| typedef void(*) | XDptx_HpdEventHandler (void *InstancePtr) |
| typedef void(*) | XDptx_HpdPulseHandler (void *InstancePtr) |
Enumerations | |
| enum | XDptx_VideoMode { - XDPTX_VM_640x480_60_P, -XDPTX_VM_800x600_60_P, -XDPTX_VM_848x480_60_P, -XDPTX_VM_1024x768_60_P, - - XDPTX_VM_1280x768_60_P_RB, -XDPTX_VM_1280x768_60_P, -XDPTX_VM_1280x800_60_P_RB, -XDPTX_VM_1280x800_60_P, - - XDPTX_VM_1280x960_60_P, -XDPTX_VM_1280x1024_60_P, -XDPTX_VM_1360x768_60_P, -XDPTX_VM_1400x1050_60_P_RB, - - XDPTX_VM_1400x1050_60_P, -XDPTX_VM_1440x900_60_P_RB, -XDPTX_VM_1440x900_60_P, -XDPTX_VM_1600x1200_60_P, - - XDPTX_VM_1680x1050_60_P_RB, -XDPTX_VM_1680x1050_60_P, -XDPTX_VM_1792x1344_60_P, -XDPTX_VM_1856x1392_60_P, - - XDPTX_VM_1920x1200_60_P_RB, -XDPTX_VM_1920x1200_60_P, -XDPTX_VM_1920x1440_60_P, -XDPTX_VM_2560x1600_60_P_RB, - - XDPTX_VM_2560x1600_60_P, -XDPTX_VM_800x600_56_P, -XDPTX_VM_1600x1200_65_P, -XDPTX_VM_1600x1200_70_P, - - XDPTX_VM_1024x768_70_P, -XDPTX_VM_640x480_72_P, -XDPTX_VM_800x600_72_P, -XDPTX_VM_640x480_75_P, - - XDPTX_VM_800x600_75_P, -XDPTX_VM_1024x768_75_P, -XDPTX_VM_1152x864_75_P, -XDPTX_VM_1280x768_75_P, - - XDPTX_VM_1280x800_75_P, -XDPTX_VM_1280x1024_75_P, -XDPTX_VM_1400x1050_75_P, -XDPTX_VM_1440x900_75_P, - - XDPTX_VM_1600x1200_75_P, -XDPTX_VM_1680x1050_75_P, -XDPTX_VM_1792x1344_75_P, -XDPTX_VM_1856x1392_75_P, - - XDPTX_VM_1920x1200_75_P, -XDPTX_VM_1920x1440_75_P, -XDPTX_VM_2560x1600_75_P, -XDPTX_VM_640x350_85_P, - - XDPTX_VM_640x400_85_P, -XDPTX_VM_720x400_85_P, -XDPTX_VM_640x480_85_P, -XDPTX_VM_800x600_85_P, - - XDPTX_VM_1024x768_85_P, -XDPTX_VM_1280x768_85_P, -XDPTX_VM_1280x800_85_P, -XDPTX_VM_1280x960_85_P, - - XDPTX_VM_1280x1024_85_P, -XDPTX_VM_1400x1050_85_P, -XDPTX_VM_1440x900_85_P, -XDPTX_VM_1600x1200_85_P, - - XDPTX_VM_1680x1050_85_P, -XDPTX_VM_1920x1200_85_P, -XDPTX_VM_2560x1600_85_P, -XDPTX_VM_800x600_120_P_RB, - - XDPTX_VM_1024x768_120_P_RB, -XDPTX_VM_1280x768_120_P_RB, -XDPTX_VM_1280x800_120_P_RB, -XDPTX_VM_1280x960_120_P_RB, - - XDPTX_VM_1280x1024_120_P_RB, -XDPTX_VM_1360x768_120_P_RB, -XDPTX_VM_1400x1050_120_P_RB, -XDPTX_VM_1440x900_120_P_RB, - - XDPTX_VM_1600x1200_120_P_RB, -XDPTX_VM_1680x1050_120_P_RB, -XDPTX_VM_1792x1344_120_P_RB, -XDPTX_VM_1856x1392_120_P_RB, - - XDPTX_VM_1920x1200_120_P_RB, -XDPTX_VM_1920x1440_120_P_RB, -XDPTX_VM_2560x1600_120_P_RB, -XDPTX_VM_1366x768_60_P, - - XDPTX_VM_1920x1080_60_P, -XDPTX_VM_UHD_30_P, -XDPTX_VM_720_60_P, -XDPTX_VM_480_60_P, - - XDPTX_VM_UHD2_60_P, -XDPTX_VM_UHD_60, -XDPTX_VM_USE_EDID_PREFERRED, -XDPTX_VM_LAST = XDPTX_VM_USE_EDID_PREFERRED - - } |
| typedef void(*) | XDptx_HpdPulseHandler (void *InstancePtr) |
Functions | |
| u32 | XDptx_InitializeTx (XDptx *InstancePtr) |
| u32 | XDptx_InitializeTx (XDptx *InstancePtr) |
| void | XDptx_CfgInitialize (XDptx *InstancePtr, XDptx_Config *ConfigPtr, u32 EffectiveAddr) |
| void | XDptx_CfgInitialize (XDptx *InstancePtr, XDptx_Config *ConfigPtr, u32 EffectiveAddr) |
| u32 | XDptx_GetRxCapabilities (XDptx *InstancePtr) |
| u32 | XDptx_GetRxCapabilities (XDptx *InstancePtr) |
| u32 | XDptx_CfgMainLinkMax (XDptx *InstancePtr) |
| u32 | XDptx_CfgMainLinkMax (XDptx *InstancePtr) |
| u32 | XDptx_EstablishLink (XDptx *InstancePtr) |
| u32 | XDptx_EstablishLink (XDptx *InstancePtr) |
| u32 | XDptx_CheckLinkStatus (XDptx *InstancePtr, u8 LaneCount) |
| u32 | XDptx_CheckLinkStatus (XDptx *InstancePtr, u8 LaneCount) |
| void | XDptx_EnableTrainAdaptive (XDptx *InstancePtr, u8 Enable) |
| void | XDptx_EnableTrainAdaptive (XDptx *InstancePtr, u8 Enable) |
| void | XDptx_SetHasRedriverInPath (XDptx *InstancePtr, u8 Set) |
| void | XDptx_SetHasRedriverInPath (XDptx *InstancePtr, u8 Set) |
| void | XDptx_CfgTxVsOffset (XDptx *InstancePtr, u8 Offset) |
| void | XDptx_CfgTxVsOffset (XDptx *InstancePtr, u8 Offset) |
| void | XDptx_CfgTxVsLevel (XDptx *InstancePtr, u8 Level, u8 TxLevel) |
| void | XDptx_CfgTxVsLevel (XDptx *InstancePtr, u8 Level, u8 TxLevel) |
| void | XDptx_CfgTxPeLevel (XDptx *InstancePtr, u8 Level, u8 TxLevel) |
| void | XDptx_CfgTxPeLevel (XDptx *InstancePtr, u8 Level, u8 TxLevel) |
| u32 | XDptx_AuxRead (XDptx *InstancePtr, u32 Address, u32 BytesToRead, void *ReadData) |
| u32 | XDptx_AuxRead (XDptx *InstancePtr, u32 DpcdAddress, u32 BytesToRead, void *ReadData) |
| u32 | XDptx_AuxWrite (XDptx *InstancePtr, u32 Address, u32 BytesToWrite, void *WriteData) |
| u32 | XDptx_AuxWrite (XDptx *InstancePtr, u32 DpcdAddress, u32 BytesToWrite, void *WriteData) |
| u32 | XDptx_IicRead (XDptx *InstancePtr, u8 IicAddress, u16 Offset, u16 BytesToRead, void *ReadData) |
| u32 | XDptx_IicRead (XDptx *InstancePtr, u8 IicAddress, u16 Offset, u16 BytesToRead, void *ReadData) |
| u32 | XDptx_IicWrite (XDptx *InstancePtr, u8 IicAddress, u8 BytesToWrite, void *WriteData) |
| u32 | XDptx_IicWrite (XDptx *InstancePtr, u8 IicAddress, u8 BytesToWrite, void *WriteData) |
| u32 | XDptx_SetDownspread (XDptx *InstancePtr, u8 Enable) |
| u32 | XDptx_SetDownspread (XDptx *InstancePtr, u8 Enable) |
| u32 | XDptx_SetEnhancedFrameMode (XDptx *InstancePtr, u8 Enable) |
| u32 | XDptx_SetEnhancedFrameMode (XDptx *InstancePtr, u8 Enable) |
| u32 | XDptx_SetLaneCount (XDptx *InstancePtr, u8 LaneCount) |
| u32 | XDptx_SetLaneCount (XDptx *InstancePtr, u8 LaneCount) |
| u32 | XDptx_SetLinkRate (XDptx *InstancePtr, u8 LinkRate) |
| u32 | XDptx_SetLinkRate (XDptx *InstancePtr, u8 LinkRate) |
| u32 | XDptx_SetScrambler (XDptx *InstancePtr, u8 Enable) |
| u32 | XDptx_SetScrambler (XDptx *InstancePtr, u8 Enable) |
| u32 | XDptx_IsConnected (XDptx *InstancePtr) |
| u32 | XDptx_IsConnected (XDptx *InstancePtr) |
| void | XDptx_EnableMainLink (XDptx *InstancePtr) |
| void | XDptx_EnableMainLink (XDptx *InstancePtr) |
| void | XDptx_DisableMainLink (XDptx *InstancePtr) |
| void | XDptx_DisableMainLink (XDptx *InstancePtr) |
| void | XDptx_ResetPhy (XDptx *InstancePtr, u32 Reset) |
| void | XDptx_ResetPhy (XDptx *InstancePtr, u32 Reset) |
| void | XDptx_WaitUs (XDptx *InstancePtr, u32 MicroSeconds) |
| void | XDptx_WaitUs (XDptx *InstancePtr, u32 MicroSeconds) |
| void | XDptx_SetUserTimerHandler (XDptx *InstancePtr, XDptx_TimerHandler CallbackFunc, void *CallbackRef) |
| void | XDptx_SetUserTimerHandler (XDptx *InstancePtr, XDptx_TimerHandler CallbackFunc, void *CallbackRef) |
| void | XDptx_CfgMsaRecalculate (XDptx *InstancePtr, u8 Stream) |
| void | XDptx_CfgMsaRecalculate (XDptx *InstancePtr, u8 Stream) |
| void | XDptx_CfgMsaUseStandardVideoMode (XDptx *InstancePtr, u8 Stream, XDptx_VideoMode VideoMode) |
| void | XDptx_CfgMsaUseStandardVideoMode (XDptx *InstancePtr, u8 Stream, XVid_VideoMode VideoMode) |
| void | XDptx_CfgMsaUseEdidPreferredTiming (XDptx *InstancePtr, u8 Stream, u8 *Edid) |
| void | XDptx_CfgMsaUseEdidPreferredTiming (XDptx *InstancePtr, u8 Stream, u8 *Edid) |
| void | XDptx_CfgMsaUseCustom (XDptx *InstancePtr, u8 Stream, XDptx_MainStreamAttributes *MsaConfigCustom, u8 Recalculate) |
| void | XDptx_CfgMsaUseCustom (XDptx *InstancePtr, u8 Stream, XDptx_MainStreamAttributes *MsaConfigCustom, u8 Recalculate) |
| void | XDptx_CfgMsaSetBpc (XDptx *InstancePtr, u8 Stream, u8 BitsPerColor) |
| void | XDptx_CfgMsaSetBpc (XDptx *InstancePtr, u8 Stream, u8 BitsPerColor) |
| void | XDptx_CfgMsaEnSynchClkMode (XDptx *InstancePtr, u8 Stream, u8 Enable) |
| void | XDptx_CfgMsaEnSynchClkMode (XDptx *InstancePtr, u8 Stream, u8 Enable) |
| void | XDptx_SetVideoMode (XDptx *InstancePtr, u8 Stream) |
| void | XDptx_SetVideoMode (XDptx *InstancePtr, u8 Stream) |
| void | XDptx_ClearMsaValues (XDptx *InstancePtr, u8 Stream) |
| void | XDptx_ClearMsaValues (XDptx *InstancePtr, u8 Stream) |
| void | XDptx_SetMsaValues (XDptx *InstancePtr, u8 Stream) |
| void | XDptx_SetMsaValues (XDptx *InstancePtr, u8 Stream) |
| void | XDptx_SetHpdEventHandler (XDptx *InstancePtr, XDptx_HpdEventHandler CallbackFunc, void *CallbackRef) |
| void | XDptx_SetHpdEventHandler (XDptx *InstancePtr, XDptx_HpdEventHandler CallbackFunc, void *CallbackRef) |
| void | XDptx_SetHpdPulseHandler (XDptx *InstancePtr, XDptx_HpdPulseHandler CallbackFunc, void *CallbackRef) |
| void | XDptx_SetHpdPulseHandler (XDptx *InstancePtr, XDptx_HpdPulseHandler CallbackFunc, void *CallbackRef) |
| void | XDptx_HpdInterruptHandler (XDptx *InstancePtr) |
| void | XDptx_HpdInterruptHandler (XDptx *InstancePtr) |
| u32 | XDptx_SelfTest (XDptx *InstancePtr) |
| u32 | XDptx_SelfTest (XDptx *InstancePtr) |
| XDptx_Config * | XDptx_LookupConfig (u16 DeviceId) |
| XDptx_Config * | XDptx_LookupConfig (u16 DeviceId) |
| void | XDptx_MstCfgModeEnable (XDptx *InstancePtr) |
| void | XDptx_MstCfgModeEnable (XDptx *InstancePtr) |
| void | XDptx_MstCfgModeDisable (XDptx *InstancePtr) |
| void | XDptx_MstCfgModeDisable (XDptx *InstancePtr) |
| u32 | XDptx_MstCapable (XDptx *InstancePtr) |
| u32 | XDptx_MstCapable (XDptx *InstancePtr) |
| u32 | XDptx_MstEnable (XDptx *InstancePtr) |
| u32 | XDptx_MstEnable (XDptx *InstancePtr) |
| u32 | XDptx_MstDisable (XDptx *InstancePtr) |
| u32 | XDptx_MstDisable (XDptx *InstancePtr) |
| void | XDptx_MstCfgStreamEnable (XDptx *InstancePtr, u8 Stream) |
| void | XDptx_MstCfgStreamEnable (XDptx *InstancePtr, u8 Stream) |
| void | XDptx_MstCfgStreamDisable (XDptx *InstancePtr, u8 Stream) |
| void | XDptx_MstCfgStreamDisable (XDptx *InstancePtr, u8 Stream) |
| u8 | XDptx_MstStreamIsEnabled (XDptx *InstancePtr, u8 Stream) |
| u8 | XDptx_MstStreamIsEnabled (XDptx *InstancePtr, u8 Stream) |
| void | XDptx_SetStreamSelectFromSinkList (XDptx *InstancePtr, u8 Stream, u8 SinkNum) |
| void | XDptx_SetStreamSelectFromSinkList (XDptx *InstancePtr, u8 Stream, u8 SinkNum) |
| void | XDptx_SetStreamSinkRad (XDptx *InstancePtr, u8 Stream, u8 LinkCountTotal, u8 *RelativeAddress) |
| void | XDptx_SetStreamSinkRad (XDptx *InstancePtr, u8 Stream, u8 LinkCountTotal, u8 *RelativeAddress) |
| u32 | XDptx_DiscoverTopology (XDptx *InstancePtr) |
| u32 | XDptx_DiscoverTopology (XDptx *InstancePtr) |
| u32 | XDptx_FindAccessibleDpDevices (XDptx *InstancePtr, u8 LinkCountTotal, u8 *RelativeAddress) |
| u32 | XDptx_FindAccessibleDpDevices (XDptx *InstancePtr, u8 LinkCountTotal, u8 *RelativeAddress) |
| void | XDptx_TopologySwapSinks (XDptx *InstancePtr, u8 Index0, u8 Index1) |
| void | XDptx_TopologySwapSinks (XDptx *InstancePtr, u8 Index0, u8 Index1) |
| void | XDptx_TopologySortSinksByTiling (XDptx *InstancePtr) |
| void | XDptx_TopologySortSinksByTiling (XDptx *InstancePtr) |
| u32 | XDptx_RemoteDpcdRead (XDptx *InstancePtr, u8 LinkCountTotal, u8 *RelativeAddress, u32 DpcdAddress, u32 BytesToRead, u8 *ReadData) |
| u32 | XDptx_RemoteDpcdRead (XDptx *InstancePtr, u8 LinkCountTotal, u8 *RelativeAddress, u32 DpcdAddress, u32 BytesToRead, u8 *ReadData) |
| u32 | XDptx_RemoteDpcdWrite (XDptx *InstancePtr, u8 LinkCountTotal, u8 *RelativeAddress, u32 DpcdAddress, u32 BytesToWrite, u8 *WriteData) |
| u32 | XDptx_RemoteDpcdWrite (XDptx *InstancePtr, u8 LinkCountTotal, u8 *RelativeAddress, u32 DpcdAddress, u32 BytesToWrite, u8 *WriteData) |
| u32 | XDptx_RemoteIicRead (XDptx *InstancePtr, u8 LinkCountTotal, u8 *RelativeAddress, u8 IicAddress, u16 Offset, u16 BytesToRead, u8 *ReadData) |
| u32 | XDptx_RemoteIicRead (XDptx *InstancePtr, u8 LinkCountTotal, u8 *RelativeAddress, u8 IicAddress, u16 Offset, u16 BytesToRead, u8 *ReadData) |
| u32 | XDptx_RemoteIicWrite (XDptx *InstancePtr, u8 LinkCountTotal, u8 *RelativeAddress, u8 IicAddress, u8 BytesToWrite, u8 *WriteData) |
| u32 | XDptx_RemoteIicWrite (XDptx *InstancePtr, u8 LinkCountTotal, u8 *RelativeAddress, u8 IicAddress, u8 BytesToWrite, u8 *WriteData) |
| u32 | XDptx_AllocatePayloadStreams (XDptx *InstancePtr) |
| u32 | XDptx_AllocatePayloadStreams (XDptx *InstancePtr) |
| u32 | XDptx_AllocatePayloadVcIdTable (XDptx *InstancePtr, u8 VcId, u8 Ts) |
| u32 | XDptx_AllocatePayloadVcIdTable (XDptx *InstancePtr, u8 VcId, u8 Ts) |
| u32 | XDptx_ClearPayloadVcIdTable (XDptx *InstancePtr) |
| u32 | XDptx_ClearPayloadVcIdTable (XDptx *InstancePtr) |
| u32 | XDptx_SendSbMsgRemoteDpcdWrite (XDptx *InstancePtr, u8 LinkCountTotal, u8 *RelativeAddress, u32 DpcdAddress, u32 BytesToWrite, u8 *WriteData) |
| u32 | XDptx_SendSbMsgRemoteDpcdWrite (XDptx *InstancePtr, u8 LinkCountTotal, u8 *RelativeAddress, u32 DpcdAddress, u32 BytesToWrite, u8 *WriteData) |
| u32 | XDptx_SendSbMsgRemoteDpcdRead (XDptx *InstancePtr, u8 LinkCountTotal, u8 *RelativeAddress, u32 DpcdAddress, u32 BytesToRead, u8 *ReadData) |
| u32 | XDptx_SendSbMsgRemoteDpcdRead (XDptx *InstancePtr, u8 LinkCountTotal, u8 *RelativeAddress, u32 DpcdAddress, u32 BytesToRead, u8 *ReadData) |
| u32 | XDptx_SendSbMsgRemoteIicWrite (XDptx *InstancePtr, u8 LinkCountTotal, u8 *RelativeAddress, u8 IicDeviceId, u8 BytesToWrite, u8 *WriteData) |
| u32 | XDptx_SendSbMsgRemoteIicWrite (XDptx *InstancePtr, u8 LinkCountTotal, u8 *RelativeAddress, u8 IicDeviceId, u8 BytesToWrite, u8 *WriteData) |
| u32 | XDptx_SendSbMsgRemoteIicRead (XDptx *InstancePtr, u8 LinkCountTotal, u8 *RelativeAddress, u8 IicDeviceId, u8 Offset, u8 BytesToRead, u8 *ReadData) |
| u32 | XDptx_SendSbMsgRemoteIicRead (XDptx *InstancePtr, u8 LinkCountTotal, u8 *RelativeAddress, u8 IicDeviceId, u8 Offset, u8 BytesToRead, u8 *ReadData) |
| u32 | XDptx_SendSbMsgLinkAddress (XDptx *InstancePtr, u8 LinkCountTotal, u8 *RelativeAddress, XDptx_SbMsgLinkAddressReplyDeviceInfo *DeviceInfo) |
| u32 | XDptx_SendSbMsgLinkAddress (XDptx *InstancePtr, u8 LinkCountTotal, u8 *RelativeAddress, XDptx_SbMsgLinkAddressReplyDeviceInfo *DeviceInfo) |
| u32 | XDptx_SendSbMsgEnumPathResources (XDptx *InstancePtr, u8 LinkCountTotal, u8 *RelativeAddress, u16 *AvailPbn, u16 *FullPbn) |
| u32 | XDptx_SendSbMsgEnumPathResources (XDptx *InstancePtr, u8 LinkCountTotal, u8 *RelativeAddress, u16 *AvailPbn, u16 *FullPbn) |
| u32 | XDptx_SendSbMsgAllocatePayload (XDptx *InstancePtr, u8 LinkCountTotal, u8 *RelativeAddress, u8 VcId, u16 Pbn) |
| u32 | XDptx_SendSbMsgAllocatePayload (XDptx *InstancePtr, u8 LinkCountTotal, u8 *RelativeAddress, u8 VcId, u16 Pbn) |
| u32 | XDptx_SendSbMsgClearPayloadIdTable (XDptx *InstancePtr) |
| u32 | XDptx_SendSbMsgClearPayloadIdTable (XDptx *InstancePtr) |
| void | XDptx_WriteGuid (XDptx *InstancePtr, u8 LinkCountTotal, u8 *RelativeAddress, u32 Guid[4]) |
| void | XDptx_WriteGuid (XDptx *InstancePtr, u8 LinkCountTotal, u8 *RelativeAddress, u32 Guid[4]) |
| void | XDptx_GetGuid (XDptx *InstancePtr, u8 LinkCountTotal, u8 *RelativeAddress, u32 *Guid) |
| void | XDptx_GetGuid (XDptx *InstancePtr, u8 LinkCountTotal, u8 *RelativeAddress, u32 *Guid) |
| u32 | XDptx_GetEdid (XDptx *InstancePtr, u8 *Edid) |
| u32 | XDptx_GetEdid (XDptx *InstancePtr, u8 *Edid) |
| u32 | XDptx_GetRemoteEdid (XDptx *InstancePtr, u8 LinkCountTotal, u8 *RelativeAddress, u8 *Edid) |
| u32 | XDptx_GetRemoteEdid (XDptx *InstancePtr, u8 LinkCountTotal, u8 *RelativeAddress, u8 *Edid) |
| u32 | XDptx_GetEdidBlock (XDptx *InstancePtr, u8 *Data, u8 BlockNum) |
| u32 | XDptx_GetEdidBlock (XDptx *InstancePtr, u8 *Data, u8 BlockNum) |
| u32 | XDptx_GetRemoteEdidBlock (XDptx *InstancePtr, u8 *Data, u8 BlockNum, u8 LinkCountTotal, u8 *RelativeAddress) |
| u32 | XDptx_GetRemoteEdidBlock (XDptx *InstancePtr, u8 *Data, u8 BlockNum, u8 LinkCountTotal, u8 *RelativeAddress) |
| u32 | XDptx_GetRemoteEdidDispIdExt (XDptx *InstancePtr, u8 *Data, u8 LinkCountTotal, u8 *RelativeAddress) |
| u32 | XDptx_GetRemoteEdidDispIdExt (XDptx *InstancePtr, u8 *Data, u8 LinkCountTotal, u8 *RelativeAddress) |
| u32 | XDptx_GetDispIdDataBlock (u8 *DisplayIdRaw, u8 SectionTag, u8 **DataBlockPtr) |
| u32 | XDptx_GetDispIdDataBlock (u8 *DisplayIdRaw, u8 SectionTag, u8 **DataBlockPtr) |
| u32 | XDptx_GetRemoteTiledDisplayDb (XDptx *InstancePtr, u8 *EdidExt, u8 LinkCountTotal, u8 *RelativeAddress, u8 **DataBlockPtr) |
Variables | |
| XDptx_DmtMode | XDptx_DmtModes [] |
| u32 | XDptx_GetRemoteTiledDisplayDb (XDptx *InstancePtr, u8 *EdidExt, u8 LinkCountTotal, u8 *RelativeAddress, u8 **DataBlockPtr) |
| typedef void(*) XDptx_HpdEventHandler(void *InstancePtr) | +typedef void(*) XDptx_HpdEventHandler(void *InstancePtr) |
| typedef void(*) XDptx_HpdPulseHandler(void *InstancePtr) | +typedef void(*) XDptx_HpdPulseHandler(void *InstancePtr) |
| typedef void(*) XDptx_TimerHandler(void *InstancePtr, u32 MicroSeconds) | +typedef void(*) XDptx_TimerHandler(void *InstancePtr, u32 MicroSeconds) |
-
| enum XDptx_VideoMode | -
-This typedef enumerates the list of available standard display monitor timings as specified in the mode_table.c file. The naming format is:
-XDPTX_VM_<RESOLUTION>_<REFRESH RATE (HZ)>_<P|RB>
-Where RB stands for reduced blanking.
| - | XDptx_VideoMode | +XVid_VideoMode | VideoMode | ||