From e3bb1821b7fb4c059683f9083681bd3e93e660b8 Mon Sep 17 00:00:00 2001 From: Davorin Mista Date: Wed, 27 May 2015 15:39:42 -0700 Subject: [PATCH] PMUFW: PM: Removed action arrays, added one enterState for slave FSM -Removed action arrays and instId pointers used in PmSlaveFsm -Removed unused macros and typedefs -Removed redundant functions for Sram retention entry/exit -Added enterState function in PmSlaveFsm. Slave state is entered based on arguments (slave pointer and next state). -Added xpbr function pointers in PmSlave derived objects (usb and sram) Signed-off-by: Mirela Simonovic Reviewed-by: Jyotheeswar Reddy --- lib/sw_apps/zynqmp_pmufw/src/pm_master.c | 40 ++- lib/sw_apps/zynqmp_pmufw/src/pm_periph.c | 6 +- lib/sw_apps/zynqmp_pmufw/src/pm_slave.c | 28 +- lib/sw_apps/zynqmp_pmufw/src/pm_slave.h | 15 +- lib/sw_apps/zynqmp_pmufw/src/pm_sram.c | 369 ++++++-------------- lib/sw_apps/zynqmp_pmufw/src/pm_sram.h | 39 +-- lib/sw_apps/zynqmp_pmufw/src/pm_usb.c | 65 +++- lib/sw_apps/zynqmp_pmufw/src/pm_usb.h | 18 +- lib/sw_apps/zynqmp_pmufw/src/xpfw_version.h | 2 +- 9 files changed, 217 insertions(+), 365 deletions(-) diff --git a/lib/sw_apps/zynqmp_pmufw/src/pm_master.c b/lib/sw_apps/zynqmp_pmufw/src/pm_master.c index 5c5507ed..9896df54 100644 --- a/lib/sw_apps/zynqmp_pmufw/src/pm_master.c +++ b/lib/sw_apps/zynqmp_pmufw/src/pm_master.c @@ -650,28 +650,30 @@ static void PmWakeUpDisableAll(PmMaster* const master) u32 i; PmDbg("for %s\n", PmStrNode(master->procs->node.nodeId)); - for (i = 0; i < master->reqsCnt; i++) { - PmMasterId r; - bool hasOtherReq = false; + if (0U != (master->reqs[i].info & PM_MASTER_WAKEUP_REQ_MASK)) { + PmMasterId r; + bool hasOtherReq = false; - if (0U == (master->reqs[i].info & PM_MASTER_WAKEUP_REQ_MASK)) { - continue; - } - - master->reqs[i].info &= ~PM_MASTER_WAKEUP_REQ_MASK; - /* Check if there are other masters waiting for slave's wake-up */ - for (r = 0U; r < master->reqs[i].slave->reqsCnt; r++) { - if (0U != (master->reqs[i].slave->reqs[r]->info & - PM_MASTER_WAKEUP_REQ_MASK)) { - hasOtherReq = true; - break; + master->reqs[i].info &= ~PM_MASTER_WAKEUP_REQ_MASK; + /* + * Check if there are other masters waiting for slave's + * wake-up. + */ + for (r = 0U; r < master->reqs[i].slave->reqsCnt; r++) { + if (0U != (master->reqs[i].slave->reqs[r]->info & + PM_MASTER_WAKEUP_REQ_MASK)) { + hasOtherReq = true; + break; + } + } + if (false == hasOtherReq) { + /* + * No other masters waiting for wake, disable + * wake event. + */ + PmSlaveWakeDisable(master->reqs[i].slave); } - } - - if (false == hasOtherReq) { - /* No other masters waiting for wake, disable wake event */ - PmSlaveWakeDisable(master->reqs[i].slave); } } } diff --git a/lib/sw_apps/zynqmp_pmufw/src/pm_periph.c b/lib/sw_apps/zynqmp_pmufw/src/pm_periph.c index 6aaccc5f..88508eda 100644 --- a/lib/sw_apps/zynqmp_pmufw/src/pm_periph.c +++ b/lib/sw_apps/zynqmp_pmufw/src/pm_periph.c @@ -47,7 +47,7 @@ static const PmSlaveFsm slaveAonFsm = { .statesCnt = ARRAY_SIZE(pmAonFsmStates), .trans = NULL, .transCnt = 0U, - .actions = NULL, + .enterState = NULL, }; static PmWakeProperties pmTtc0Wake = { @@ -70,7 +70,6 @@ PmSlaveTtc pmSlaveTtc0_g = { .currState = PM_AON_SLAVE_STATE, .ops = NULL, }, - .instId = 0U, .reqs = pmTtc0Reqs, .reqsCnt = ARRAY_SIZE(pmTtc0Reqs), .wake = &pmTtc0Wake, @@ -103,7 +102,7 @@ static const PmSlaveFsm slaveStdFsm = { .statesCnt = ARRAY_SIZE(pmStdStates), .trans = pmStdTransitions, .transCnt = ARRAY_SIZE(pmStdTransitions), - .actions = NULL, + .enterState = NULL, }; static PmWakeProperties pmSataWake = { @@ -126,7 +125,6 @@ PmSlaveSata pmSlaveSata_g = { .currState = PM_STD_SLAVE_STATE_ON, .ops = NULL, }, - .instId = 0U, .reqs = pmSataReqs, .reqsCnt = ARRAY_SIZE(pmSataReqs), .wake = &pmSataWake, diff --git a/lib/sw_apps/zynqmp_pmufw/src/pm_slave.c b/lib/sw_apps/zynqmp_pmufw/src/pm_slave.c index 8b2dd4e6..7ca1464e 100644 --- a/lib/sw_apps/zynqmp_pmufw/src/pm_slave.c +++ b/lib/sw_apps/zynqmp_pmufw/src/pm_slave.c @@ -165,9 +165,20 @@ u32 PmCheckCapabilities(PmSlave* const slave, const u32 cap) static u32 PmSlaveChangeState(PmSlave* const slave, const PmStateId state) { u32 t; - u32 status = PM_RET_ERROR_FAILURE; + u32 status; const PmSlaveFsm* fsm = slave->slvFsm; + if (0U == fsm->transCnt) { + /* Slave's FSM has no transitions when it has only one state */ + status = PM_RET_SUCCESS; + } else { + /* + * Slave has transitions to change the state. Assume the failure + * and change status if state is changed correctly. + */ + status = PM_RET_ERROR_FAILURE; + } + for (t = 0U; t < fsm->transCnt; t++) { /* Find transition from current state to state to be set */ if ((fsm->trans[t].fromState != slave->node.currState) || @@ -175,17 +186,9 @@ static u32 PmSlaveChangeState(PmSlave* const slave, const PmStateId state) continue; } - if (NULL != fsm->actions) { - /* Execute transition action */ - u32 ret = fsm->actions[(slave->instId * fsm->transCnt) + t](); - - /* Check the status of transition handler */ - if (ret == XST_SUCCESS) { - slave->node.currState = state; - status = PM_RET_SUCCESS; - } else { - status = PM_RET_ERROR_FAILURE; - } + if (NULL != slave->slvFsm->enterState) { + /* Execute transition action of slave's FSM */ + status = slave->slvFsm->enterState(slave, state); } else { /* * Slave's FSM has no actions, because it has no private @@ -196,6 +199,7 @@ static u32 PmSlaveChangeState(PmSlave* const slave, const PmStateId state) break; } + return status; } diff --git a/lib/sw_apps/zynqmp_pmufw/src/pm_slave.h b/lib/sw_apps/zynqmp_pmufw/src/pm_slave.h index 215d4e40..a2e85885 100644 --- a/lib/sw_apps/zynqmp_pmufw/src/pm_slave.h +++ b/lib/sw_apps/zynqmp_pmufw/src/pm_slave.h @@ -40,9 +40,13 @@ #include "pm_common.h" #include "pm_node.h" -typedef u8 PmSlaveInstanceId; +/* Forward declarations */ typedef struct PmMaster PmMaster; typedef struct PmRequirement PmRequirement; +typedef struct PmSlave PmSlave; + +typedef u32 (*const PmSlaveFsmHandler)(PmSlave* const slave, + const PmStateId nextState); /********************************************************************* * Macros @@ -108,15 +112,14 @@ typedef struct { * @statesCnt Number of states in state array * @trans Pointer to array of transitions of the FSM * @transCnt Number of elements in transition array - * @actions Array of transition actions (function pointers) for all - * instances of this class + * @enterState Pointer to a function that executes FSM actions to enter a state */ typedef struct { const u32* const states; const PmStateId statesCnt; const PmStateTran* const trans; - const PmTransitionId transCnt; - const PmTranHandler* const actions; + const u8 transCnt; + PmSlaveFsmHandler enterState; } PmSlaveFsm; /** @@ -141,7 +144,6 @@ typedef struct { /** * PmSlave - Slave structure used for managing slave's states * @node Pointer to the node structure of this slave - * @instId Index into array of all instances of slave's class * @reqs Pointer to array of master requirements related to this slave * @reqsCnt Size of masterReq array * @wake Wake event this slave can generate @@ -149,7 +151,6 @@ typedef struct { */ typedef struct PmSlave { PmNode node; - const PmSlaveInstanceId instId; PmRequirement* const* reqs; u8 reqsCnt; const PmWakeProperties* wake; diff --git a/lib/sw_apps/zynqmp_pmufw/src/pm_sram.c b/lib/sw_apps/zynqmp_pmufw/src/pm_sram.c index 67e7fefa..4049a8a6 100644 --- a/lib/sw_apps/zynqmp_pmufw/src/pm_sram.c +++ b/lib/sw_apps/zynqmp_pmufw/src/pm_sram.c @@ -37,257 +37,6 @@ #include "pm_master.h" #include "xpfw_rom_interface.h" -#define DEFTR(INST, TRAN) ((INST * PM_SRAM_TR_MAX) + TRAN) - -/* Ocm bank 0 */ -static u32 PmOcm0RetEntry(void) -{ - XPfw_RMW32(PMU_LOCAL_OCM_RET_CNTRL, - PMU_LOCAL_OCM_RET_CNTRL_BANK0_MASK, - PMU_LOCAL_OCM_RET_CNTRL_BANK0_MASK); - - PmDbg("\n"); - - return XST_SUCCESS; -} - -static u32 PmOcm0RetExit(void) -{ - XPfw_RMW32(PMU_LOCAL_OCM_RET_CNTRL, - PMU_LOCAL_OCM_RET_CNTRL_BANK0_MASK, - ~PMU_LOCAL_OCM_RET_CNTRL_BANK0_MASK); - - PmDbg("\n"); - - return XST_SUCCESS; -} - -/* Ocm bank 1 */ -static u32 PmOcm1RetEntry(void) -{ - XPfw_RMW32(PMU_LOCAL_OCM_RET_CNTRL, - PMU_LOCAL_OCM_RET_CNTRL_BANK1_MASK, - PMU_LOCAL_OCM_RET_CNTRL_BANK1_MASK); - - PmDbg("\n"); - - return XST_SUCCESS; -} - -static u32 PmOcm1RetExit(void) -{ - XPfw_RMW32(PMU_LOCAL_OCM_RET_CNTRL, - PMU_LOCAL_OCM_RET_CNTRL_BANK1_MASK, - ~PMU_LOCAL_OCM_RET_CNTRL_BANK1_MASK); - - PmDbg("\n"); - - return XST_SUCCESS; -} - -/* Ocm bank 2 */ -static u32 PmOcm2RetEntry(void) -{ - XPfw_RMW32(PMU_LOCAL_OCM_RET_CNTRL, - PMU_LOCAL_OCM_RET_CNTRL_BANK2_MASK, - PMU_LOCAL_OCM_RET_CNTRL_BANK2_MASK); - - PmDbg("\n"); - - return XST_SUCCESS; -} - -static u32 PmOcm2RetExit(void) -{ - XPfw_RMW32(PMU_LOCAL_OCM_RET_CNTRL, - PMU_LOCAL_OCM_RET_CNTRL_BANK2_MASK, - ~PMU_LOCAL_OCM_RET_CNTRL_BANK2_MASK); - - PmDbg("\n"); - - return XST_SUCCESS; -} - -/* Ocm bank 3 */ -static u32 PmOcm3RetEntry(void) -{ - XPfw_RMW32(PMU_LOCAL_OCM_RET_CNTRL, - PMU_LOCAL_OCM_RET_CNTRL_BANK3_MASK, - PMU_LOCAL_OCM_RET_CNTRL_BANK3_MASK); - - PmDbg("\n"); - - return XST_SUCCESS; -} - -static u32 PmOcm3RetExit(void) -{ - XPfw_RMW32(PMU_LOCAL_OCM_RET_CNTRL, - PMU_LOCAL_OCM_RET_CNTRL_BANK3_MASK, - ~PMU_LOCAL_OCM_RET_CNTRL_BANK3_MASK); - - PmDbg("\n"); - - return XST_SUCCESS; -} - -static u32 PmTcm0ARetEntry(void) -{ - XPfw_RMW32(PMU_LOCAL_TCM_RET_CNTRL, - PMU_LOCAL_TCM_RET_CNTRL_TCMA0_MASK, - PMU_LOCAL_TCM_RET_CNTRL_TCMA0_MASK); - - PmDbg("\n"); - - return XST_SUCCESS; -} - -static u32 PmTcm0ARetExit(void) -{ - XPfw_RMW32(PMU_LOCAL_TCM_RET_CNTRL, - PMU_LOCAL_TCM_RET_CNTRL_TCMA0_MASK, - ~PMU_LOCAL_TCM_RET_CNTRL_TCMA0_MASK); - - PmDbg("\n"); - - return XST_SUCCESS; -} - -static u32 PmTcm0BRetEntry(void) -{ - XPfw_RMW32(PMU_LOCAL_TCM_RET_CNTRL, - PMU_LOCAL_TCM_RET_CNTRL_TCMB0_MASK, - PMU_LOCAL_TCM_RET_CNTRL_TCMB0_MASK); - - PmDbg("\n"); - - return XST_SUCCESS; -} - -static u32 PmTcm0BRetExit(void) -{ - XPfw_RMW32(PMU_LOCAL_TCM_RET_CNTRL, - PMU_LOCAL_TCM_RET_CNTRL_TCMB0_MASK, - ~PMU_LOCAL_TCM_RET_CNTRL_TCMB0_MASK); - - PmDbg("\n"); - - return XST_SUCCESS; -} - -static u32 PmTcm1ARetEntry(void) -{ - XPfw_RMW32(PMU_LOCAL_TCM_RET_CNTRL, - PMU_LOCAL_TCM_RET_CNTRL_TCMA1_MASK, - PMU_LOCAL_TCM_RET_CNTRL_TCMA1_MASK); - - PmDbg("\n"); - - return XST_SUCCESS; -} - -static u32 PmTcm1ARetExit(void) -{ - XPfw_RMW32(PMU_LOCAL_TCM_RET_CNTRL, - PMU_LOCAL_TCM_RET_CNTRL_TCMA1_MASK, - ~PMU_LOCAL_TCM_RET_CNTRL_TCMA1_MASK); - - PmDbg("\n"); - - return XST_SUCCESS; -} - -static u32 PmTcm1BRetEntry(void) -{ - XPfw_RMW32(PMU_LOCAL_TCM_RET_CNTRL, - PMU_LOCAL_TCM_RET_CNTRL_TCMB1_MASK, - PMU_LOCAL_TCM_RET_CNTRL_TCMB1_MASK); - - PmDbg("\n"); - - return XST_SUCCESS; -} - -static u32 PmTcm1BRetExit(void) -{ - XPfw_RMW32(PMU_LOCAL_TCM_RET_CNTRL, - PMU_LOCAL_TCM_RET_CNTRL_TCMB1_MASK, - ~PMU_LOCAL_TCM_RET_CNTRL_TCMB1_MASK); - - PmDbg("\n"); - - return XST_SUCCESS; -} - -static u32 PmL2RetEntry(void) -{ - XPfw_RMW32(PMU_LOCAL_L2_RET_CNTRL, - PMU_LOCAL_L2_RET_CNTRL_BANK0_MASK, - PMU_LOCAL_L2_RET_CNTRL_BANK0_MASK); - - PmDbg("\n"); - - return XST_SUCCESS; -} - -static u32 PmL2RetExit(void) -{ - XPfw_RMW32(PMU_LOCAL_L2_RET_CNTRL, - PMU_LOCAL_L2_RET_CNTRL_BANK0_MASK, - ~PMU_LOCAL_L2_RET_CNTRL_BANK0_MASK); - - PmDbg("\n"); - - return XST_SUCCESS; -} - -static const PmTranHandler pmSramActions[PM_SRAM_INST_MAX * PM_SRAM_TR_MAX] = { - [ DEFTR(PM_SRAM_OCM0, PM_SRAM_TR_ON_TO_RET) ] = PmOcm0RetEntry, - [ DEFTR(PM_SRAM_OCM0, PM_SRAM_TR_RET_TO_ON) ] = PmOcm0RetExit, - [ DEFTR(PM_SRAM_OCM0, PM_SRAM_TR_ON_TO_OFF) ] = XpbrPwrDnOcmBank0Handler, - [ DEFTR(PM_SRAM_OCM0, PM_SRAM_TR_OFF_TO_ON) ] = XpbrPwrUpOcmBank0Handler, - - [ DEFTR(PM_SRAM_OCM1, PM_SRAM_TR_ON_TO_RET) ] = PmOcm1RetEntry, - [ DEFTR(PM_SRAM_OCM1, PM_SRAM_TR_RET_TO_ON) ] = PmOcm1RetExit, - [ DEFTR(PM_SRAM_OCM1, PM_SRAM_TR_ON_TO_OFF) ] = XpbrPwrDnOcmBank1Handler, - [ DEFTR(PM_SRAM_OCM1, PM_SRAM_TR_OFF_TO_ON) ] = XpbrPwrUpOcmBank1Handler, - - [ DEFTR(PM_SRAM_OCM2, PM_SRAM_TR_ON_TO_RET) ] = PmOcm2RetEntry, - [ DEFTR(PM_SRAM_OCM2, PM_SRAM_TR_RET_TO_ON) ] = PmOcm2RetExit, - [ DEFTR(PM_SRAM_OCM2, PM_SRAM_TR_ON_TO_OFF) ] = XpbrPwrDnOcmBank2Handler, - [ DEFTR(PM_SRAM_OCM2, PM_SRAM_TR_OFF_TO_ON) ] = XpbrPwrUpOcmBank2Handler, - - [ DEFTR(PM_SRAM_OCM3, PM_SRAM_TR_ON_TO_RET) ] = PmOcm3RetEntry, - [ DEFTR(PM_SRAM_OCM3, PM_SRAM_TR_RET_TO_ON) ] = PmOcm3RetExit, - [ DEFTR(PM_SRAM_OCM3, PM_SRAM_TR_ON_TO_OFF) ] = XpbrPwrDnOcmBank3Handler, - [ DEFTR(PM_SRAM_OCM3, PM_SRAM_TR_OFF_TO_ON) ] = XpbrPwrUpOcmBank3Handler, - - [ DEFTR(PM_SRAM_TCM0A, PM_SRAM_TR_ON_TO_RET) ] = PmTcm0ARetEntry, - [ DEFTR(PM_SRAM_TCM0A, PM_SRAM_TR_RET_TO_ON) ] = PmTcm0ARetExit, - [ DEFTR(PM_SRAM_TCM0A, PM_SRAM_TR_ON_TO_OFF) ] = XpbrPwrDnTcm0AHandler, - [ DEFTR(PM_SRAM_TCM0A, PM_SRAM_TR_OFF_TO_ON) ] = XpbrPwrUpTcm0AHandler, - - [ DEFTR(PM_SRAM_TCM0B, PM_SRAM_TR_ON_TO_RET) ] = PmTcm0BRetEntry, - [ DEFTR(PM_SRAM_TCM0B, PM_SRAM_TR_RET_TO_ON) ] = PmTcm0BRetExit, - [ DEFTR(PM_SRAM_TCM0B, PM_SRAM_TR_ON_TO_OFF) ] = XpbrPwrDnTcm0BHandler, - [ DEFTR(PM_SRAM_TCM0B, PM_SRAM_TR_OFF_TO_ON) ] = XpbrPwrUpTcm0BHandler, - - [ DEFTR(PM_SRAM_TCM1A, PM_SRAM_TR_ON_TO_RET) ] = PmTcm1ARetEntry, - [ DEFTR(PM_SRAM_TCM1A, PM_SRAM_TR_RET_TO_ON) ] = PmTcm1ARetExit, - [ DEFTR(PM_SRAM_TCM1A, PM_SRAM_TR_ON_TO_OFF) ] = XpbrPwrDnTcm1AHandler, - [ DEFTR(PM_SRAM_TCM1A, PM_SRAM_TR_OFF_TO_ON) ] = XpbrPwrUpTcm1AHandler, - - [ DEFTR(PM_SRAM_TCM1B, PM_SRAM_TR_ON_TO_RET) ] = PmTcm1BRetEntry, - [ DEFTR(PM_SRAM_TCM1B, PM_SRAM_TR_RET_TO_ON) ] = PmTcm1BRetExit, - [ DEFTR(PM_SRAM_TCM1B, PM_SRAM_TR_ON_TO_OFF) ] = XpbrPwrDnTcm1BHandler, - [ DEFTR(PM_SRAM_TCM1B, PM_SRAM_TR_OFF_TO_ON) ] = XpbrPwrUpTcm1BHandler, - - [ DEFTR(PM_SRAM_L2, PM_SRAM_TR_ON_TO_RET) ] = PmL2RetEntry, - [ DEFTR(PM_SRAM_L2, PM_SRAM_TR_RET_TO_ON) ] = PmL2RetExit, - [ DEFTR(PM_SRAM_L2, PM_SRAM_TR_ON_TO_OFF) ] = XpbrPwrDnL2Bank0Handler, - [ DEFTR(PM_SRAM_L2, PM_SRAM_TR_OFF_TO_ON) ] = XpbrPwrUpL2Bank0Handler, -}; - /* Sram states */ static const u32 pmSramStates[PM_SRAM_STATE_MAX] = { [PM_SRAM_STATE_OFF] = 0U, @@ -296,32 +45,85 @@ static const u32 pmSramStates[PM_SRAM_STATE_MAX] = { }; /* Sram transition table (from which to which state sram can transit) */ -static const PmStateTran pmSramTransitions[PM_SRAM_TR_MAX] = { - [PM_SRAM_TR_ON_TO_RET] = { +static const PmStateTran pmSramTransitions[] = { + { .fromState = PM_SRAM_STATE_ON, .toState = PM_SRAM_STATE_RET, - }, - [PM_SRAM_TR_RET_TO_ON] = { + }, { .fromState = PM_SRAM_STATE_RET, .toState = PM_SRAM_STATE_ON, - }, - [PM_SRAM_TR_ON_TO_OFF] = { + }, { .fromState = PM_SRAM_STATE_ON, .toState = PM_SRAM_STATE_OFF, - }, - [PM_SRAM_TR_OFF_TO_ON] = { + }, { .fromState = PM_SRAM_STATE_OFF, .toState = PM_SRAM_STATE_ON, }, }; +/** + * PmSramFsmHandler() - Sram FSM handler, performs transition actions + * @slave Slave whose state should be changed + * @nextState State the slave should enter + * + * @return Status of performing transition action + */ +static u32 PmSramFsmHandler(PmSlave* const slave, const PmStateId nextState) +{ + u32 status = PM_RET_ERROR_INTERNAL; + PmSlaveSram* sram = (PmSlaveSram*)slave->node.derived; + + switch (slave->node.currState) { + case PM_SRAM_STATE_ON: + if (PM_SRAM_STATE_RET == nextState) { + /* ON -> RET */ + XPfw_RMW32(sram->retCtrlAddr, sram->retCtrlMask, + sram->retCtrlMask); + status = XST_SUCCESS; + } else if (PM_SRAM_STATE_OFF == nextState) { + /* ON -> OFF*/ + status = sram->PwrDn(); + } else { + } + break; + case PM_SRAM_STATE_RET: + if (PM_SRAM_STATE_ON == nextState) { + /* RET -> ON */ + XPfw_RMW32(sram->retCtrlAddr, sram->retCtrlMask, + ~sram->retCtrlMask); + status = XST_SUCCESS; + } else if (PM_SRAM_STATE_OFF == nextState) { + /* RET -> OFF */ + status = sram->PwrDn(); + } else { + } + break; + case PM_SRAM_STATE_OFF: + if (PM_SRAM_STATE_ON == nextState) { + /* OFF -> ON */ + status = sram->PwrUp(); + } + break; + default: + break; + } + + if (status == XST_SUCCESS) { + slave->node.currState = nextState; + status = PM_RET_SUCCESS; + } else { + status = PM_RET_ERROR_FAILURE; + } + return status; +} + /* Sram FSM */ static const PmSlaveFsm slaveSramFsm = { .states = pmSramStates, .statesCnt = PM_SRAM_STATE_MAX, .trans = pmSramTransitions, - .transCnt = PM_SRAM_TR_MAX, - .actions = pmSramActions, + .transCnt = ARRAY_SIZE(pmSramTransitions), + .enterState = PmSramFsmHandler, }; static PmRequirement* const pmL2Reqs[] = { @@ -338,12 +140,15 @@ PmSlaveSram pmSlaveL2_g = { .currState = PM_SRAM_STATE_ON, .ops = NULL, }, - .instId = PM_SRAM_L2, .reqs = pmL2Reqs, .reqsCnt = ARRAY_SIZE(pmL2Reqs), .wake = NULL, .slvFsm = &slaveSramFsm, }, + .PwrDn = XpbrPwrDnL2Bank0Handler, + .PwrUp = XpbrPwrUpL2Bank0Handler, + .retCtrlAddr = PMU_LOCAL_L2_RET_CNTRL, + .retCtrlMask = PMU_LOCAL_L2_RET_CNTRL_BANK0_MASK, }; static PmRequirement* const pmOcm0Reqs[] = { @@ -361,12 +166,15 @@ PmSlaveSram pmSlaveOcm0_g = { .currState = PM_SRAM_STATE_ON, .ops = NULL, }, - .instId = PM_SRAM_OCM0, .reqs = pmOcm0Reqs, .reqsCnt = ARRAY_SIZE(pmOcm0Reqs), .wake = NULL, .slvFsm = &slaveSramFsm, }, + .PwrDn = XpbrPwrDnOcmBank0Handler, + .PwrUp = XpbrPwrUpOcmBank0Handler, + .retCtrlAddr = PMU_LOCAL_OCM_RET_CNTRL, + .retCtrlMask = PMU_LOCAL_OCM_RET_CNTRL_BANK0_MASK, }; static PmRequirement* const pmOcm1Reqs[] = { @@ -384,12 +192,15 @@ PmSlaveSram pmSlaveOcm1_g = { .currState = PM_SRAM_STATE_ON, .ops = NULL, }, - .instId = PM_SRAM_OCM1, .reqs = pmOcm1Reqs, .reqsCnt = ARRAY_SIZE(pmOcm1Reqs), .wake = NULL, .slvFsm = &slaveSramFsm, }, + .PwrDn = XpbrPwrDnOcmBank1Handler, + .PwrUp = XpbrPwrUpOcmBank1Handler, + .retCtrlAddr = PMU_LOCAL_OCM_RET_CNTRL, + .retCtrlMask = PMU_LOCAL_OCM_RET_CNTRL_BANK1_MASK, }; static PmRequirement* const pmOcm2Reqs[] = { @@ -407,12 +218,15 @@ PmSlaveSram pmSlaveOcm2_g = { .currState = PM_SRAM_STATE_ON, .ops = NULL, }, - .instId = PM_SRAM_OCM2, .reqs = pmOcm2Reqs, .reqsCnt = ARRAY_SIZE(pmOcm2Reqs), .wake = NULL, .slvFsm = &slaveSramFsm, }, + .PwrDn = XpbrPwrDnOcmBank2Handler, + .PwrUp = XpbrPwrUpOcmBank2Handler, + .retCtrlAddr = PMU_LOCAL_OCM_RET_CNTRL, + .retCtrlMask = PMU_LOCAL_OCM_RET_CNTRL_BANK2_MASK, }; static PmRequirement* const pmOcm3Reqs[] = { @@ -430,12 +244,15 @@ PmSlaveSram pmSlaveOcm3_g = { .currState = PM_SRAM_STATE_ON, .ops = NULL, }, - .instId = PM_SRAM_OCM3, .reqs = pmOcm3Reqs, .reqsCnt = ARRAY_SIZE(pmOcm3Reqs), .wake = NULL, .slvFsm = &slaveSramFsm, }, + .PwrDn = XpbrPwrDnOcmBank3Handler, + .PwrUp = XpbrPwrUpOcmBank3Handler, + .retCtrlAddr = PMU_LOCAL_OCM_RET_CNTRL, + .retCtrlMask = PMU_LOCAL_OCM_RET_CNTRL_BANK3_MASK, }; static PmRequirement* const pmTcm0AReqs[] = { @@ -452,12 +269,15 @@ PmSlaveSram pmSlaveTcm0A_g = { .currState = PM_SRAM_STATE_ON, .ops = NULL, }, - .instId = PM_SRAM_TCM0A, .reqs = pmTcm0AReqs, .reqsCnt = ARRAY_SIZE(pmTcm0AReqs), .wake = NULL, .slvFsm = &slaveSramFsm, }, + .PwrDn = XpbrPwrDnTcm0AHandler, + .PwrUp = XpbrPwrUpTcm0AHandler, + .retCtrlAddr = PMU_LOCAL_TCM_RET_CNTRL, + .retCtrlMask = PMU_LOCAL_TCM_RET_CNTRL_TCMA0_MASK, }; static PmRequirement* const pmTcm0BReqs[] = { @@ -474,12 +294,15 @@ PmSlaveSram pmSlaveTcm0B_g = { .currState = PM_SRAM_STATE_ON, .ops = NULL, }, - .instId = PM_SRAM_TCM0B, .reqs = pmTcm0BReqs, .reqsCnt = ARRAY_SIZE(pmTcm0BReqs), .wake = NULL, .slvFsm = &slaveSramFsm, }, + .PwrDn = XpbrPwrDnTcm0BHandler, + .PwrUp = XpbrPwrUpTcm0BHandler, + .retCtrlAddr = PMU_LOCAL_TCM_RET_CNTRL, + .retCtrlMask = PMU_LOCAL_TCM_RET_CNTRL_TCMB0_MASK, }; static PmRequirement* const pmTcm1AReqs[] = { @@ -496,12 +319,15 @@ PmSlaveSram pmSlaveTcm1A_g = { .currState = PM_SRAM_STATE_ON, .ops = NULL, }, - .instId = PM_SRAM_TCM1A, .reqs = pmTcm1AReqs, .reqsCnt = ARRAY_SIZE(pmTcm1AReqs), .wake = NULL, .slvFsm = &slaveSramFsm, }, + .PwrDn = XpbrPwrDnTcm1AHandler, + .PwrUp = XpbrPwrUpTcm1AHandler, + .retCtrlAddr = PMU_LOCAL_TCM_RET_CNTRL, + .retCtrlMask = PMU_LOCAL_TCM_RET_CNTRL_TCMA1_MASK, }; static PmRequirement* const pmTcm1BReqs[] = { @@ -518,10 +344,13 @@ PmSlaveSram pmSlaveTcm1B_g = { .currState = PM_SRAM_STATE_ON, .ops = NULL, }, - .instId = PM_SRAM_TCM1B, .reqs = pmTcm1BReqs, .reqsCnt = ARRAY_SIZE(pmTcm1BReqs), .wake = NULL, .slvFsm = &slaveSramFsm, }, + .PwrDn = XpbrPwrDnTcm1BHandler, + .PwrUp = XpbrPwrUpTcm1BHandler, + .retCtrlAddr = PMU_LOCAL_TCM_RET_CNTRL, + .retCtrlMask = PMU_LOCAL_TCM_RET_CNTRL_TCMB1_MASK, }; diff --git a/lib/sw_apps/zynqmp_pmufw/src/pm_sram.h b/lib/sw_apps/zynqmp_pmufw/src/pm_sram.h index 31601702..3697f3f3 100644 --- a/lib/sw_apps/zynqmp_pmufw/src/pm_sram.h +++ b/lib/sw_apps/zynqmp_pmufw/src/pm_sram.h @@ -40,36 +40,29 @@ /********************************************************************* * Macros ********************************************************************/ -/* Instances of SRAM */ -#define PM_SRAM_OCM0 0U -#define PM_SRAM_OCM1 1U -#define PM_SRAM_OCM2 2U -#define PM_SRAM_OCM3 3U -#define PM_SRAM_TCM0A 4U -#define PM_SRAM_TCM0B 5U -#define PM_SRAM_TCM1A 6U -#define PM_SRAM_TCM1B 7U -#define PM_SRAM_L2 8U -#define PM_SRAM_INST_MAX 9U - /* Power states of SRAM */ -#define PM_SRAM_STATE_OFF 0U -#define PM_SRAM_STATE_RET 1U -#define PM_SRAM_STATE_ON 2U -#define PM_SRAM_STATE_MAX 3U - -/* Transitions of sram */ -#define PM_SRAM_TR_ON_TO_RET 0U -#define PM_SRAM_TR_RET_TO_ON 1U -#define PM_SRAM_TR_ON_TO_OFF 2U -#define PM_SRAM_TR_OFF_TO_ON 3U -#define PM_SRAM_TR_MAX 4U +#define PM_SRAM_STATE_OFF 0U +#define PM_SRAM_STATE_RET 1U +#define PM_SRAM_STATE_ON 2U +#define PM_SRAM_STATE_MAX 3U /********************************************************************* * Structure definitions ********************************************************************/ +/** + * PmSlaveSram - Structure of a sram object, derived from slave + * @slv Base slave structure + * @PwrDn Pointer to a power down pmu-rom handler + * @PwrUp Pointer to a power up pmu-rom handler + * @retCtrlAddr Address of the retention control register + * @retCtrlMask Mask of the retention bits in control register + */ typedef struct PmSlaveSram { PmSlave slv; + PmTranHandler PwrDn; + PmTranHandler PwrUp; + const u32 retCtrlAddr; + const u32 retCtrlMask; } PmSlaveSram; /********************************************************************* diff --git a/lib/sw_apps/zynqmp_pmufw/src/pm_usb.c b/lib/sw_apps/zynqmp_pmufw/src/pm_usb.c index 88c67c37..e3ea4c64 100644 --- a/lib/sw_apps/zynqmp_pmufw/src/pm_usb.c +++ b/lib/sw_apps/zynqmp_pmufw/src/pm_usb.c @@ -37,16 +37,6 @@ #include "pm_master.h" #include "xpfw_rom_interface.h" -#define DEFTR(INST, TRAN) ((INST * PM_USB_TR_MAX) + TRAN) - -static const PmTranHandler pmUsbActions[PM_USB_INST_MAX * PM_USB_TR_MAX] = { - [ DEFTR(PM_USB_0, PM_USB_TR_ON_TO_OFF) ] = XpbrPwrDnUsb0Handler, - [ DEFTR(PM_USB_0, PM_USB_TR_OFF_TO_ON) ] = XpbrPwrUpUsb0Handler, - - [ DEFTR(PM_USB_1, PM_USB_TR_ON_TO_OFF) ] = XpbrPwrDnUsb1Handler, - [ DEFTR(PM_USB_1, PM_USB_TR_OFF_TO_ON) ] = XpbrPwrUpUsb1Handler, -}; - /* USB states */ static const u32 pmUsbStates[PM_USB_STATE_MAX] = { [PM_USB_STATE_OFF] = PM_CAP_WAKEUP, @@ -54,24 +44,59 @@ static const u32 pmUsbStates[PM_USB_STATE_MAX] = { }; /* USB transition table (from which to which state USB can transit) */ -static const PmStateTran pmUsbTransitions[PM_USB_TR_MAX] = { - [PM_USB_TR_ON_TO_OFF] = { +static const PmStateTran pmUsbTransitions[] = { + { .fromState = PM_USB_STATE_ON, .toState = PM_USB_STATE_OFF, - }, - [PM_USB_TR_OFF_TO_ON] = { + }, { .fromState = PM_USB_STATE_OFF, .toState = PM_USB_STATE_ON, }, }; +/** + * PmUsbFsmHandler() - Usb FSM handler, performs transition actions + * @slave Slave whose state should be changed + * @nextState State the slave should enter + * + * @return Status of performing transition action + */ +static u32 PmUsbFsmHandler(PmSlave* const slave, const PmStateId nextState) +{ + u32 status = PM_RET_ERROR_INTERNAL; + PmSlaveUsb* usb = (PmSlaveUsb*)slave->node.derived; + switch (slave->node.currState) { + case PM_USB_STATE_ON: + if (PM_USB_STATE_OFF == nextState) { + /* ON -> OFF*/ + status = usb->PwrDn(); + } + break; + case PM_USB_STATE_OFF: + if (PM_USB_STATE_ON == nextState) { + /* OFF -> ON */ + status = usb->PwrUp(); + } + break; + default: + break; + } + if (status == XST_SUCCESS) { + slave->node.currState = nextState; + status = PM_RET_SUCCESS; + } else { + status = PM_RET_ERROR_FAILURE; + } + return status; +} + /* USB FSM */ static const PmSlaveFsm slaveUsbFsm = { .states = pmUsbStates, - .statesCnt = PM_USB_STATE_MAX, + .statesCnt = ARRAY_SIZE(pmUsbStates), .trans = pmUsbTransitions, - .transCnt = PM_USB_TR_MAX, - .actions = pmUsbActions, + .transCnt = ARRAY_SIZE(pmUsbTransitions), + .enterState = PmUsbFsmHandler, }; static PmRequirement* const pmUsb0Reqs[] = { @@ -93,12 +118,13 @@ PmSlaveUsb pmSlaveUsb0_g = { .derived = &pmSlaveUsb0_g, .ops = NULL, }, - .instId = PM_USB_0, .reqs = pmUsb0Reqs, .reqsCnt = ARRAY_SIZE(pmUsb0Reqs), .wake = &pmUsb0Wake, .slvFsm = &slaveUsbFsm, }, + .PwrDn = XpbrPwrDnUsb0Handler, + .PwrUp = XpbrPwrUpUsb0Handler, }; static PmRequirement* const pmUsb1Reqs[] = { @@ -120,10 +146,11 @@ PmSlaveUsb pmSlaveUsb1_g = { .derived = &pmSlaveUsb1_g, .ops = NULL, }, - .instId = PM_USB_1, .reqs = pmUsb1Reqs, .reqsCnt = ARRAY_SIZE(pmUsb1Reqs), .wake = &pmUsb1Wake, .slvFsm = &slaveUsbFsm, }, + .PwrDn = XpbrPwrDnUsb1Handler, + .PwrUp = XpbrPwrUpUsb1Handler, }; diff --git a/lib/sw_apps/zynqmp_pmufw/src/pm_usb.h b/lib/sw_apps/zynqmp_pmufw/src/pm_usb.h index 3f2af421..e04d18b7 100644 --- a/lib/sw_apps/zynqmp_pmufw/src/pm_usb.h +++ b/lib/sw_apps/zynqmp_pmufw/src/pm_usb.h @@ -40,26 +40,24 @@ /********************************************************************* * Macros ********************************************************************/ -/* Instances of USB */ -#define PM_USB_0 0U -#define PM_USB_1 1U -#define PM_USB_INST_MAX 2U - /* Power states of USB */ #define PM_USB_STATE_OFF 0U #define PM_USB_STATE_ON 1U #define PM_USB_STATE_MAX 2U -/* Transitions of USB */ -#define PM_USB_TR_ON_TO_OFF 0U -#define PM_USB_TR_OFF_TO_ON 1U -#define PM_USB_TR_MAX 2U - /********************************************************************* * Structure definitions ********************************************************************/ +/** + * PmSlaveUsb - Structure used for Usb + * @slv Base slave structure + * @PwrDn Pointer to a power down pmu-rom handler + * @PwrUp Pointer to a power up pmu-rom handler + */ typedef struct PmSlaveUsb { PmSlave slv; + PmTranHandler PwrDn; + PmTranHandler PwrUp; } PmSlaveUsb; /********************************************************************* diff --git a/lib/sw_apps/zynqmp_pmufw/src/xpfw_version.h b/lib/sw_apps/zynqmp_pmufw/src/xpfw_version.h index c66ad207..50e0c334 100644 --- a/lib/sw_apps/zynqmp_pmufw/src/xpfw_version.h +++ b/lib/sw_apps/zynqmp_pmufw/src/xpfw_version.h @@ -1,4 +1,4 @@ #ifndef ZYNQMP_XPFW_VERSION__H_ #define ZYNQMP_XPFW_VERSION__H_ - #define ZYNQMP_XPFW_VERSION "2015.1-swbeta2-24-g08fdf937b248" + #define ZYNQMP_XPFW_VERSION "2015.1-swbeta2-25-gbe36ee956067" #endif