From e9d58acc53f5b03ace0b6b1d35d1e9c8741f733b Mon Sep 17 00:00:00 2001 From: Rohit Consul Date: Thu, 16 Jul 2015 17:05:00 -0700 Subject: [PATCH] v_vcresampler: Updated driver to align with hip flow This patch supports HIP based video processing subsystem by reorganizing the HLS generated code to align with xilinx driver guidelines. Signed-off-by: Rohit Consul Reviewed-by: Andrei Simion --- .../v_vcresampler/data/v_vcresampler.mdd | 0 .../v_vcresampler/data/v_vcresampler.tcl | 73 +++++++++----- .../v_vcresampler/src/xv_vcresampler.c | 97 ++++++++++--------- .../v_vcresampler/src/xv_vcresampler.h | 16 +-- .../v_vcresampler/src/xv_vcresampler_g.c | 62 ++++++++++++ .../v_vcresampler/src/xv_vcresampler_l2.c | 5 +- .../v_vcresampler/src/xv_vcresampler_l2.h | 3 +- .../v_vcresampler/src/xv_vcresampler_linux.c | 18 ++-- .../v_vcresampler/src/xv_vcresampler_sinit.c | 40 ++++---- 9 files changed, 209 insertions(+), 105 deletions(-) mode change 100644 => 100755 XilinxProcessorIPLib/drivers/v_vcresampler/data/v_vcresampler.mdd mode change 100644 => 100755 XilinxProcessorIPLib/drivers/v_vcresampler/data/v_vcresampler.tcl create mode 100644 XilinxProcessorIPLib/drivers/v_vcresampler/src/xv_vcresampler_g.c diff --git a/XilinxProcessorIPLib/drivers/v_vcresampler/data/v_vcresampler.mdd b/XilinxProcessorIPLib/drivers/v_vcresampler/data/v_vcresampler.mdd old mode 100644 new mode 100755 diff --git a/XilinxProcessorIPLib/drivers/v_vcresampler/data/v_vcresampler.tcl b/XilinxProcessorIPLib/drivers/v_vcresampler/data/v_vcresampler.tcl old mode 100644 new mode 100755 index ee84fe51..86816779 --- a/XilinxProcessorIPLib/drivers/v_vcresampler/data/v_vcresampler.tcl +++ b/XilinxProcessorIPLib/drivers/v_vcresampler/data/v_vcresampler.tcl @@ -1,9 +1,33 @@ -# ============================================================== -# File generated by Vivado(TM) HLS - High-Level Synthesis from C, C++ and SystemC -# Version: 2015.1 -# Copyright (C) 2015 Xilinx Inc. All rights reserved. +############################################################################## # -# ============================================================== +# Copyright (C) 2015 Xilinx, Inc. All rights reserved. +# +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"),to deal +# in the Software without restriction, including without limitation the rights +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +# copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# Use of the Software is limited solely to applications: +# (a) running on a Xilinx device, or +# (b) that interact with a Xilinx device through a bus or interconnect. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +# XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER +# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF +# OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +# SOFTWARE. +# +# Except as contained in this notice, the name of the Xilinx shall not be used +# in advertising or otherwise to promote the sale, use or other dealings in +# this Software without prior written authorization from Xilinx. +############################################################################### proc generate {drv_handle} { xdefine_include_file $drv_handle "xparameters.h" "XV_vcresampler" \ @@ -11,32 +35,35 @@ proc generate {drv_handle} { "DEVICE_ID" \ "C_S_AXI_CTRL_BASEADDR" \ "C_S_AXI_CTRL_HIGHADDR" \ - "SAMPLES_PER_CLOCK" \ - "MAX_COLS" \ - "MAX_ROWS" \ - "MAX_DATA_WIDTH" \ - "CONVERT_TYPE" \ - "NUM_V_TAPS" + "SAMPLES_PER_CLOCK" \ + "NUM_VIDEO_COMPONENTS" \ + "MAX_COLS" \ + "MAX_ROWS" \ + "MAX_DATA_WIDTH" \ + "CONVERT_TYPE" \ + "NUM_V_TAPS" xdefine_config_file $drv_handle "xv_vcresampler_g.c" "XV_vcresampler" \ "DEVICE_ID" \ "C_S_AXI_CTRL_BASEADDR" \ - "SAMPLES_PER_CLOCK" \ - "MAX_COLS" \ - "MAX_ROWS" \ - "MAX_DATA_WIDTH" \ - "CONVERT_TYPE" \ - "NUM_V_TAPS" + "SAMPLES_PER_CLOCK" \ + "NUM_VIDEO_COMPONENTS" \ + "MAX_COLS" \ + "MAX_ROWS" \ + "MAX_DATA_WIDTH" \ + "CONVERT_TYPE" \ + "NUM_V_TAPS" xdefine_canonical_xpars $drv_handle "xparameters.h" "XV_vcresampler" \ "DEVICE_ID" \ "C_S_AXI_CTRL_BASEADDR" \ "C_S_AXI_CTRL_HIGHADDR" \ - "SAMPLES_PER_CLOCK" \ - "MAX_COLS" \ - "MAX_ROWS" \ - "MAX_DATA_WIDTH" \ - "CONVERT_TYPE" \ - "NUM_V_TAPS" + "SAMPLES_PER_CLOCK" \ + "NUM_VIDEO_COMPONENTS" \ + "MAX_COLS" \ + "MAX_ROWS" \ + "MAX_DATA_WIDTH" \ + "CONVERT_TYPE" \ + "NUM_V_TAPS" } diff --git a/XilinxProcessorIPLib/drivers/v_vcresampler/src/xv_vcresampler.c b/XilinxProcessorIPLib/drivers/v_vcresampler/src/xv_vcresampler.c index 43783cef..7d29e405 100644 --- a/XilinxProcessorIPLib/drivers/v_vcresampler/src/xv_vcresampler.c +++ b/XilinxProcessorIPLib/drivers/v_vcresampler/src/xv_vcresampler.c @@ -11,16 +11,21 @@ /************************** Function Implementation *************************/ #ifndef __linux__ -int XV_vcresampler_CfgInitialize(XV_vcresampler *InstancePtr, XV_vcresampler_Config *ConfigPtr) { +int XV_vcresampler_CfgInitialize(XV_vcresampler *InstancePtr, + XV_vcresampler_Config *ConfigPtr, + u32 EffectiveAddr) { Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(ConfigPtr != NULL); + Xil_AssertNonvoid(EffectiveAddr != (u32)0x0); - /* Setup the instance */ - (void)memset((void *)InstancePtr, 0, sizeof(XV_vcresampler)); - (void)memcpy((void *)&(InstancePtr->Config), (const void *)ConfigPtr, - sizeof(XV_vcresampler_Config)); + /* Setup the instance */ + (void)memset((void *)InstancePtr, 0, sizeof(XV_vcresampler)); + (void)memcpy((void *)&(InstancePtr->Config), (const void *)ConfigPtr, + sizeof(XV_vcresampler_Config)); - InstancePtr->Ctrl_BaseAddress = ConfigPtr->Ctrl_BaseAddress; + InstancePtr->Config.BaseAddress = EffectiveAddr; + + /* Set the flag to indicate the driver is ready */ InstancePtr->IsReady = XIL_COMPONENT_IS_READY; return XST_SUCCESS; @@ -33,8 +38,8 @@ void XV_vcresampler_Start(XV_vcresampler *InstancePtr) { Xil_AssertVoid(InstancePtr != NULL); Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); - Data = XV_vcresampler_ReadReg(InstancePtr->Ctrl_BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_AP_CTRL) & 0x80; - XV_vcresampler_WriteReg(InstancePtr->Ctrl_BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_AP_CTRL, Data | 0x01); + Data = XV_vcresampler_ReadReg(InstancePtr->Config.BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_AP_CTRL) & 0x80; + XV_vcresampler_WriteReg(InstancePtr->Config.BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_AP_CTRL, Data | 0x01); } u32 XV_vcresampler_IsDone(XV_vcresampler *InstancePtr) { @@ -43,7 +48,7 @@ u32 XV_vcresampler_IsDone(XV_vcresampler *InstancePtr) { Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); - Data = XV_vcresampler_ReadReg(InstancePtr->Ctrl_BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_AP_CTRL); + Data = XV_vcresampler_ReadReg(InstancePtr->Config.BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_AP_CTRL); return (Data >> 1) & 0x1; } @@ -53,7 +58,7 @@ u32 XV_vcresampler_IsIdle(XV_vcresampler *InstancePtr) { Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); - Data = XV_vcresampler_ReadReg(InstancePtr->Ctrl_BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_AP_CTRL); + Data = XV_vcresampler_ReadReg(InstancePtr->Config.BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_AP_CTRL); return (Data >> 2) & 0x1; } @@ -63,7 +68,7 @@ u32 XV_vcresampler_IsReady(XV_vcresampler *InstancePtr) { Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); - Data = XV_vcresampler_ReadReg(InstancePtr->Ctrl_BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_AP_CTRL); + Data = XV_vcresampler_ReadReg(InstancePtr->Config.BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_AP_CTRL); // check ap_start to see if the pcore is ready for next input return !(Data & 0x1); } @@ -72,21 +77,21 @@ void XV_vcresampler_EnableAutoRestart(XV_vcresampler *InstancePtr) { Xil_AssertVoid(InstancePtr != NULL); Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); - XV_vcresampler_WriteReg(InstancePtr->Ctrl_BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_AP_CTRL, 0x80); + XV_vcresampler_WriteReg(InstancePtr->Config.BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_AP_CTRL, 0x80); } void XV_vcresampler_DisableAutoRestart(XV_vcresampler *InstancePtr) { Xil_AssertVoid(InstancePtr != NULL); Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); - XV_vcresampler_WriteReg(InstancePtr->Ctrl_BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_AP_CTRL, 0); + XV_vcresampler_WriteReg(InstancePtr->Config.BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_AP_CTRL, 0); } void XV_vcresampler_Set_HwReg_width(XV_vcresampler *InstancePtr, u32 Data) { Xil_AssertVoid(InstancePtr != NULL); Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); - XV_vcresampler_WriteReg(InstancePtr->Ctrl_BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_HWREG_WIDTH_DATA, Data); + XV_vcresampler_WriteReg(InstancePtr->Config.BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_HWREG_WIDTH_DATA, Data); } u32 XV_vcresampler_Get_HwReg_width(XV_vcresampler *InstancePtr) { @@ -95,7 +100,7 @@ u32 XV_vcresampler_Get_HwReg_width(XV_vcresampler *InstancePtr) { Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); - Data = XV_vcresampler_ReadReg(InstancePtr->Ctrl_BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_HWREG_WIDTH_DATA); + Data = XV_vcresampler_ReadReg(InstancePtr->Config.BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_HWREG_WIDTH_DATA); return Data; } @@ -103,7 +108,7 @@ void XV_vcresampler_Set_HwReg_height(XV_vcresampler *InstancePtr, u32 Data) { Xil_AssertVoid(InstancePtr != NULL); Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); - XV_vcresampler_WriteReg(InstancePtr->Ctrl_BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_HWREG_HEIGHT_DATA, Data); + XV_vcresampler_WriteReg(InstancePtr->Config.BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_HWREG_HEIGHT_DATA, Data); } u32 XV_vcresampler_Get_HwReg_height(XV_vcresampler *InstancePtr) { @@ -112,7 +117,7 @@ u32 XV_vcresampler_Get_HwReg_height(XV_vcresampler *InstancePtr) { Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); - Data = XV_vcresampler_ReadReg(InstancePtr->Ctrl_BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_HWREG_HEIGHT_DATA); + Data = XV_vcresampler_ReadReg(InstancePtr->Config.BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_HWREG_HEIGHT_DATA); return Data; } @@ -120,7 +125,7 @@ void XV_vcresampler_Set_HwReg_input_video_format(XV_vcresampler *InstancePtr, u3 Xil_AssertVoid(InstancePtr != NULL); Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); - XV_vcresampler_WriteReg(InstancePtr->Ctrl_BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_HWREG_INPUT_VIDEO_FORMAT_DATA, Data); + XV_vcresampler_WriteReg(InstancePtr->Config.BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_HWREG_INPUT_VIDEO_FORMAT_DATA, Data); } u32 XV_vcresampler_Get_HwReg_input_video_format(XV_vcresampler *InstancePtr) { @@ -129,7 +134,7 @@ u32 XV_vcresampler_Get_HwReg_input_video_format(XV_vcresampler *InstancePtr) { Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); - Data = XV_vcresampler_ReadReg(InstancePtr->Ctrl_BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_HWREG_INPUT_VIDEO_FORMAT_DATA); + Data = XV_vcresampler_ReadReg(InstancePtr->Config.BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_HWREG_INPUT_VIDEO_FORMAT_DATA); return Data; } @@ -137,7 +142,7 @@ void XV_vcresampler_Set_HwReg_output_video_format(XV_vcresampler *InstancePtr, u Xil_AssertVoid(InstancePtr != NULL); Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); - XV_vcresampler_WriteReg(InstancePtr->Ctrl_BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_HWREG_OUTPUT_VIDEO_FORMAT_DATA, Data); + XV_vcresampler_WriteReg(InstancePtr->Config.BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_HWREG_OUTPUT_VIDEO_FORMAT_DATA, Data); } u32 XV_vcresampler_Get_HwReg_output_video_format(XV_vcresampler *InstancePtr) { @@ -146,7 +151,7 @@ u32 XV_vcresampler_Get_HwReg_output_video_format(XV_vcresampler *InstancePtr) { Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); - Data = XV_vcresampler_ReadReg(InstancePtr->Ctrl_BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_HWREG_OUTPUT_VIDEO_FORMAT_DATA); + Data = XV_vcresampler_ReadReg(InstancePtr->Config.BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_HWREG_OUTPUT_VIDEO_FORMAT_DATA); return Data; } @@ -154,7 +159,7 @@ void XV_vcresampler_Set_HwReg_coefs_0_0(XV_vcresampler *InstancePtr, u32 Data) { Xil_AssertVoid(InstancePtr != NULL); Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); - XV_vcresampler_WriteReg(InstancePtr->Ctrl_BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_HWREG_COEFS_0_0_DATA, Data); + XV_vcresampler_WriteReg(InstancePtr->Config.BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_HWREG_COEFS_0_0_DATA, Data); } u32 XV_vcresampler_Get_HwReg_coefs_0_0(XV_vcresampler *InstancePtr) { @@ -163,7 +168,7 @@ u32 XV_vcresampler_Get_HwReg_coefs_0_0(XV_vcresampler *InstancePtr) { Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); - Data = XV_vcresampler_ReadReg(InstancePtr->Ctrl_BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_HWREG_COEFS_0_0_DATA); + Data = XV_vcresampler_ReadReg(InstancePtr->Config.BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_HWREG_COEFS_0_0_DATA); return Data; } @@ -171,7 +176,7 @@ void XV_vcresampler_Set_HwReg_coefs_0_1(XV_vcresampler *InstancePtr, u32 Data) { Xil_AssertVoid(InstancePtr != NULL); Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); - XV_vcresampler_WriteReg(InstancePtr->Ctrl_BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_HWREG_COEFS_0_1_DATA, Data); + XV_vcresampler_WriteReg(InstancePtr->Config.BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_HWREG_COEFS_0_1_DATA, Data); } u32 XV_vcresampler_Get_HwReg_coefs_0_1(XV_vcresampler *InstancePtr) { @@ -180,7 +185,7 @@ u32 XV_vcresampler_Get_HwReg_coefs_0_1(XV_vcresampler *InstancePtr) { Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); - Data = XV_vcresampler_ReadReg(InstancePtr->Ctrl_BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_HWREG_COEFS_0_1_DATA); + Data = XV_vcresampler_ReadReg(InstancePtr->Config.BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_HWREG_COEFS_0_1_DATA); return Data; } @@ -188,7 +193,7 @@ void XV_vcresampler_Set_HwReg_coefs_0_2(XV_vcresampler *InstancePtr, u32 Data) { Xil_AssertVoid(InstancePtr != NULL); Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); - XV_vcresampler_WriteReg(InstancePtr->Ctrl_BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_HWREG_COEFS_0_2_DATA, Data); + XV_vcresampler_WriteReg(InstancePtr->Config.BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_HWREG_COEFS_0_2_DATA, Data); } u32 XV_vcresampler_Get_HwReg_coefs_0_2(XV_vcresampler *InstancePtr) { @@ -197,7 +202,7 @@ u32 XV_vcresampler_Get_HwReg_coefs_0_2(XV_vcresampler *InstancePtr) { Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); - Data = XV_vcresampler_ReadReg(InstancePtr->Ctrl_BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_HWREG_COEFS_0_2_DATA); + Data = XV_vcresampler_ReadReg(InstancePtr->Config.BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_HWREG_COEFS_0_2_DATA); return Data; } @@ -205,7 +210,7 @@ void XV_vcresampler_Set_HwReg_coefs_0_3(XV_vcresampler *InstancePtr, u32 Data) { Xil_AssertVoid(InstancePtr != NULL); Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); - XV_vcresampler_WriteReg(InstancePtr->Ctrl_BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_HWREG_COEFS_0_3_DATA, Data); + XV_vcresampler_WriteReg(InstancePtr->Config.BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_HWREG_COEFS_0_3_DATA, Data); } u32 XV_vcresampler_Get_HwReg_coefs_0_3(XV_vcresampler *InstancePtr) { @@ -214,7 +219,7 @@ u32 XV_vcresampler_Get_HwReg_coefs_0_3(XV_vcresampler *InstancePtr) { Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); - Data = XV_vcresampler_ReadReg(InstancePtr->Ctrl_BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_HWREG_COEFS_0_3_DATA); + Data = XV_vcresampler_ReadReg(InstancePtr->Config.BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_HWREG_COEFS_0_3_DATA); return Data; } @@ -222,7 +227,7 @@ void XV_vcresampler_Set_HwReg_coefs_1_0(XV_vcresampler *InstancePtr, u32 Data) { Xil_AssertVoid(InstancePtr != NULL); Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); - XV_vcresampler_WriteReg(InstancePtr->Ctrl_BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_HWREG_COEFS_1_0_DATA, Data); + XV_vcresampler_WriteReg(InstancePtr->Config.BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_HWREG_COEFS_1_0_DATA, Data); } u32 XV_vcresampler_Get_HwReg_coefs_1_0(XV_vcresampler *InstancePtr) { @@ -231,7 +236,7 @@ u32 XV_vcresampler_Get_HwReg_coefs_1_0(XV_vcresampler *InstancePtr) { Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); - Data = XV_vcresampler_ReadReg(InstancePtr->Ctrl_BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_HWREG_COEFS_1_0_DATA); + Data = XV_vcresampler_ReadReg(InstancePtr->Config.BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_HWREG_COEFS_1_0_DATA); return Data; } @@ -239,7 +244,7 @@ void XV_vcresampler_Set_HwReg_coefs_1_1(XV_vcresampler *InstancePtr, u32 Data) { Xil_AssertVoid(InstancePtr != NULL); Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); - XV_vcresampler_WriteReg(InstancePtr->Ctrl_BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_HWREG_COEFS_1_1_DATA, Data); + XV_vcresampler_WriteReg(InstancePtr->Config.BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_HWREG_COEFS_1_1_DATA, Data); } u32 XV_vcresampler_Get_HwReg_coefs_1_1(XV_vcresampler *InstancePtr) { @@ -248,7 +253,7 @@ u32 XV_vcresampler_Get_HwReg_coefs_1_1(XV_vcresampler *InstancePtr) { Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); - Data = XV_vcresampler_ReadReg(InstancePtr->Ctrl_BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_HWREG_COEFS_1_1_DATA); + Data = XV_vcresampler_ReadReg(InstancePtr->Config.BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_HWREG_COEFS_1_1_DATA); return Data; } @@ -256,7 +261,7 @@ void XV_vcresampler_Set_HwReg_coefs_1_2(XV_vcresampler *InstancePtr, u32 Data) { Xil_AssertVoid(InstancePtr != NULL); Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); - XV_vcresampler_WriteReg(InstancePtr->Ctrl_BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_HWREG_COEFS_1_2_DATA, Data); + XV_vcresampler_WriteReg(InstancePtr->Config.BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_HWREG_COEFS_1_2_DATA, Data); } u32 XV_vcresampler_Get_HwReg_coefs_1_2(XV_vcresampler *InstancePtr) { @@ -265,7 +270,7 @@ u32 XV_vcresampler_Get_HwReg_coefs_1_2(XV_vcresampler *InstancePtr) { Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); - Data = XV_vcresampler_ReadReg(InstancePtr->Ctrl_BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_HWREG_COEFS_1_2_DATA); + Data = XV_vcresampler_ReadReg(InstancePtr->Config.BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_HWREG_COEFS_1_2_DATA); return Data; } @@ -273,7 +278,7 @@ void XV_vcresampler_Set_HwReg_coefs_1_3(XV_vcresampler *InstancePtr, u32 Data) { Xil_AssertVoid(InstancePtr != NULL); Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); - XV_vcresampler_WriteReg(InstancePtr->Ctrl_BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_HWREG_COEFS_1_3_DATA, Data); + XV_vcresampler_WriteReg(InstancePtr->Config.BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_HWREG_COEFS_1_3_DATA, Data); } u32 XV_vcresampler_Get_HwReg_coefs_1_3(XV_vcresampler *InstancePtr) { @@ -282,7 +287,7 @@ u32 XV_vcresampler_Get_HwReg_coefs_1_3(XV_vcresampler *InstancePtr) { Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); - Data = XV_vcresampler_ReadReg(InstancePtr->Ctrl_BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_HWREG_COEFS_1_3_DATA); + Data = XV_vcresampler_ReadReg(InstancePtr->Config.BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_HWREG_COEFS_1_3_DATA); return Data; } @@ -290,14 +295,14 @@ void XV_vcresampler_InterruptGlobalEnable(XV_vcresampler *InstancePtr) { Xil_AssertVoid(InstancePtr != NULL); Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); - XV_vcresampler_WriteReg(InstancePtr->Ctrl_BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_GIE, 1); + XV_vcresampler_WriteReg(InstancePtr->Config.BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_GIE, 1); } void XV_vcresampler_InterruptGlobalDisable(XV_vcresampler *InstancePtr) { Xil_AssertVoid(InstancePtr != NULL); Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); - XV_vcresampler_WriteReg(InstancePtr->Ctrl_BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_GIE, 0); + XV_vcresampler_WriteReg(InstancePtr->Config.BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_GIE, 0); } void XV_vcresampler_InterruptEnable(XV_vcresampler *InstancePtr, u32 Mask) { @@ -306,8 +311,8 @@ void XV_vcresampler_InterruptEnable(XV_vcresampler *InstancePtr, u32 Mask) { Xil_AssertVoid(InstancePtr != NULL); Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); - Register = XV_vcresampler_ReadReg(InstancePtr->Ctrl_BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_IER); - XV_vcresampler_WriteReg(InstancePtr->Ctrl_BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_IER, Register | Mask); + Register = XV_vcresampler_ReadReg(InstancePtr->Config.BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_IER); + XV_vcresampler_WriteReg(InstancePtr->Config.BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_IER, Register | Mask); } void XV_vcresampler_InterruptDisable(XV_vcresampler *InstancePtr, u32 Mask) { @@ -316,27 +321,27 @@ void XV_vcresampler_InterruptDisable(XV_vcresampler *InstancePtr, u32 Mask) { Xil_AssertVoid(InstancePtr != NULL); Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); - Register = XV_vcresampler_ReadReg(InstancePtr->Ctrl_BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_IER); - XV_vcresampler_WriteReg(InstancePtr->Ctrl_BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_IER, Register & (~Mask)); + Register = XV_vcresampler_ReadReg(InstancePtr->Config.BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_IER); + XV_vcresampler_WriteReg(InstancePtr->Config.BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_IER, Register & (~Mask)); } void XV_vcresampler_InterruptClear(XV_vcresampler *InstancePtr, u32 Mask) { Xil_AssertVoid(InstancePtr != NULL); Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); - XV_vcresampler_WriteReg(InstancePtr->Ctrl_BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_ISR, Mask); + XV_vcresampler_WriteReg(InstancePtr->Config.BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_ISR, Mask); } u32 XV_vcresampler_InterruptGetEnabled(XV_vcresampler *InstancePtr) { Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); - return XV_vcresampler_ReadReg(InstancePtr->Ctrl_BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_IER); + return XV_vcresampler_ReadReg(InstancePtr->Config.BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_IER); } u32 XV_vcresampler_InterruptGetStatus(XV_vcresampler *InstancePtr) { Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); - return XV_vcresampler_ReadReg(InstancePtr->Ctrl_BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_ISR); + return XV_vcresampler_ReadReg(InstancePtr->Config.BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_ISR); } diff --git a/XilinxProcessorIPLib/drivers/v_vcresampler/src/xv_vcresampler.h b/XilinxProcessorIPLib/drivers/v_vcresampler/src/xv_vcresampler.h index 64a030b4..ef3966e6 100644 --- a/XilinxProcessorIPLib/drivers/v_vcresampler/src/xv_vcresampler.h +++ b/XilinxProcessorIPLib/drivers/v_vcresampler/src/xv_vcresampler.h @@ -45,13 +45,14 @@ typedef uint32_t u32; */ typedef struct { u16 DeviceId; /**< Unique ID of device */ - u32 Ctrl_BaseAddress; /**< The base address of the core instance. */ - int PixPerClk; /**< Samples Per Clock supported by core instance */ + u32 BaseAddress; /**< The base address of the core instance. */ + u16 PixPerClk; /**< Samples Per Clock supported by core instance */ + u16 NumVidComponents; /**< Number of Video Components */ u16 MaxWidth; /**< Maximum columns supported by core instance */ u16 MaxHeight; /**< Maximum rows supported by core instance */ - int MaxDataWidth; /**< Maximum Data width of each channel */ - int ResamplingType; /**< Resampling Method selected */ - u8 NumTaps; /**< Number of filter taps */ + u16 MaxDataWidth; /**< Maximum Data width of each channel */ + u16 ResamplingType; /**< Resampling Method selected */ + u16 NumTaps; /**< Number of filter taps */ } XV_vcresampler_Config; #endif @@ -60,7 +61,6 @@ typedef struct { */ typedef struct { XV_vcresampler_Config Config; /**< Hardware Configuration */ - u32 Ctrl_BaseAddress; /**< The base address of the core instance. */ u32 IsReady; /**< Device is initialized and ready */ } XV_vcresampler; @@ -89,7 +89,9 @@ typedef struct { #ifndef __linux__ int XV_vcresampler_Initialize(XV_vcresampler *InstancePtr, u16 DeviceId); XV_vcresampler_Config* XV_vcresampler_LookupConfig(u16 DeviceId); -int XV_vcresampler_CfgInitialize(XV_vcresampler *InstancePtr, XV_vcresampler_Config *ConfigPtr); +int XV_vcresampler_CfgInitialize(XV_vcresampler *InstancePtr, + XV_vcresampler_Config *ConfigPtr, + u32 EffectiveAddr); #else int XV_vcresampler_Initialize(XV_vcresampler *InstancePtr, const char* InstanceName); int XV_vcresampler_Release(XV_vcresampler *InstancePtr); diff --git a/XilinxProcessorIPLib/drivers/v_vcresampler/src/xv_vcresampler_g.c b/XilinxProcessorIPLib/drivers/v_vcresampler/src/xv_vcresampler_g.c new file mode 100644 index 00000000..87bb3eb9 --- /dev/null +++ b/XilinxProcessorIPLib/drivers/v_vcresampler/src/xv_vcresampler_g.c @@ -0,0 +1,62 @@ + +/******************************************************************* +* +* CAUTION: This file is automatically generated by HSI. +* Version: +* DO NOT EDIT. +* +* Copyright (C) 2010-2015 Xilinx, Inc. All Rights Reserved.* +*Permission is hereby granted, free of charge, to any person obtaining a copy +*of this software and associated documentation files (the Software), to deal +*in the Software without restriction, including without limitation the rights +*to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +*copies of the Software, and to permit persons to whom the Software is +*furnished to do so, subject to the following conditions: +* +*The above copyright notice and this permission notice shall be included in +*all copies or substantial portions of the Software. +* +* Use of the Software is limited solely to applications: +*(a) running on a Xilinx device, or +*(b) that interact with a Xilinx device through a bus or interconnect. +* +*THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +*IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +*FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +*XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +*WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT +*OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +* +*Except as contained in this notice, the name of the Xilinx shall not be used +*in advertising or otherwise to promote the sale, use or other dealings in +*this Software without prior written authorization from Xilinx. +* + +* +* Description: Driver configuration +* +*******************************************************************/ + +#include "xparameters.h" +#include "xv_vcresampler.h" + +/* +* The configuration table for devices +*/ + +XV_vcresampler_Config XV_vcresampler_ConfigTable[] = +{ + { +#ifdef XPAR_XV_VCRESAMPLER_NUM_INSTANCES + XPAR_V_PROC_SS_0_V_VCRESAMPLER_0_DEVICE_ID, + XPAR_V_PROC_SS_0_V_VCRESAMPLER_0_S_AXI_CTRL_BASEADDR, + XPAR_V_PROC_SS_0_V_VCRESAMPLER_0_SAMPLES_PER_CLOCK, + XPAR_V_PROC_SS_0_V_VCRESAMPLER_0_NUM_VIDEO_COMPONENTS, + XPAR_V_PROC_SS_0_V_VCRESAMPLER_0_MAX_COLS, + XPAR_V_PROC_SS_0_V_VCRESAMPLER_0_MAX_ROWS, + XPAR_V_PROC_SS_0_V_VCRESAMPLER_0_MAX_DATA_WIDTH, + XPAR_V_PROC_SS_0_V_VCRESAMPLER_0_CONVERT_TYPE, + XPAR_V_PROC_SS_0_V_VCRESAMPLER_0_NUM_V_TAPS +#endif + } +}; diff --git a/XilinxProcessorIPLib/drivers/v_vcresampler/src/xv_vcresampler_l2.c b/XilinxProcessorIPLib/drivers/v_vcresampler/src/xv_vcresampler_l2.c index 865ec9ba..d8271d67 100644 --- a/XilinxProcessorIPLib/drivers/v_vcresampler/src/xv_vcresampler_l2.c +++ b/XilinxProcessorIPLib/drivers/v_vcresampler/src/xv_vcresampler_l2.c @@ -35,6 +35,7 @@ * @file xv_vcresampler_l2.c * @addtogroup v_vcresampler_v1_0 * @{ +* @details * * The Vertical Chroma Resampler Layer-2 Driver. * The functions in this file provides an abstraction from the register peek/poke @@ -46,7 +47,7 @@ * * Ver Who Date Changes * ----- ---- -------- ------------------------------------------------------- -* 1.00 rc 05/01/15 Initial Release +* 1.00 rco 07/21/15 Initial Release * * @@ -239,7 +240,7 @@ void XV_VCrsmplDbgReportStatus(XV_vcresampler *InstancePtr) done = XV_vcresampler_IsDone(pVCrsmplr); idle = XV_vcresampler_IsIdle(pVCrsmplr); ready = XV_vcresampler_IsReady(pVCrsmplr); - ctrl = XV_vcresampler_ReadReg(pVCrsmplr->Ctrl_BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_AP_CTRL); + ctrl = XV_vcresampler_ReadReg(pVCrsmplr->Config.BaseAddress, XV_VCRESAMPLER_CTRL_ADDR_AP_CTRL); vidfmtIn = XV_vcresampler_Get_HwReg_input_video_format(pVCrsmplr); vidfmtOut = XV_vcresampler_Get_HwReg_output_video_format(pVCrsmplr); diff --git a/XilinxProcessorIPLib/drivers/v_vcresampler/src/xv_vcresampler_l2.h b/XilinxProcessorIPLib/drivers/v_vcresampler/src/xv_vcresampler_l2.h index 3848c86a..f6314b82 100644 --- a/XilinxProcessorIPLib/drivers/v_vcresampler/src/xv_vcresampler_l2.h +++ b/XilinxProcessorIPLib/drivers/v_vcresampler/src/xv_vcresampler_l2.h @@ -35,6 +35,7 @@ * @file xv_vcresampler_l2.h * @addtogroup v_vcresampler_v1_0 * @{ +* @details * * This header file contains layer 2 API's of the vertical chroma resampler * sub-core driver.The functions contained herein provides a high level @@ -89,7 +90,7 @@ * * Ver Who Date Changes * ----- ---- -------- ------------------------------------------------------- -* 1.00 rc 05/01/15 Initial Release +* 1.00 rc 07/21/15 Initial Release * * diff --git a/XilinxProcessorIPLib/drivers/v_vcresampler/src/xv_vcresampler_linux.c b/XilinxProcessorIPLib/drivers/v_vcresampler/src/xv_vcresampler_linux.c index b6e2afce..e364e008 100644 --- a/XilinxProcessorIPLib/drivers/v_vcresampler/src/xv_vcresampler_linux.c +++ b/XilinxProcessorIPLib/drivers/v_vcresampler/src/xv_vcresampler_linux.c @@ -87,8 +87,8 @@ static int uio_info_read_map_size(XV_vcresampler_uio_info* info, int n) { } int XV_vcresampler_Initialize(XV_vcresampler *InstancePtr, const char* InstanceName) { - XV_vcresampler_uio_info *InfoPtr = &uio_info; - struct dirent **namelist; + XV_vcresampler_uio_info *InfoPtr = &uio_info; + struct dirent **namelist; int i, n; char* s; char file[ MAX_UIO_PATH_SIZE ]; @@ -100,9 +100,9 @@ int XV_vcresampler_Initialize(XV_vcresampler *InstancePtr, const char* InstanceN n = scandir("/sys/class/uio", &namelist, 0, alphasort); if (n < 0) return XST_DEVICE_NOT_FOUND; for (i = 0; i < n; i++) { - strcpy(file, "/sys/class/uio/"); - strcat(file, namelist[i]->d_name); - strcat(file, "/name"); + strcpy(file, "/sys/class/uio/"); + strcat(file, namelist[i]->d_name); + strcat(file, "/name"); if ((line_from_file(file, name) == 0) && (strcmp(name, InstanceName) == 0)) { flag = 1; s = namelist[i]->d_name; @@ -126,8 +126,8 @@ int XV_vcresampler_Initialize(XV_vcresampler *InstancePtr, const char* InstanceN } // NOTE: slave interface 'Ctrl' should be mapped to uioX/map0 - InstancePtr->Ctrl_BaseAddress = (u32)mmap(NULL, InfoPtr->maps[0].size, PROT_READ|PROT_WRITE, MAP_SHARED, InfoPtr->uio_fd, 0 * getpagesize()); - assert(InstancePtr->Ctrl_BaseAddress); + InstancePtr->Config.BaseAddress = (u32)mmap(NULL, InfoPtr->maps[0].size, PROT_READ|PROT_WRITE, MAP_SHARED, InfoPtr->uio_fd, 0 * getpagesize()); + assert(InstancePtr->Config.BaseAddress); InstancePtr->IsReady = XIL_COMPONENT_IS_READY; @@ -135,12 +135,12 @@ int XV_vcresampler_Initialize(XV_vcresampler *InstancePtr, const char* InstanceN } int XV_vcresampler_Release(XV_vcresampler *InstancePtr) { - XV_vcresampler_uio_info *InfoPtr = &uio_info; + XV_vcresampler_uio_info *InfoPtr = &uio_info; assert(InstancePtr != NULL); assert(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); - munmap((void*)InstancePtr->Ctrl_BaseAddress, InfoPtr->maps[0].size); + munmap((void*)InstancePtr->Config.BaseAddress, InfoPtr->maps[0].size); close(InfoPtr->uio_fd); diff --git a/XilinxProcessorIPLib/drivers/v_vcresampler/src/xv_vcresampler_sinit.c b/XilinxProcessorIPLib/drivers/v_vcresampler/src/xv_vcresampler_sinit.c index ff49c152..ea78e559 100644 --- a/XilinxProcessorIPLib/drivers/v_vcresampler/src/xv_vcresampler_sinit.c +++ b/XilinxProcessorIPLib/drivers/v_vcresampler/src/xv_vcresampler_sinit.c @@ -11,35 +11,41 @@ #include "xparameters.h" #include "xv_vcresampler.h" +#ifndef XPAR_XV_VCRESAMPLER_NUM_INSTANCES +#define XPAR_XV_VCRESAMPLER_NUM_INSTANCES 0 +#endif + extern XV_vcresampler_Config XV_vcresampler_ConfigTable[]; XV_vcresampler_Config *XV_vcresampler_LookupConfig(u16 DeviceId) { - XV_vcresampler_Config *ConfigPtr = NULL; + XV_vcresampler_Config *ConfigPtr = NULL; - int Index; + int Index; - for (Index = 0; Index < XPAR_XV_VCRESAMPLER_NUM_INSTANCES; Index++) { - if (XV_vcresampler_ConfigTable[Index].DeviceId == DeviceId) { - ConfigPtr = &XV_vcresampler_ConfigTable[Index]; - break; - } - } + for (Index = 0; Index < XPAR_XV_VCRESAMPLER_NUM_INSTANCES; Index++) { + if (XV_vcresampler_ConfigTable[Index].DeviceId == DeviceId) { + ConfigPtr = &XV_vcresampler_ConfigTable[Index]; + break; + } + } - return ConfigPtr; + return ConfigPtr; } int XV_vcresampler_Initialize(XV_vcresampler *InstancePtr, u16 DeviceId) { - XV_vcresampler_Config *ConfigPtr; + XV_vcresampler_Config *ConfigPtr; - Xil_AssertNonvoid(InstancePtr != NULL); + Xil_AssertNonvoid(InstancePtr != NULL); - ConfigPtr = XV_vcresampler_LookupConfig(DeviceId); - if (ConfigPtr == NULL) { - InstancePtr->IsReady = 0; - return (XST_DEVICE_NOT_FOUND); - } + ConfigPtr = XV_vcresampler_LookupConfig(DeviceId); + if (ConfigPtr == NULL) { + InstancePtr->IsReady = 0; + return (XST_DEVICE_NOT_FOUND); + } - return XV_vcresampler_CfgInitialize(InstancePtr, ConfigPtr); + return XV_vcresampler_CfgInitialize(InstancePtr, + ConfigPtr, + ConfigPtr->BaseAddress); } #endif