From fa10a1a066be440889866408bd017445ba12026d Mon Sep 17 00:00:00 2001
From: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Date: Sun, 17 Aug 2014 18:07:16 -0700
Subject: [PATCH] dptx: Handle new IP configuration parameter.

GT data width.

Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
---
 XilinxProcessorIPLib/drivers/dptx/src/xdptx_spm.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/XilinxProcessorIPLib/drivers/dptx/src/xdptx_spm.c b/XilinxProcessorIPLib/drivers/dptx/src/xdptx_spm.c
index d7457376..51d7950f 100644
--- a/XilinxProcessorIPLib/drivers/dptx/src/xdptx_spm.c
+++ b/XilinxProcessorIPLib/drivers/dptx/src/xdptx_spm.c
@@ -815,7 +815,13 @@ static void XDptx_CalculateTs(XDptx *InstancePtr, u8 Stream, u8 BitsPerPixel)
 		/* Round up. */
 		MsaConfig->TransferUnitSize++;
 	}
-	if ((MsaConfig->TransferUnitSize % 2) != 0) {
+	if ((InstancePtr->Config.PayloadDataWidth == 4) &&
+				(MsaConfig->TransferUnitSize % 4) != 0) {
+		/* Set to a multiple of 4 boundary. */
+		MsaConfig->TransferUnitSize += (4 -
+					(MsaConfig->TransferUnitSize % 4));
+	}
+	else if ((MsaConfig->TransferUnitSize % 2) != 0) {
 		/* Set to an even boundary. */
 		MsaConfig->TransferUnitSize++;
 	}