From fd8fe7be595ba7507afd26e518e7c1eb00a3b6dc Mon Sep 17 00:00:00 2001 From: Durga challa Date: Wed, 27 Aug 2014 18:13:43 +0530 Subject: [PATCH] Deinterlacer: Modified source files Modified source files and doxygen report is updated. Signed-off-by: Durga challa --- .../deinterlacer/data/deinterlacer.tcl | 6 ++- .../drivers/deinterlacer/src/xdeint.c | 53 ++++++++++++++----- .../drivers/deinterlacer/src/xdeint.h | 7 ++- .../drivers/deinterlacer/src/xdeint_hw.h | 2 +- .../drivers/deinterlacer/src/xdeint_intr.c | 2 +- 5 files changed, 49 insertions(+), 21 deletions(-) diff --git a/XilinxProcessorIPLib/drivers/deinterlacer/data/deinterlacer.tcl b/XilinxProcessorIPLib/drivers/deinterlacer/data/deinterlacer.tcl index 0d34cd27..2792a2df 100755 --- a/XilinxProcessorIPLib/drivers/deinterlacer/data/deinterlacer.tcl +++ b/XilinxProcessorIPLib/drivers/deinterlacer/data/deinterlacer.tcl @@ -33,7 +33,9 @@ proc generate {drv_handle} { - xdefine_include_file $drv_handle "xparameters.h" "XDEINT" "NUM_INSTANCES" "DEVICE_ID" "C_DIAG" "C_MOTION" "C_DEPTH" "C_STREAMS" "C_TRIPLE_PORT" "C_MAX_XSIZE" "C_BASEADDR" "C_HIGHADDR" "XDeint" "DEVICE_ID" "C_BASEADDR" + xdefine_include_file $drv_handle "xparameters.h" "XDEINT" "NUM_INSTANCES" "DEVICE_ID" "C_DIAG" "C_MOTION" "C_DEPTH" "C_STREAMS" "C_TRIPLE_PORT" "C_MAX_XSIZE" "C_BASEADDR" "C_HIGHADDR" + xdefine_config_file $drv_handle "xdeint_g.c" "XDeint" "DEVICE_ID" "C_BASEADDR" - xdefine_canonical_xpars $drv_handle "xparameters.h" "Deinterlacer" "DEVICE_ID" "C_BASEADDR" "C_HIGHADDR" "XDeint" "DEVICE_ID" "C_BASEADDR" + + xdefine_canonical_xpars $drv_handle "xparameters.h" "Deinterlacer" "DEVICE_ID" "C_BASEADDR" "C_HIGHADDR" } diff --git a/XilinxProcessorIPLib/drivers/deinterlacer/src/xdeint.c b/XilinxProcessorIPLib/drivers/deinterlacer/src/xdeint.c index 5334f95c..8b06509e 100755 --- a/XilinxProcessorIPLib/drivers/deinterlacer/src/xdeint.c +++ b/XilinxProcessorIPLib/drivers/deinterlacer/src/xdeint.c @@ -178,9 +178,17 @@ void XDeint_SetFramestore(XDeint *InstancePtr, * * @param InstancePtr is a pointer to XDeint instance to be worked on. * @param Packing selects the XSVI video packing mode. +* - 0 4:2:0 Packging is used. +* - XDEINT_MODE_PACKING_0 4:2:2 Packging is used. +* - XDEINT_MODE_PACKING_1 4:4:4 Packging is used. * @param Color selects what color space to use. +* - 0 YUV color space is used. +* - XDEINT_MODE_COL RGB color space is used. * @param Order selects which field ordering is being used. +* - 0 the field order maps to PAL/HD/3G. +* - XDEINT_MODE_FIELD_ORDER the field order maps to NTSC/480i * @param PSF enables psf (progressive segmented frame mode). +* - XDEINT_MODE_PSF_ENABLE for psf enable. * * @return None. * @@ -251,8 +259,10 @@ void XDeint_SetThresholds(XDeint *InstancePtr, u32 ThresholdT1, * @param InstancePtr is a pointer to XDeint instance to be worked on. * @param Enable_32 allows detectors to automatically control * Deinterlacer core. +* - 1 Pull down enable 3:2 * @param Enable_22 allows detectors to automatically control * Deinterlacer core. +* - 1 Pull down enable 2:2 * * @return None. * @@ -277,11 +287,11 @@ void XDeint_SetPulldown(XDeint *InstancePtr, u32 Enable_32, ModeReg &= ~(((u32)(XDEINT_MODE_PULL_22_ENABLE)) | ((u32)(XDEINT_MODE_PULL_32_ENABLE))); /* Checking for Enable_32 */ - if (Enable_32 == 1U) { + if (Enable_32 == 1) { ModeReg |= ((u32)(XDEINT_MODE_PULL_32_ENABLE)); } /* Checking for Enable_22 */ - if (Enable_22 == 1U) { + if (Enable_22 == 1) { ModeReg |= ((u32)(XDEINT_MODE_PULL_22_ENABLE)); } @@ -306,7 +316,7 @@ u32 XDeint_GetVersion(XDeint *InstancePtr) u32 Version; /* Verify arguments. */ - Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertNonvoid(InstancePtr != NULL); /* Read core version. */ Version = XDeint_ReadReg(InstancePtr->Config.BaseAddress, @@ -364,26 +374,43 @@ static void StubCallBack(void *CallBackRef) * This function gets the video format of the Deinterlacer core. * * @param InstancePtr is a pointer to XDeint instance to be worked on. +* @param Packing is a pointer to 32 bit variable which holds Packaging +* format. +* - 0 4:2:0 Packging is used. +* - XDEINT_MODE_PACKING_0 4:2:2 Packging is used. +* - XDEINT_MODE_PACKING_1 4:4:4 Packging is used. +* @param Color is a pointer to 32 bit varaible which holds color value. +* - 0 YUV color space is used. +* - XDEINT_MODE_COL RGB color space is used. +* @param Order is a pointer to 32 bit varaible which holds Field order. +* - 0 the field order maps to PAL/HD/3G. +* - XDEINT_MODE_FIELD_ORDER the field order maps to NTSC/480i +* @param PSF is a pointer to 32 bit variable which says whether Psf +* enabled or disabled. +* - XDEINT_MODE_PSF_ENABLE for psf enable. * -* @return Returns the video format. +* @return None. * * @note None. * ******************************************************************************/ -u32 XDeint_GetVideo(XDeint *InstancePtr) +void XDeint_GetVideo(XDeint *InstancePtr, u32 *Packing, u32 *Color, + u32 *Order, u32 *PSF) { u32 ModeReg; /* Verify arguments. */ - Xil_AssertNonvoid(InstancePtr != NULL); - Xil_AssertNonvoid(InstancePtr->IsReady == + Xil_AssertVoid(InstancePtr != NULL); + Xil_AssertVoid(InstancePtr->IsReady == (u32)(XIL_COMPONENT_IS_READY)); /* Read modify write the mode register. */ ModeReg = XDeint_ReadReg((InstancePtr)->Config.BaseAddress, (XDEINT_MODE_OFFSET)); - - return ModeReg; + *Packing = ModeReg & (XDEINT_MODE_PACKING_MASK); + *Color = ModeReg & (XDEINT_MODE_COL_MASK); + *Order = ModeReg & (XDEINT_MODE_FIELD_ORDER_MASK); + *PSF = ModeReg & (XDEINT_MODE_PSF_ENABLE_MASK); } /*****************************************************************************/ @@ -454,9 +481,9 @@ void XDeint_GetSize(XDeint *InstancePtr, u32 *Width, u32 *Height) Xil_AssertVoid(Height != NULL); *Height = XDeint_ReadReg((InstancePtr)->Config.BaseAddress, - (XDEINT_HEIGHT_OFFSET)); + (XDEINT_HEIGHT_OFFSET)) & (XDEINT_HEIGHT_MASK); *Width = XDeint_ReadReg((InstancePtr)->Config.BaseAddress, - (XDEINT_WIDTH_OFFSET)); + (XDEINT_WIDTH_OFFSET)) & (XDEINT_WIDTH_MASK); } /*****************************************************************************/ @@ -485,9 +512,9 @@ void XDeint_GetThresholds(XDeint *InstancePtr, u32 *ThresholdT1, /* Determine the T1->T2 cross fade setting.*/ *ThresholdT1 = XDeint_ReadReg((InstancePtr)->Config.BaseAddress, - (XDEINT_THRESH1_OFFSET)); + (XDEINT_THRESH1_OFFSET)) & (XDEINT_THRESHOLD_MASK); *ThresholdT2 = XDeint_ReadReg((InstancePtr)->Config.BaseAddress, - (XDEINT_THRESH2_OFFSET)); + (XDEINT_THRESH2_OFFSET)) & (XDEINT_THRESHOLD_MASK); } /*****************************************************************************/ diff --git a/XilinxProcessorIPLib/drivers/deinterlacer/src/xdeint.h b/XilinxProcessorIPLib/drivers/deinterlacer/src/xdeint.h index 79b80d64..573c577e 100755 --- a/XilinxProcessorIPLib/drivers/deinterlacer/src/xdeint.h +++ b/XilinxProcessorIPLib/drivers/deinterlacer/src/xdeint.h @@ -153,8 +153,6 @@ typedef struct { u32 XSize; /**< X Input Dimension */ u32 YSize; /**< Y Input Dimension */ XDeint_CallBack IntCallBack; /**< Call back for Status interrupt */ - void *IntRef; /**< To be passed to interrupt - * call back */ } XDeint; /***************** Macros (Inline Functions) Definitions *********************/ @@ -490,7 +488,7 @@ typedef struct { ******************************************************************************/ #define XDeint_GetAlgorithm(InstancePtr) \ XDeint_ReadReg((InstancePtr)->Config.BaseAddress, \ - (XDEINT_MODE_OFFSET)) & (~(XDEINT_MODE_ALGORITHM_FULL)) + (XDEINT_MODE_OFFSET)) & (XDEINT_MODE_ALGORITHM_FULL) /************************** Function Prototypes ******************************/ /* @@ -520,7 +518,8 @@ void XDeint_SetVideo(XDeint *InstancePtr, u32 Packing, u32 Color, u32 Order, void XDeint_IntrHandler(void *InstancePtr); int XDeint_SetCallBack(XDeint *InstancePtr, void *CallBackFunc); -u32 XDeint_GetVideo(XDeint *InstancePtr); +void XDeint_GetVideo(XDeint *InstancePtr, u32 *Packing, u32 *Color, + u32 *Order, u32 *PSF); void XDeint_GetPulldown(XDeint *InstancePtr, u32 *Enable_32, u32 *Enable_22); void XDeint_GetSize(XDeint *InstancePtr, u32 *Width, u32 *Height); void XDeint_GetThresholds(XDeint *InstancePtr, u32 *ThresholdT1, diff --git a/XilinxProcessorIPLib/drivers/deinterlacer/src/xdeint_hw.h b/XilinxProcessorIPLib/drivers/deinterlacer/src/xdeint_hw.h index f35945e9..2a0a6d79 100755 --- a/XilinxProcessorIPLib/drivers/deinterlacer/src/xdeint_hw.h +++ b/XilinxProcessorIPLib/drivers/deinterlacer/src/xdeint_hw.h @@ -143,7 +143,7 @@ extern "C" { /** @name Error Status/ bit definitions: * @{ */ -#define XDEINT_STS_ERROR_OFFSET 0x00000008 /**< Deinterlacer +#define XDEINT_STS_ERROR 0x00000008 /**< Deinterlacer * internal FIFO * error */ #define XDEINT_STS_FS_CFG_ERROR 0x00000100 /**< Frame store Write diff --git a/XilinxProcessorIPLib/drivers/deinterlacer/src/xdeint_intr.c b/XilinxProcessorIPLib/drivers/deinterlacer/src/xdeint_intr.c index 053e4c78..adb112a0 100755 --- a/XilinxProcessorIPLib/drivers/deinterlacer/src/xdeint_intr.c +++ b/XilinxProcessorIPLib/drivers/deinterlacer/src/xdeint_intr.c @@ -108,7 +108,7 @@ void XDeint_IntrHandler(void *InstancePtr) PendingIntr = XDeint_IntrGetPending(XDeintPtr); /* A known interrupt has happened. */ - if (PendingIntr == (u32)1) { + if (PendingIntr != 0) { XDeintPtr->IntCallBack(PendingIntr); }