Commit graph

926 commits

Author SHA1 Message Date
Rohit Consul
b015782fbc vprocss: Added subcores support for mutiple pixel/clk
- Code cleanup to remove interrupt handler registration.
   Subsystem does not have interrupts
 - Updated sub-core init routines to load default filter
   coefficients for scaler and chroma resamplers
 - Added layer 2 registers for chroma resamplers
 - Updated VDMA Read/Write interface to work with color depth
   instead of Bytes/Pixel

Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Reviewed-by: Andrei Simion <andreis@xilinx.com>
2015-08-04 14:11:07 +05:30
Rohit Consul
f4901fa438 v_vscaler: Added multiple pixel per clock support
- IP updated to add multiple pixel/clk support.
 - Added default filter coefficient table for 6/8/10/12 taps
 - Added API to load default coefficients or allow user to load
   externally defined coefficients
 - Peformed code cleanup to remove coefficient generation logic
   (scaler to use fixed coefficients)

Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Reviewed-by: Andrei Simion <andreis@xilinx.com>
2015-08-04 14:10:51 +05:30
Rohit Consul
5fb5067657 v_vcresampler: Added default filter coefficients
-Added filter coefficient table for 4/6/8/10 taps.
 -Added API to load the default coefficients
 -Added API to allow user to load coefficients

Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Reviewed-by: Andrei Simion <andreis@xilinx.com>
2015-08-04 14:10:44 +05:30
Rohit Consul
0e0a006e7b v_tpg: Add copyright information to mdd
Added Xilinx copyright header to mdd file

Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Reviewed-by: Andrei Simion <andreis@xilinx.com>
2015-08-04 14:10:37 +05:30
Rohit Consul
fb2d56f8c9 v_letterbox: Add copyright info to mdd
Added xilinx copyright information to mdd

Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Reviewed-by: Andrei Simion <andreis@xilinx.com>
2015-08-04 14:10:30 +05:30
Rohit Consul
4955188410 v_hscaler: Added multiple pixel per clock support
- IP updated to add multiple pixel/clk support.
- Added default filter coefficient table for 6/8/10/12 taps
- Added API to load default coefficients or allow user to load
  externally defined coefficients
- Peformed code cleanup to remove coefficient generation logic
  (scaler to use fixed coefficients)

Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Reviewed-by: Andrei Simion <andreis@xilinx.com>
2015-08-04 14:10:22 +05:30
Rohit Consul
4054a7aa4e v_hcresampler: Added default filter coefficients
-Added filter coefficient table for 4/6/8/10 taps.
-Added API to load the default coefficients
-Added API to allow user to load coefficients

Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Reviewed-by: Andrei Simion <andreis@xilinx.com>
2015-08-04 14:10:12 +05:30
Rohit Consul
533b4d0587 v_deinterlacer: Add multiple samples per clock support
IP updated to add multiple pixels per clock support resulting in
API changes in driver.

Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Reviewed-by: Andrei Simion <andreis@xilinx.com>
2015-08-04 14:10:04 +05:30
Rohit Consul
7ab5756f84 v_csc: Add copyright info
This patch adds copyright info to HLS generated mdd file

Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Reviewed-by: Andrei Simion <andreis@xilinx.com>
2015-08-04 14:09:55 +05:30
Nava kishore Manne
7a47ffd9e8 Removed executable file permission from source code files.
Signed-off-by: Nava kishore Manne <navam@xilinx.com>
Acked-by: Anirudha Sarangi   <anirudh@xilinx.com>
2015-08-03 18:32:57 +05:30
Kedareswara rao Appana
93b8d7f2f5 lwip: remove unnessary code check in tcl
This patch removes the unnecessary check in the lwip tcl
it is causing the compilation issues in few ethernetlite based designs.

Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Acked-by: Anirudha Sarangi   <anirudh@xilinx.com>
2015-08-03 18:32:01 +05:30
Sarat Chand Savitala
4968e7c610 sw_apps:zynqmp_fsbl: Updated watchdog code for JTAG bootmode
As in JTAG bootmode, watchdog is not initialized, avoided stopping of
watchdog in JTAG bootmode.

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
Acked-by: Krishna Chaitanya Patakamuri <kpataka@xilinx.com>
2015-08-03 14:55:49 +05:30
P L Sai Krishna
ad401f70a5 sdps: Used MB_Sleep API for microblaze.
This patch use MB_Sleep API for microblaze design
and removed sleep.h inclusion in xsdps.h file.

Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
Reviewed-by: Harini Katakam <harinik@xilinx.com>
2015-08-03 14:32:32 +05:30
Sarat Chand Savitala
dff2a597f9 sw_apps:zynqmp_fsbl: Added watchdog support
This patch adds System Watchdog Timer support

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
Acked-by: Krishna Chaitanya Patakamuri <kpataka@xilinx.com>
2015-08-02 21:27:53 +05:30
Harini Katakam
4ceb19f1ae emacps: Do not call error handler with an error code zero
BUFFNA is not an error and hence the status bit is cleared by the
driver. But the error handler callback is called with a zero error
code in this case. Correct the same.

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Acked-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
2015-08-02 21:27:20 +05:30
P L Sai Krishna
09cd729c86 xilffs: Used --create option for armcc compiler.
This patch use --create option for armcc compiler
instead of rc option.

Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
Reviewed-by: Harini Katakam <harinik@xilinx.com>
2015-07-31 16:56:24 +05:30
Suneel Garapati
15a5404a04 Thirdparty: bsp: freeRTOS support for all architectures
add freeRTOS bsp to support microblaze, cortexa9 and cortexr5
architectures for respective platforms.

Signed-off-by: Suneel Garapati <suneel.garapati@xilinx.com>
Acked-by: Anirudha Sarangi   <anirudh@xilinx.com>
2015-07-31 16:56:23 +05:30
Kinjal Pravinbhai Patel
60c693e0fe bsp: added support for 32bit bsp for A53
This patch modifies standalone bsp tcl to generate 32bit/64bit
a53 bsp by keeping compiler check in the tcl to copy the
appropriate source file while generating standalone bsp

Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Acked-by: Anirudha Sarangi   <anirudh@xilinx.com>
2015-07-31 16:56:22 +05:30
Sarat Chand Savitala
e1dd360db8 sw_apps:zynqmp_fsbl: Code cleanup involving emulation platforms
Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
Acked-by: Krishna Chaitanya Patakamuri <kpataka@xilinx.com>
2015-07-31 16:56:20 +05:30
RamyaSree
8dc4f9e7fd sw_apps: zynqmp_fsbl: Modified bus width in dummy phase.
This patch modifies the buswidth in dummy phase as
in data phase.

Signed-off-by: RamyaSree <rdarapun@xilinx.com>
Reviewed-by: Harini Katakam <harinik@xilinx.com>
2015-07-31 16:56:19 +05:30
RamyaSree
8e402be829 sw_apps: zynqmp_fsbl: enabled cache for qspipsu boot.
This patch enables cache for qspipsu boot.

Signed-off-by: RamyaSree <rdarapun@xilinx.com>
Reviewed-by: Harini Katakam <harinik@xilinx.com>
2015-07-31 16:56:19 +05:30
RamyaSree
6f67bc7850 sw_apps: zynqmp_fsbl: added Tx/Rx Flags in qspi message format
This patch added Tx/Rx flags in qspi message format
according to qspipsu driver changes.

Signed-off-by: RamyaSree <rdarapun@xilinx.com>
Reviewed-by: Harini Katakam <harinik@xilinx.com>
2015-07-31 16:56:18 +05:30
Soren Brinkmann
731fcf06db xilsecure: Fix make rules
When building xilsecure with '-rR' as arguments to make causes this error:
  Compiling Xilsecure Library
  make[1]: *** No rule to make target 'xsecure_sha.o', needed by 'libxilsecure.a'.  Stop.
  Makefile:27: recipe for target 'psu_cortexa53_0/libsrc/xilsecure_v1_0/src/make.libs' failed
  make: *** [psu_cortexa53_0/libsrc/xilsecure_v1_0/src/make.libs] Error 2

Fixing this by adding a pattern rules matching the required object files.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Bhavik Ameta <bameta@xilinx.com>
2015-07-31 16:56:17 +05:30
Soren Brinkmann
c8bca6ce1a xilsecure: Remove dead code
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Bhavik Ameta <bameta@xilinx.com>
2015-07-31 16:56:16 +05:30
Nava kishore Manne
a5ca97dccf Fix for iomodule os tcl to support MultiBd and Packaged Bd
Acked-for-series: Naga Sureshkumar Relli <nagasure@xilinx.com>
Signed-off-by: Nava kishore Manne <navam@xilinx.com>
2015-07-31 16:56:16 +05:30
Nava kishore Manne
cabafea458 Fix for standalone os tcl to support MultiBd and Packaged Bd
Acked-for-series: Naga Sureshkumar Relli <nagasure@xilinx.com>
Signed-off-by: Nava kishore Manne <navam@xilinx.com>
2015-07-31 16:56:15 +05:30
Nava kishore Manne
a96825c608 Fix for xilikernel os tcl to support MultiBd and Packaged Bd
Acked-for-series: Naga Sureshkumar Relli <nagasure@xilinx.com>
Signed-off-by: Nava kishore Manne <navam@xilinx.com>
2015-07-31 16:56:15 +05:30
Kedareswara rao Appana
416cbc369b axiethernet: Fix bug in the driver tcl when axi ethernet is configured with fifo
This patch fixes the issue AXI Ethernet with FIFO will fail to
create the BSP if the interrupt pin on the FIFO is unconnected.

Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Acked-by: Anirudha Sarangi   <anirudh@xilinx.com>
2015-07-31 16:56:14 +05:30
Kedareswara rao Appana
436240a4f7 lwip: Add support for axi ethernet with fifo on zynq
This patch adds lwip support for the axi ethernet with fifo
combination on zynq.

Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Acked-by: Anirudha Sarangi   <anirudh@xilinx.com>
2015-07-31 16:56:13 +05:30
Punnaiah Choudary Kalluri
c46210930c nandpsu: Convert the three line comments to single line
This patch converts the three line comments to single line

Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
Acked-by: Anirudha Sarangi   <anirudh@xilinx.com>
2015-07-31 16:56:13 +05:30
Punnaiah Choudary Kalluri
30c8402cdc nandpsu: Remove redundant code
This patch adds common routines by removing the possible redundant
code from the functions.

Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
Acked-by: Anirudha Sarangi   <anirudh@xilinx.com>
2015-07-31 16:56:12 +05:30
Punnaiah Choudary Kalluri
fb124d3372 nandpsu: Decrease the XNANDPSU_MAX_BLOCKS value
This change is to reduce the size of the static bbt table size
from 8KB to 4KB because so far we have not identified the
flash part that has more than 16K blocks and also it will
reduce the bsp size.

Driver warns if the device has more number of blocks than the
defined value so that this can be incremented in future and if
there is a part available.

Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
Acked-by: Anirudha Sarangi   <anirudh@xilinx.com>
2015-07-31 16:56:11 +05:30
Punnaiah Choudary Kalluri
ac89dc0908 nandpsu: Remove NO_OOB option for bbt
As per the csurom, Bbt signature is always stored in oob area.
So, to sync with csurom, removing the NO_OOB(Bbt signature stores
in page area) functionality.

Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
Acked-by: Anirudha Sarangi   <anirudh@xilinx.com>
2015-07-31 16:56:11 +05:30
Punnaiah Choudary Kalluri
aeb988e08a nandpsu: Remove buswidth option
Controller supports only 8 bit mode. So, no need to configure
this value as this is the only option supported.

Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
Acked-by: Anirudha Sarangi   <anirudh@xilinx.com>
2015-07-31 16:56:09 +05:30
Kinjal Pravinbhai Patel
73e7150785 sw_apps: openamp: modified rpc_demp application
This patch modifies openamp rpc_demo application to
remove the hardcoded shared memory region and support for the
memory region configuration as per requirement of the code
in MPU region settings

Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Acked-by: Anirudha Sarangi   <anirudh@xilinx.com>
2015-07-31 16:56:07 +05:30
Kinjal Pravinbhai Patel
31b60a0499 sw_apps: openamp: modified echo_test application
This patch modifies openamp echo_test application to
remove the hardcoded shared memory region and support for the
memory region configuration as per requirement of the code
in MPU region settings

Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Acked-by: Anirudha Sarangi   <anirudh@xilinx.com>
2015-07-31 16:56:05 +05:30
Kinjal Pravinbhai Patel
078a7131d6 sw_apps: openamp: modified matrix_multiply application
This patch modifies openamp matrix_multiply application to
remove the hardcoded shared memory region and support for the
memory region configuration as per requirement of the code
in MPU region settings

Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Acked-by: Anirudha Sarangi   <anirudh@xilinx.com>
2015-07-31 16:56:04 +05:30
Anurag Kumar Vulisha
f3e699e477 vdma: Add example for vdma triple buffer api
This patch adds vdma  application to demonstrate how to use the VDMA triple buffer API.

Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Reviewed-by: Kedareswara rao Appana <appanad@xilinx.com>
2015-07-31 16:56:02 +05:30
Anurag Kumar Vulisha
1728d93515 vdma: Add support for 64 bit vdma
This patch adds support for 64 bit vdma.

Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Reviewed-by: Kedareswara rao Appana <appanad@xilinx.com>
2015-07-31 16:55:59 +05:30
Kedareswara rao Appana
187e18e3dc axidma: Add support for 64-bit addressing
This patch updates the driver to support 64-bit addressing.

Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Acked-by: Anirudha Sarangi   <anirudh@xilinx.com>
2015-07-31 16:55:58 +05:30
Kedareswara rao Appana
1ebd52627f axicdma: Add support for 64-bit addressing
This patch updates the driver to support 64-bit addressing.

Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Acked-by: Anirudha Sarangi   <anirudh@xilinx.com>
2015-07-31 16:55:55 +05:30
Kedareswara rao Appana
60efc68c14 lib: bsp: Add UPPER_32_BITS and LOWER_32_BITS macro's
UPPER_32_BITS(x) macro to handle shifts that may be >= the width of
the data type.
LOWER_32_BITS(x) macro to handle masking of 32-bit data types.

Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Acked-by: Anirudha Sarangi   <anirudh@xilinx.com>
2015-07-31 16:55:53 +05:30
Kinjal Pravinbhai Patel
1f3de84cd2 bsp: a53: added memory attribute definition in xil_mmu.h
This patch adds various memory attribute definition
which can be used along with xil_settlbattributes API to
mark certain memory region with required attributes
such as cacheable or non-cacheable, inner/outer/non shareable
or executable or not etc.

Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Acked-by: Anirudha Sarangi   <anirudh@xilinx.com>
2015-07-31 16:55:51 +05:30
Kinjal Pravinbhai Patel
39f94f2135 bsp: a53: change in boot.s to include more memory attributes
This patch inclues memory attributes like device memory and
write through cacheable memory attributes to memory
attribute index register in boot.S

Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Acked-by: Anirudha Sarangi   <anirudh@xilinx.com>
2015-07-31 16:55:49 +05:30
Soren Brinkmann
59de0ec3be xilffs: Fix make rules
When building xilffs with '-rR' as arguments to make causes this error:
  Compiling XilFFs Library
  gmake[2]: *** No rule to make target 'ff.o', needed by 'libxilffs.a'.  Stop.
  Makefile:27: recipe for target 'psu_cortexa53_0/libsrc/xilffs_v3_1/src/make.libs' failed
  gmake[1]: *** [psu_cortexa53_0/libsrc/xilffs_v3_1/src/make.libs] Error 2

Fixing this by adding a pattern rules matching the required object files.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Reviewed-by: Harini Katakam <harinik@xilinx.com>
2015-07-31 16:55:48 +05:30
Mirela Simonovic
c064d50c14 PMUFW: PM: Added missing power up/down behavior for GpuPPs
-GpuPP now has its own PmSlave derived structure and the FSM
 (new structure is added because there is no peripheral with
 exactly the same behavior - Usbs have also their own power island,
 but compared to them GpuPPs do not have wake-up capabilities
 through GIC Proxy, and GpuPPs depend on FPD while LPD is
 considered always-on)

Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com>
Tested-by: Rohit Fule <rohitf@xilinx.com>
Acked-by: Jyotheeswar Reddy Mutthareddyvari <jyothee@xilinx.com>
2015-07-31 16:55:46 +05:30
Mirela Simonovic
3283e01d23 PMUFW: xpfw_rom_interface.h: Added inline functions for power up/down GpuPPs
-Added missing power up/down inline functions for graphic processors
 needed by power management/GpuPP's FSM

Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com>
Tested-by: Rohit Fule <rohitf@xilinx.com>
Acked-by: Jyotheeswar Reddy Mutthareddyvari <jyothee@xilinx.com>
2015-07-31 16:55:44 +05:30
Davorin Mista
860c409ea5 PMUFW: PM: Remove error-only acknowledge option
Signed-off-by: Davorin Mista <davorin.mista@aggios.com>
Acked-by: Jyotheeswar Reddy Mutthareddyvari <jyothee@xilinx.com>
2015-07-31 16:55:43 +05:30
Soren Brinkmann
1f36fb5736 PMUFW: ROM interface: Fix hook table type
The ROM handlers and hooks have a different signature.

Fixes: aea3444396c3 'ROM interface: Add ROM hook table'
Cc: Kristopher Bechamp <kristop@xilinx.com>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Jyotheeswar Reddy Mutthareddyvari <jyothee@xilinx.com>
2015-07-31 16:55:41 +05:30
Filip Drazic
09090a4bc5 PMUFW: PM: slave: Added slave peripherals
Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com>
Acked-by: Jyotheeswar Reddy Mutthareddyvari <jyothee@xilinx.com>
2015-07-31 16:55:40 +05:30