stv0g/embeddedsw
1
0
Fork 0
Code Issues Pull requests Releases Wiki Activity
570 commits 3 branches 7 tags 76 MiB
Commit graph

570 commits

This branch
This branch
All branches
Author SHA1 Message Date
Andrei-Liviu Simion
f5c0d7b518 dp: rx: Added a function to enable the display timing generator. 
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:33:30 +05:30
Andrei-Liviu Simion
5d03fa54da dp: rx: Added function to wait for the PHY to be ready. 
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:33:29 +05:30
Andrei-Liviu Simion
bd16c255da dp: rx: Added timer functionality. 
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:33:28 +05:30
Andrei-Liviu Simion
b3a492d02a dp: rx: Added link configuration structure. 
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:33:27 +05:30
Andrei-Liviu Simion
73e9f13cea dp: tx: Updated selftest since usage of some defines now take an argument. 
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:33:26 +05:30
Andrei-Liviu Simion
b59cb36747 dp: rx: Added vendor specific DPCD registers. 
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:33:25 +05:30
Andrei-Liviu Simion
8933949ee9 dp: rx: Added MST sideband messaging registers. 
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:33:24 +05:30
Andrei-Liviu Simion
1cb3119c90 dp: rx: Added MST MSA offsets for streams 2, 3, and 4. 
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:33:23 +05:30
Andrei-Liviu Simion
6157f90f4d dp: rx: Added MSA registers. 
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:33:22 +05:30
Andrei-Liviu Simion
88d0e95839 dp: rx: Added DPCD configuration space registers. 
These are read-only values that represent the corresponding fields of the RX's
DPCD as seen by the TX.

Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:33:21 +05:30
Andrei-Liviu Simion
e6f4d82a4f dp: rx: Added audio registers. 
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:33:21 +05:30
Andrei-Liviu Simion
c61b1b58d5 dp: rx: Added PHY configuration and status registers. 
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:33:19 +05:30
Andrei-Liviu Simion
f4b1a740fc dp: rx: Added user video status registers. 
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:33:19 +05:30
Andrei-Liviu Simion
ea0c4f5d2b dp: rx: Added core and protocol version registers. 
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:33:18 +05:30
Andrei-Liviu Simion
c054b6714c dp: rx: Added DPCD fields. 
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:33:17 +05:30
Andrei-Liviu Simion
fe56ba6ef0 dp: rx: Added interrupt registers. 
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:33:16 +05:30
Andrei-Liviu Simion
252735630d dp: rx: Added AUX channel status registers. 
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:33:15 +05:30
Andrei-Liviu Simion
342c11f3e5 dp: rx: Added receiver core configuration registers. 
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:33:14 +05:30
Andrei-Liviu Simion
9817415d75 dp: rx: Added low-level core reads and writes. 
Created xdprx_hw.h.

Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:33:13 +05:30
Andrei-Liviu Simion
31a7c5fa1d dp: Updated copyright for 2015. 
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:33:12 +05:30
Andrei-Liviu Simion
2331dad236 video_common: edid: example: Update to use new common video naming convention. 
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:33:11 +05:30
Andrei-Liviu Simion
76c51cafa0 dp: dptx: Update to use new common video naming convention. 
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:33:11 +05:30
Andrei-Liviu Simion
64797f1a7c video_common: Updated macros to use new naming conventions. 
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:33:10 +05:30
Shadul Shaikh
e90fb4f1eb video_common: Merged Rohit Consul's additions. 
Signed-off-by: Shadul Shaikh <shaduls@xilinx.com>
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:33:09 +05:30
Shadul Shaikh
325b946207 video_common: XVid->XVidC and adherence to Xilinx coding guidelines. 
Signed-off-by: Shadul Shaikh <shaduls@xilinx.com>
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:33:08 +05:30
Andrei-Liviu Simion
9c570b85fa dp: dptx: The maximum iteration count for channel equalization is fixed at 5. 
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:33:07 +05:30
Andrei-Liviu Simion
6cdf439d02 dp: tx: The channel equalization sequence only depends on the loop counter. 
No check is done for same voltage swing.

Required for DisplayPort compliance.

Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:33:06 +05:30
Andrei-Liviu Simion
331244ad31 dp: dptx: Training should fail if clock recovery fails on maximum voltage swing. 
Required for DisplayPort compliance.

Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:33:05 +05:30
Andrei-Liviu Simion
55889d1a8d dp: dptx: Set training pattern to 0 even if training fails. 
Required for DisplayPort compliance.

Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:33:05 +05:30
Andrei-Liviu Simion
a8370240c4 dp: tx: Removed duplicate horizontal and vertical total entries. 
Part of the video mode table.

Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:33:04 +05:30
Andrei-Liviu Simion
2d7f2abf8a dp: tx: Update to use new common video mode table and timing structure format. 
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:33:03 +05:30
Andrei-Liviu Simion
c9ef03a85f video_common: Added pixel frequency computation function. 
There are now two functions used for this purpose:
- u32 XVid_GetPixelClockHzByHVFr(u32 HTotal, u32 VTotal, u8 Fr);
- u32 XVid_GetPixelClockHzByVmId(XVid_VideoMode VmId);

Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:33:02 +05:30
Andrei-Liviu Simion
2414cc6832 video_common: Removed video mode without an entry. 
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:33:01 +05:30
Andrei-Liviu Simion
43e9211d20 video_common: edid: XVID_VM_NUM_SUPPORT->XVID_VM_NUM_SUPPORTED. 
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:33:00 +05:30
Andrei-Liviu Simion
9bdd128712 video_common: F1PVTotal->F1VTotal. 
Progressive video modes only have frame 0, no frame 1.

Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:32:59 +05:30
Andrei-Liviu Simion
88e805d29b video_common: Fixed video timing table. 
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:32:59 +05:30
Andrei-Liviu Simion
2bbd647caa video_common: Inverted polarity in video mode table. 
Now, 0 is negative polarity and 1 is positive polarity.

Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:32:58 +05:30
Andrei-Liviu Simion
75cca5dda4 video_common: Added function to check whether the video format is interlaced. 
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:32:57 +05:30
Andrei-Liviu Simion
4284fbe285 video_mode: Fixed video mode enumeration and added start/end of modes. 
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:32:56 +05:30
Andrei-Liviu Simion
740c3ea65e video_common: Removed pixel clock from table and structure. Now computing. 
Added a new function that computes the pixel clock frequency rather than having
it as part of the video mode table and structure. This saves some space.

Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:32:54 +05:30
Andrei-Liviu Simion
556a4ac05b video_common: Reduced size of XVid_VideoTiming structure. 
No member requires u32.

Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:32:53 +05:30
Andrei-Liviu Simion
306eb87e96 video_common: Reordered progressive-interlaced video modes. 
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:32:52 +05:30
Andrei-Liviu Simion
b3c3846913 video_common: Updated commenting. 
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:32:51 +05:30
Andrei-Liviu Simion
c04264fd84 video_common: Updated XVid_VideoStream structure definition. 
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:32:50 +05:30
Andrei-Liviu Simion
7aceaaf86f video_common: Fixed XVid_PixelsPerClock structure definition. 
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:32:50 +05:30
Andrei-Liviu Simion
714dddec01 video_common: XVid_DataWidth->XVid_ColorDepth. 
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:32:49 +05:30
Andrei-Liviu Simion
4030d1aef4 video_common: ResId->VmId. 
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:32:48 +05:30
Rohit Consul
dd2562b850 video_common: Added pixels per clock enumeration. 
Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:32:47 +05:30
Rohit Consul
eb14ad87ac video_common: Added video format enumeration type. 
Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:32:46 +05:30
Andrei-Liviu Simion
954a4047fd video_common: XVID_VM_UHD_60_P->XVID_VM_3840x2160_60_P. 
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:32:46 +05:30