/****************************************************************************** * * Copyright (C) 2013 - 2014 Xilinx, Inc. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * Use of the Software is limited solely to applications: * (a) running on a Xilinx device, or * (b) that interact with a Xilinx device through a bus or interconnect. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Except as contained in this notice, the name of the Xilinx shall not be used * in advertising or otherwise to promote the sale, use or other dealings in * this Software without prior written authorization from Xilinx. * ******************************************************************************/ /*****************************************************************************/ /** * * @file XLlFifo_polling_example.c * This file demonstrates how to use the Streaming fifo driver on the xilinx AXI * Streaming FIFO IP.The AXI4-Stream FIFO core allows memory mapped access to a * AXI-Stream interface. The core can be used to interface to AXI Streaming IPs * similar to the LogiCORE IP AXI Ethernet core, without having to use full DMA * solution. * * This is the polling example for the FIFO it assumes that at the * h/w level FIFO is connected in loopback.In these we write known amount of * data to the FIFO and Receive the data and compare with the data transmitted. * * Note: The TDEST Must be enabled in the H/W design inorder to * get correct RDR value. * *
 * MODIFICATION HISTORY:
 *
 * Ver   Who  Date     Changes
 * ----- ---- -------- -------------------------------------------------------
 * 3.00a adk 08/10/2013 initial release CR:727787
 *
 * 
* * *************************************************************************** */ /***************************** Include Files *********************************/ #include "xparameters.h" #include "xil_exception.h" #include "xstreamer.h" #include "xil_cache.h" #include "xllfifo.h" #include "xstatus.h" #ifdef XPAR_UARTNS550_0_BASEADDR #include "xuartns550_l.h" /* to use uartns550 */ #endif /**************************** Type Definitions *******************************/ /***************** Macros (Inline Functions) Definitions *********************/ #define FIFO_DEV_ID XPAR_AXI_FIFO_0_DEVICE_ID #define WORD_SIZE 4 /* Size of words in bytes */ #define MAX_PACKET_LEN 4 #define NO_OF_PACKETS 64 #define MAX_DATA_BUFFER_SIZE NO_OF_PACKETS*MAX_PACKET_LEN #undef DEBUG /************************** Function Prototypes ******************************/ #ifdef XPAR_UARTNS550_0_BASEADDR static void Uart550_Setup(void); #endif int XLlFifoPollingExample(XLlFifo *InstancePtr, u16 DeviceId); int TxSend(XLlFifo *InstancePtr, u32 *SourceAddr); int RxReceive(XLlFifo *InstancePtr, u32 *DestinationAddr); /************************** Variable Definitions *****************************/ /* * Device instance definitions */ XLlFifo FifoInstance; u32 SourceBuffer[MAX_DATA_BUFFER_SIZE * WORD_SIZE]; u32 DestinationBuffer[MAX_DATA_BUFFER_SIZE * WORD_SIZE]; /*****************************************************************************/ /** * * Main function * * This function is the main entry of the Axi FIFO Polling test. * * @param None * * @return - XST_SUCCESS if tests pass * - XST_FAILURE if fails. * * @note None * ******************************************************************************/ int main() { int Status; xil_printf("--- Entering main() ---\n\r"); Status = XLlFifoPollingExample(&FifoInstance, FIFO_DEV_ID); if (Status != XST_SUCCESS) { xil_printf("Axi Streaming FIFO Polling Example TestFailed\n\r"); xil_printf("--- Exiting main() ---\n\r"); return XST_FAILURE; } xil_printf("Axi Streaming FIFO Polling Example Test passed\n\r"); xil_printf("--- Exiting main() ---\n\r"); return XST_SUCCESS; } /*****************************************************************************/ /** * * This function demonstrates the usage AXI FIFO * It does the following: * - Set up the output terminal if UART16550 is in the hardware build * - Initialize the Axi FIFO Device. * - Transmit the data * - Receive the data from fifo * - Compare the data * - Return the result * * @param InstancePtr is a pointer to the instance of the * XLlFifo component. * @param DeviceId is Device ID of the Axi Fifo Deive instance, * typically XPAR__DEVICE_ID value from * xparameters.h. * * @return -XST_SUCCESS to indicate success * -XST_FAILURE to indicate failure * ******************************************************************************/ int XLlFifoPollingExample(XLlFifo *InstancePtr, u16 DeviceId) { XLlFifo_Config *Config; int Status; int i; int Error; Status = XST_SUCCESS; /* Initial setup for Uart16550 */ #ifdef XPAR_UARTNS550_0_BASEADDR Uart550_Setup(); #endif /* Initialize the Device Configuration Interface driver */ Config = XLlFfio_LookupConfig(DeviceId); if (!Config) { xil_printf("No config found for %d\r\n", DeviceId); return XST_FAILURE; } /* * This is where the virtual address would be used, this example * uses physical address. */ Status = XLlFifo_CfgInitialize(InstancePtr, Config, Config->BaseAddress); if (Status != XST_SUCCESS) { xil_printf("Initialization failed\n\r"); return Status; } /* Check for the Reset value */ Status = XLlFifo_Status(InstancePtr); XLlFifo_IntClear(InstancePtr,0xffffffff); Status = XLlFifo_Status(InstancePtr); if(Status != 0x0) { xil_printf("\n ERROR : Reset value of ISR0 : 0x%x\t" "Expected : 0x0\n\r", XLlFifo_Status(InstancePtr)); return XST_FAILURE; } /* Transmit the Data Stream */ Status = TxSend(InstancePtr, SourceBuffer); if (Status != XST_SUCCESS){ xil_printf("Transmisson of Data failed\n\r"); return XST_FAILURE; } /* Revceive the Data Stream */ Status = RxReceive(InstancePtr, DestinationBuffer); if (Status != XST_SUCCESS){ xil_printf("Receiving data failed"); return XST_FAILURE; } Error = 0; /* Compare the data send with the data received */ xil_printf(" Comparing data ...\n\r"); for( i=0 ; i