/******************************************************************* * * CAUTION: This file is automatically generated by HSM. * Version: * DO NOT EDIT. * * v (64-bit) SW Build (by ) on Copyright 1986-2014 Xilinx, Inc. All Rights Reserved. * * Description: Driver configuration * *******************************************************************/ #include "xparameters.h" #include "xrgb2ycrcb.h" /* * The configuration table for devices */ XRgb2YCrCb_Config XRgb2YCrCb_ConfigTable[] = { { XPAR_FMC_SENSOR_INPUT_V_RGB2YCRCB_1_DEVICE_ID, XPAR_FMC_SENSOR_INPUT_V_RGB2YCRCB_1_BASEADDR, XPAR_FMC_SENSOR_INPUT_V_RGB2YCRCB_1_HIGHADDR, XPAR_FMC_SENSOR_INPUT_V_RGB2YCRCB_1_S_AXIS_VIDEO_FORMAT, XPAR_FMC_SENSOR_INPUT_V_RGB2YCRCB_1_M_AXIS_VIDEO_FORMAT, XPAR_FMC_SENSOR_INPUT_V_RGB2YCRCB_1_HAS_DEBUG, XPAR_FMC_SENSOR_INPUT_V_RGB2YCRCB_1_HAS_INTC_IF, XPAR_FMC_SENSOR_INPUT_V_RGB2YCRCB_1_MAX_COLS, XPAR_FMC_SENSOR_INPUT_V_RGB2YCRCB_1_ACTIVE_COLS, XPAR_FMC_SENSOR_INPUT_V_RGB2YCRCB_1_ACTIVE_ROWS, XPAR_FMC_SENSOR_INPUT_V_RGB2YCRCB_1_HAS_CLIP, XPAR_FMC_SENSOR_INPUT_V_RGB2YCRCB_1_HAS_CLAMP, XPAR_FMC_SENSOR_INPUT_V_RGB2YCRCB_1_ACOEF, XPAR_FMC_SENSOR_INPUT_V_RGB2YCRCB_1_BCOEF, XPAR_FMC_SENSOR_INPUT_V_RGB2YCRCB_1_CCOEF, XPAR_FMC_SENSOR_INPUT_V_RGB2YCRCB_1_DCOEF, XPAR_FMC_SENSOR_INPUT_V_RGB2YCRCB_1_YOFFSET, XPAR_FMC_SENSOR_INPUT_V_RGB2YCRCB_1_CBOFFSET, XPAR_FMC_SENSOR_INPUT_V_RGB2YCRCB_1_CROFFSET, XPAR_FMC_SENSOR_INPUT_V_RGB2YCRCB_1_YMAX, XPAR_FMC_SENSOR_INPUT_V_RGB2YCRCB_1_YMIN, XPAR_FMC_SENSOR_INPUT_V_RGB2YCRCB_1_CBMAX, XPAR_FMC_SENSOR_INPUT_V_RGB2YCRCB_1_CBMIN, XPAR_FMC_SENSOR_INPUT_V_RGB2YCRCB_1_CRMAX, XPAR_FMC_SENSOR_INPUT_V_RGB2YCRCB_1_CRMIN, XPAR_FMC_SENSOR_INPUT_V_RGB2YCRCB_1_S_AXI_CLK_FREQ_HZ, XPAR_FMC_SENSOR_INPUT_V_RGB2YCRCB_1_STANDARD_SEL, XPAR_FMC_SENSOR_INPUT_V_RGB2YCRCB_1_OUTPUT_RANGE }, { XPAR_HDMI_OUTPUT_V_RGB2YCRCB_1_DEVICE_ID, XPAR_HDMI_OUTPUT_V_RGB2YCRCB_1_BASEADDR, XPAR_HDMI_OUTPUT_V_RGB2YCRCB_1_HIGHADDR, XPAR_HDMI_OUTPUT_V_RGB2YCRCB_1_S_AXIS_VIDEO_FORMAT, XPAR_HDMI_OUTPUT_V_RGB2YCRCB_1_M_AXIS_VIDEO_FORMAT, XPAR_HDMI_OUTPUT_V_RGB2YCRCB_1_HAS_DEBUG, XPAR_HDMI_OUTPUT_V_RGB2YCRCB_1_HAS_INTC_IF, XPAR_HDMI_OUTPUT_V_RGB2YCRCB_1_MAX_COLS, XPAR_HDMI_OUTPUT_V_RGB2YCRCB_1_ACTIVE_COLS, XPAR_HDMI_OUTPUT_V_RGB2YCRCB_1_ACTIVE_ROWS, XPAR_HDMI_OUTPUT_V_RGB2YCRCB_1_HAS_CLIP, XPAR_HDMI_OUTPUT_V_RGB2YCRCB_1_HAS_CLAMP, XPAR_HDMI_OUTPUT_V_RGB2YCRCB_1_ACOEF, XPAR_HDMI_OUTPUT_V_RGB2YCRCB_1_BCOEF, XPAR_HDMI_OUTPUT_V_RGB2YCRCB_1_CCOEF, XPAR_HDMI_OUTPUT_V_RGB2YCRCB_1_DCOEF, XPAR_HDMI_OUTPUT_V_RGB2YCRCB_1_YOFFSET, XPAR_HDMI_OUTPUT_V_RGB2YCRCB_1_CBOFFSET, XPAR_HDMI_OUTPUT_V_RGB2YCRCB_1_CROFFSET, XPAR_HDMI_OUTPUT_V_RGB2YCRCB_1_YMAX, XPAR_HDMI_OUTPUT_V_RGB2YCRCB_1_YMIN, XPAR_HDMI_OUTPUT_V_RGB2YCRCB_1_CBMAX, XPAR_HDMI_OUTPUT_V_RGB2YCRCB_1_CBMIN, XPAR_HDMI_OUTPUT_V_RGB2YCRCB_1_CRMAX, XPAR_HDMI_OUTPUT_V_RGB2YCRCB_1_CRMIN, XPAR_HDMI_OUTPUT_V_RGB2YCRCB_1_S_AXI_CLK_FREQ_HZ, XPAR_HDMI_OUTPUT_V_RGB2YCRCB_1_STANDARD_SEL, XPAR_HDMI_OUTPUT_V_RGB2YCRCB_1_OUTPUT_RANGE } };