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Xilinx Driver llfifo v4_0: llfifo v4_0
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<h1>llfifo v4_0</h1><p>The Xilinx Dual Channel Fifo driver component. This driver supports the Virtex-5(TM) and Virtex-4(TM) XPS_ll_Fifo and the AxiFifo.</p>
<p>For a full description of the bridge features, please see the HW spec. This driver supports the following features:</p>
<ul>
<li>Memory mapped access to host interface registers</li>
<li>API for polled frame transfers</li>
<li>API for interrupt driven frame transfers</li>
<li>Virtual memory support</li>
<li>Full duplex operation</li>
</ul>
<h2>Driver Description</h2>
<p>This driver enables higher layer software to access the XPS_llFifo core using any alignment in the data buffers.</p>
<p>This driver supports send and receive channels in the same instance structure in the same fashion as the hardware core.</p>
<h2>Initialization</h2>
<p>An instance of this driver is initialized using a call to Initialize().</p>
<h2>Usage</h2>
<p>It is fairly simple to use the API provided by this FIFO driver. The only somewhat tricky part is that the calling code must correctly call a couple routines in the right sequence for receive and transmit.</p>
<p>This sequence is described here. Check the routine functional descriptions for information on how to use a specific API routine.</p>
<h3>Receive</h3>
<p>A frame is received by using the following sequence:<br/>
1) call <a class="el" href="xllfifo_8h.html#a12da547aa1c9a85e2b0b151f438ff9d5">XLlFifo_RxOccupancy()</a> to check the occupancy count<br/>
2) call <a class="el" href="xllfifo_8h.html#a53af32ae6901462cc8d6fb9adc04655e">XLlFifo_RxGetLen()</a> to get the length of the next incoming frame<br/>
3) call <a class="el" href="xllfifo_8h.html#aadc3685592b060c0d864850e86be5c03">XLlFifo_Read()</a> one or more times to read the number of bytes reported by <a class="el" href="xllfifo_8h.html#a53af32ae6901462cc8d6fb9adc04655e">XLlFifo_RxGetLen()</a>.<br/>
</p>
<p>For example: </p>
<pre>
while (<a class="el" href="xllfifo_8h.html#a12da547aa1c9a85e2b0b151f438ff9d5">XLlFifo_RxOccupancy(&RxInstance)</a>) {
frame_len = <a class="el" href="xllfifo_8h.html#a53af32ae6901462cc8d6fb9adc04655e">XLlFifo_RxGetLen(&RxInstance)</a>;
while (frame_len) {
unsigned bytes = min(sizeof(buffer), frame_len);
<a class="el" href="xllfifo_8h.html#aadc3685592b060c0d864850e86be5c03">XLlFifo_Read(&RxInstance, buffer, bytes)</a>;
// ********
// do something with buffer here
// ********
frame_len -= bytes;
}
}
</pre><p>This FIFO hardware core does <b>not</b> support a sequence where the calling code calls RxGetLen() twice in a row and then receive the data for two frames. Each frame must be read in by calling RxGetLen() just prior to reading the data.</p>
<h3>Transmit</h3>
<p>A frame is transmittted by using the following sequence:<br/>
1) call <a class="el" href="xllfifo_8h.html#a1fa93f486abaaf35c7d599a8cd91b295">XLlFifo_Write()</a> one or more times to write all the of bytes in the next frame.<br/>
2) call <a class="el" href="xllfifo_8h.html#acd09ed5189e0b85994901102655964f7">XLlFifo_TxSetLen()</a> to begin the transmission of frame just written.<br/>
</p>
<p>For example: </p>
<pre>
frame_left = frame_len;
while (frame_left) {
unsigned bytes = min(sizeof(buffer), frame_left);
<a class="el" href="xllfifo_8h.html#a1fa93f486abaaf35c7d599a8cd91b295">XLlFifo_Write(&TxInstance, buffer, bytes)</a>;
// ********
// do something here to refill buffer
// ********
frame_left -= bytes;
}
<a class="el" href="xllfifo_8h.html#acd09ed5189e0b85994901102655964f7">XLlFifo_TxSetLen(&RxInstance, frame_len)</a>;
</pre><p>This FIFO hardware core does <b>not</b> support a sequence where the calling code writes the data for two frames and then calls TxSetLen() twice in a row. Each frame must be written by writting the data for one frame and then calling TxSetLen().</p>
<h2>Interrupts</h2>
<p>This driver does not handle interrupts from the FIFO hardware. The software layer above may make use of the interrupts by setting up its own handlers for the interrupts.</p>
<pre>
MODIFICATION HISTORY:</pre><pre> Ver Who Date Changes
----- ---- -------- -------------------------------------------------------
1.00a jvb 10/12/06 First release
1.01a sdm 08/22/08 Removed support for static interrupt handlers from the
MDD file
1.02a jz 12/04/09 Hal phase 1 support
2.01a asa 09/17/10 Added code for resetting Local Link/AXI Streaming
interface for CR574868
2.02a asa 12/27/11 Changed the function XStrm_Read in xtreamer.c to reset
HeadIndex to zero when all bytes have been read.
Changed the macro XStrm_IsRxInternalEmpty in file
xtreamer.h to use FrmByteCnt instead of HeadIndex.
When FrmByteCnt is zero, this means all internal buffers
in streamer are empty. Earlier implementation using
HeadIndex was not very clear and could give improper
results for some cases.
Changed the macro XLlFifo_IsRxEmpty in file <a class="el" href="xllfifo_8h.html">xllfifo.h</a>
These changes are done to fix the CR 604650.
2.03a asa 14/08/12 Added XLLF_TDR_OFFSET, XLLF_RDR_OFFSET
defines for the new registers, and XLLF_INT_TFPF_MASK,
XLLF_INT_TFPE_MASK, XLLF_INT_RFPF_MASK and
XLLF_INT_RFPE_MASK for the new version of the
AXI4-Stream FIFO core (v2.01a and later)</pre><pre> 3.00a adk 08/10/13 Added support for AXI4 Datainterface.Changes are
In Xllfifo.c file XLlFifo_RxGetWord,XLlFifo_TxPutword.
In XLlfifo.h file updated XLlfifo structure for
Axi4BaseAddress and for Datainterface type provided
polling and interrupt examples. XLlfifo_IsRxDone Macro
Is added in the XLlfifo.h file for polledmode exmaple.
Added Static initialzation for the driver.
XLlFifo_Initialize is still used to make the driver
backward compatible.
4.0 adk 19/12/13 Updated as per the New Tcl API's</pre><pre> </pre> </div>
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