resolve some merge conflicts

This commit is contained in:
Stefan Lankes 2011-04-14 08:58:07 +02:00
parent b5908af744
commit 02cf1d87f2
2 changed files with 12 additions and 20 deletions

View file

@ -38,12 +38,16 @@ extern "C" {
#define APIC_EOI 0x00B0
/// Spurious Interrupt Vector Register
#define APIC_SVR 0x00F0
/// Error Status Register
#define APIC_ESR 0x0280
/// Interrupt Command Register [bits 0-31]
#define APIC_ICR1 0x0300
/// Interrupt Command Register [bits 32-63]
#define APIC_ICR2 0x0310
/// LVT Timer Register
#define APIC_LVT_T 0x0320
/// LVT Thermal Sensor Register
#define APIC_LVT_TSR 0x0330
/// LVT Performance Monitoring Counters Register
#define APIC_LVT_PMC 0x0340
/// LVT LINT0 Register

View file

@ -128,19 +128,6 @@ inline static void cpuid(uint32_t code, uint32_t* a, uint32_t* b, uint32_t* c, u
asm volatile ("cpuid" : "=a"(*a), "=b"(*b), "=c"(*c), "=d"(*d) : "0"(code));
}
<<<<<<< HEAD
/** @brief Flush the pipeline
*
* The cpuid-instruction is used to flush the pipeline.
*/
inline static void flush_pipeline(void) {
uint32_t low = 0;
uint32_t high = 0;
uint32_t code = 0;
asm volatile ("cpuid" : "=a"(low), "=d"(high) : "0"(code) : "%ebx", "%ecx");
}
/** @brief Read MSR
*
* The asm instruction rdmsr which stands for "Read from model specific register"
@ -149,8 +136,6 @@ inline static void flush_pipeline(void) {
* @param msr The parameter which rdmsr assumes in ECX
* @return The value rdmsr put into EDX:EAX
*/
=======
>>>>>>> a9ce93d119c2709a766c19b9cfa32a0b594b1100
inline static uint64_t rdmsr(uint32_t msr) {
uint32_t low, high;
@ -200,22 +185,25 @@ static inline void write_cr3(uint32_t val) {
asm volatile("mov %0, %%cr3" : : "r"(val));
}
<<<<<<< HEAD
/** @brief Flush a specific page entry in TLB
* @param addr The (virtual) address of the page to flush
/** @brief Read cr4 register
* @return cr4's value
*/
=======
static inline uint32_t read_cr4(void) {
uint32_t val;
asm volatile("mov %%cr4, %0" : "=r"(val));
return val;
}
/** @brief Write a value into cr4 register
* @param val The value you want to write into cr4
*/
static inline void write_cr4(uint32_t val) {
asm volatile("mov %0, %%cr4" : : "r"(val));
}
>>>>>>> a9ce93d119c2709a766c19b9cfa32a0b594b1100
/** @brief Flush a specific page entry in TLB
* @param addr The (virtual) address of the page to flush
*/
static inline void tlb_flush_one_page(uint32_t addr)
{
asm volatile("invlpg (%0)" : : "r"(addr) : "memory");