enable full (64bit) APIC support
- no SMP support
This commit is contained in:
Stefan Lankes
parent
44ea32c241
commit
08bcc19626
2 changed files with 93 additions and 16 deletions
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@ -58,7 +58,7 @@ typedef struct {
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static const apic_processor_entry_t* apic_processors[MAX_CORES] = {[0 ... MAX_CORES-1] = NULL};
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static uint32_t boot_processor = MAX_CORES;
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static apic_mp_t* apic_mp = NULL;
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apic_mp_t* apic_mp __attribute__ ((section (".data"))) = NULL;
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static apic_config_table_t* apic_config = NULL;
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static size_t lapic = 0;
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static volatile ioapic_t* ioapic = NULL;
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@ -82,12 +82,15 @@ static inline uint32_t lapic_read(uint32_t addr)
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static inline void lapic_write(uint32_t addr, uint32_t value)
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{
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#ifdef CONFIG_X86_32
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/*
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* to avoid a pentium bug, we have to read a apic register
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* before we write a value to this register
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*/
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asm volatile ("movl (%%eax), %%edx; movl %%ebx, (%%eax)" :: "a"(lapic+addr), "b"(value) : "%edx");
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//*((volatile uint32_t*) (lapic+addr)) = value;
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#else
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*((volatile uint32_t*) (lapic+addr)) = value;
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#endif
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}
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static inline uint32_t ioapic_read(uint32_t reg)
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@ -457,6 +460,12 @@ int map_apic(void)
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lapic = map_region(0 /*lapic*/, lapic, 1, MAP_KERNEL_SPACE|MAP_NO_CACHE);
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if (BUILTIN_EXPECT(!lapic, 0))
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return -ENXIO;
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#else
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if (lapic != (size_t)&kernel_start - 0x1000) {
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lapic = map_region(0 /*lapic*/, lapic, 1, MAP_KERNEL_SPACE|MAP_NO_CACHE);
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if (BUILTIN_EXPECT(!lapic, 0))
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return -ENXIO;
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}
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#endif
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kprintf("Mapped LAPIC at 0x%x\n", lapic);
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@ -469,7 +478,7 @@ int map_apic(void)
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// map all processor entries
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for(i=0; i<MAX_CORES; i++) {
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if (apic_processors[i] && (old != (((size_t)apic_processors[i]) & 0xFFFFF000)))
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old = map_region(((size_t) apic_processors[i]) & 0xFFFFF000, ((size_t) apic_processors[i]) & 0xFFFFF000, 1, MAP_KERNEL_SPACE|MAP_NO_CACHE);
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old = map_region(((size_t) apic_processors[i]) & 0xFFFFF000, ((size_t) apic_processors[i]) & 0xFFFFF000, 1, MAP_REMAP|MAP_KERNEL_SPACE|MAP_NO_CACHE);
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}
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}
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@ -563,8 +572,10 @@ int apic_calibration(void)
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ioapic_inton(i, apic_processors[boot_processor]->id);
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}
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initialized = 1;
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#ifdef CONFIG_X86_32
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#if MAX_CORES > 1
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smp_init();
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#endif
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#endif
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irq_nested_enable(flags);
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@ -681,8 +692,8 @@ found_mp:
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apic_io_entry_t* io_entry = (apic_io_entry_t*) addr;
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ioapic = (ioapic_t*) io_entry->addr;
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addr += 8;
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kprintf("Found IOAPIC at 0x%x (ver. 0x%x)\n", ioapic,
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ioapic_read(IOAPIC_REG_VER));
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//kprintf("Found IOAPIC at 0x%x (ver. 0x%x)\n", ioapic, ioapic_read(IOAPIC_REG_VER));
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kprintf("Found IOAPIC at 0x%x\n", ioapic);
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} else if (*((uint8_t*) addr) == 3) { // IO_INT
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apic_ioirq_entry_t* extint = (apic_ioirq_entry_t*) addr;
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if (extint->src_bus == isa_bus) {
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@ -701,6 +712,7 @@ found_mp:
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ncores = count;
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check_lapic:
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#ifdef CONFIG_X86_32
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if (apic_config) {
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lapic = apic_config->lapic;
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} else {
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@ -708,13 +720,16 @@ check_lapic:
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cpuid(0x1, &dummy, &dummy, &dummy, &edx);
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if (edx & (1 << 9))
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#ifdef CONFIG_X86_32
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lapic = 0xFEE00000;
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#else
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// On a x64 system, we already map the lapic below the kernel
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lapic = (size_t)&kernel_start - 0x1000;
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#endif
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}
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#else
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if (apic_config->lapic == 0xFEE00000) {
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// On a x64 system, we already map the lapic below the kernel
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lapic = (size_t)&kernel_start - 0x1000;
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} else {
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lapic = apic_config->lapic;
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}
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#endif
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if (!lapic)
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goto out;
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@ -24,6 +24,11 @@
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%include "config.inc"
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[BITS 32]
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extern kernel_start ; defined in linker script
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extern kernel_end
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extern apic_mp
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; We use a special name to map this section at the begin of our kernel
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; => Multiboot needs its magic number at the begin of the kernel
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SECTION .mboot
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@ -90,6 +95,36 @@ boot_pd times 512 DQ 0
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boot_pt times (NOPTS*512) DQ 0
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SECTION .text
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search_apic:
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push ebp
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mov ebp, esp
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push ecx
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xor eax, eax
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mov ecx, [ebp+8]
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L1:
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cmp [ecx], DWORD 0x5f504d5f ; MP_FLT_SIGNATURE
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jne L2
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mov al, BYTE [ecx+9]
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cmp eax, 4
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ja L2
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mov al, BYTE [ecx+11]
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cmp eax, 0
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jne L2
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mov eax, ecx
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jmp L3
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L2:
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add ecx, 4
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cmp ecx, [ebp+12]
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jb L1
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xor eax, eax
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L3:
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pop ecx
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pop ebp
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ret
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ALIGN 4
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stublet:
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mov esp, startup_stack-4
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@ -180,8 +215,7 @@ L0:
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cmp edx, 0
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je no_lapic
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; map lapic at 0xFEE00000 below the kernel
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mov edi, kernel_start
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sub edi, 0x1000
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mov edi, kernel_start - 0x1000
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shr edi, 9 ; (edi >> 12) * 8
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add edi, boot_pt
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mov ebx, 0xFEE00000
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@ -193,8 +227,36 @@ no_lapic:
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pop ebx
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pop eax
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extern kernel_start ; defined in linker script
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extern kernel_end
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; search APIC
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push DWORD 0x100000
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push DWORD 0xF0000
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call search_apic
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add esp, 8
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cmp eax, 0
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jne La
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push DWORD 0xA0000
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push DWORD 0x9F000
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call search_apic
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add esp, 8
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cmp eax, 0
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je Lb
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La:
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; map MP Floating Pointer Structure
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mov DWORD [apic_mp], eax
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mov edi, eax
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and edi, 0xFFFFF000
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shr edi, 9 ; (edi >> 12) * 8
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add edi, boot_pt
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mov ebx, eax
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and ebx, 0xFFFFF000
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or ebx, 0x00000013
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mov DWORD [edi], ebx
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Lb:
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mov edi, kernel_start
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shr edi, 9 ; (kernel_start >> 12) * 8
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add edi, boot_pt
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@ -205,11 +267,11 @@ no_lapic:
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shr ecx, 12
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inc ecx
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L1:
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Lc:
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mov DWORD [edi], ebx ; Set the double word at the destination index to the B-register.
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add edi, 8
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add ebx, 0x1000
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loop L1
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loop Lc
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; we need to enable PAE modus
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mov eax, cr4
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