simplify the APIC and GDT code
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f5f6163589
commit
1e275732c5
5 changed files with 13 additions and 21 deletions
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@ -75,12 +75,11 @@ int create_default_frame(task_t* task, entry_point_t ep, void* arg);
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/** @brief Register a task's TSS at GDT
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*
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* @param task Pointer to task structure
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* @return
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* - 0 on success
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* - -EINVAL (-22) on failure
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*/
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int register_task(task_t* task);
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int register_task(void);
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/** @brief Jump back to user code
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*
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@ -289,7 +289,7 @@ extern int smp_main(void);
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void smp_start(uint32_t id)
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{
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uint32_t i;
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size_t i;
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atomic_int32_inc(&cpu_online);
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@ -309,7 +309,7 @@ void smp_start(uint32_t id)
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idt_install();
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/* enable paging */
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write_cr3((uint32_t)get_boot_pgd());
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write_cr3((size_t)get_boot_pgd());
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i = read_cr0();
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i = i | (1 << 31);
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write_cr0(i);
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@ -320,9 +320,9 @@ void smp_start(uint32_t id)
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/*
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* we turned on paging
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* => now, we are able to register our task for Task State Switching
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* => now, we are able to register our task
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*/
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register_task(per_core(current_task));
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register_task();
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// enable additional cpu features
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cpu_detection();
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@ -577,16 +577,14 @@ static int apic_probe(void)
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uint32_t i, count;
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int isa_bus = -1;
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#if 1
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#ifdef CONFIG_X86_32
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#if 1
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apic_mp = search_apic(0xF0000, 0x100000);
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if (apic_mp)
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goto found_mp;
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apic_mp = search_apic(0x9F000, 0xA0000);
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if (apic_mp)
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goto found_mp;
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#elif defined(CONFIG_X86_64)
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#endif
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#else
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// searching MP signature in the reserved memory areas
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if (mb_info && (mb_info->flags & MULTIBOOT_INFO_MEM_MAP)) {
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@ -619,6 +617,7 @@ static int apic_probe(void)
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}
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}
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#endif
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#endif
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found_mp:
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if (!apic_mp)
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goto no_mp;
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@ -39,12 +39,6 @@ static gdt_entry_t gdt[GDT_ENTRIES] = {[0 ... GDT_ENTRIES-1] = {0, 0, 0, 0, 0,
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*/
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extern void gdt_flush(void);
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/*
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* This is defined in entry.asm. We use this for a
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* hardware-based task switch.
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*/
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extern void tss_switch(uint32_t id);
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size_t* get_current_stack(void)
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{
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task_t* curr_task = per_core(current_task);
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@ -61,12 +55,12 @@ size_t get_stack(uint32_t id)
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return (size_t) kstacks[id] + KERNEL_STACK_SIZE - sizeof(size_t);
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}
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int register_task(task_t* task)
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int register_task(void)
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{
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uint16_t sel;
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sel = (CORE_ID+5) << 3;
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asm volatile ("mov %0, %%ax; ltr %%ax" : : "ir"(sel) : "%eax");
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asm volatile ("ltr %%ax" : : "a"(sel));
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return 0;
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}
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@ -820,9 +820,9 @@ int arch_paging_init(void)
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/*
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* we turned on paging
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* => now, we are able to register our task for Task State Switching
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* => now, we are able to register our task
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*/
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register_task(per_core(current_task));
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register_task();
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// APIC registers into the kernel address space
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map_apic();
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@ -635,9 +635,9 @@ int arch_paging_init(void)
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/*
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* we turned on paging
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* => now, we are able to register our task for Task State Switching
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* => now, we are able to register our task
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*/
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register_task(per_core(current_task));
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register_task();
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// APIC registers into the kernel address space
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map_apic();
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