diff --git a/arch/x86/scc/RCCE_admin.c b/arch/x86/scc/RCCE_admin.c
index 34f0e677..a9a624ae 100644
--- a/arch/x86/scc/RCCE_admin.c
+++ b/arch/x86/scc/RCCE_admin.c
@@ -337,7 +337,7 @@ int RCCE_init(
 
   RCCE_shmalloc_init(RC_SHM_BUFFER_START()+RCCE_SHM_BUFFER_offset ,RCCE_SHM_SIZE_MAX);
 #ifdef SHMDBG
-  printf("\n%d:%s:%d: RCCE_SHM_BUFFER_offset, RCCE_SHM_SIZE_MAX: % x %x\n", RCCE_IAM, 
+  kprintf("\n%d:%s:%d: RCCE_SHM_BUFFER_offset, RCCE_SHM_SIZE_MAX: % x %x\n", RCCE_IAM, 
     __FILE__,__LINE__,RCCE_SHM_BUFFER_offset ,RCCE_SHM_SIZE_MAX);
 #endif
 #else
@@ -439,8 +439,10 @@ int RCCE_num_ues(void) {return(RCCE_NP);}
 //--------------------------------------------------------------------------------------
 void writeLUT(unsigned int lutSlot, unsigned int value) {
 
-int PAGE_SIZE, NCMDeviceFD;
+#ifndef MS_BAREMETAL
+int page_size, NCMDeviceFD;
 // NCMDeviceFD is the file descriptor for non-cacheable memory (e.g. config regs).
+#endif
 
 unsigned int result;
 
@@ -453,6 +455,7 @@ unsigned int myCoreID, alignedAddr, pageOffset, ConfigAddr;
    else
       ConfigAddr = CRB_OWN+LUT0 + (lutSlot*0x08);
 
+#ifndef MS_BAREMETAL
    PAGE_SIZE  = getpagesize();
 
    if ((NCMDeviceFD=open("/dev/rckncm", O_RDWR|O_SYNC))<0) {
@@ -471,16 +474,19 @@ unsigned int myCoreID, alignedAddr, pageOffset, ConfigAddr;
 
    *(int*)(MappedAddr+pageOffset) = value;
    munmap((void*)MappedAddr, PAGE_SIZE);
-
+#else
+   *(int*)(ConfigAddr) = value;
+#endif
 }
 
 //--------------------------------------------------------------------------------------
 // FUNCTION: readLUT
 //--------------------------------------------------------------------------------------
 unsigned int readLUT(unsigned int lutSlot) {
-
+#ifndef MS_BAREMETAL
 int PAGE_SIZE, NCMDeviceFD;
 // NCMDeviceFD is the file descriptor for non-cacheable memory (e.g. config regs).
+#endif
 
 unsigned int result;
 t_vcharp     MappedAddr;
@@ -492,6 +498,7 @@ unsigned int myCoreID, alignedAddr, pageOffset, ConfigAddr;
    else
       ConfigAddr = CRB_OWN+LUT0 + (lutSlot*0x08);
 
+#ifndef MS_BAREMETAL
    PAGE_SIZE  = getpagesize();
 
    if ((NCMDeviceFD=open("/dev/rckncm", O_RDWR|O_SYNC))<0) {
@@ -510,6 +517,9 @@ unsigned int myCoreID, alignedAddr, pageOffset, ConfigAddr;
 
   result = *(unsigned int*)(MappedAddr+pageOffset);
   munmap((void*)MappedAddr, PAGE_SIZE);
+#else
+  result = *(unsigned int*)(ConfigAddr);
+#endif
 
   return result;
 }
@@ -519,14 +529,16 @@ unsigned int myCoreID, alignedAddr, pageOffset, ConfigAddr;
 //--------------------------------------------------------------------------------------
 unsigned int getCOREID() {
 
+#ifndef MS_BAREMETAL
 int PAGE_SIZE, NCMDeviceFD;
 // NCMDeviceFD is the file descriptor for non-cacheable memory (e.g. config regs).
-
+#endif
 t_vcharp     MappedAddr;
 unsigned int coreID,result,  alignedAddr, pageOffset, ConfigAddr, coreID_mask=0x00000007;
 
 
    ConfigAddr = CRB_OWN+MYTILEID;
+#ifndef MS_BAREMETAL
    PAGE_SIZE  = getpagesize();
 
    if ((NCMDeviceFD=open("/dev/rckncm", O_RDWR|O_SYNC))<0) {
@@ -545,6 +557,9 @@ unsigned int coreID,result,  alignedAddr, pageOffset, ConfigAddr, coreID_mask=0x
 
   result = *(unsigned int*)(MappedAddr+pageOffset);
   munmap((void*)MappedAddr, PAGE_SIZE);
+#else
+  result = *(unsigned int*)(ConfigAddr);
+#endif
 
   coreID =  result & coreID_mask;
   return coreID;