First steps to realize Inter-Core-Communication via RCCE

arch/x86/include/asm/icc.h

@@ -0,0 +1,60 @@
+/* 
+ * Copyright 2011 Stefan Lankes, Chair for Operating Systems,
+ *                               RWTH Aachen University
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * This file is part of MetalSVM.
+ */
+
+/*
+ * Function and prototypes for MetalSVM's inter core communication
+ */
+
+#ifndef __ARCH_ICC_H__
+#define __ARCH_ICC_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef CONFIG_ROCKCREEK
+
+typedef struct {
+	uint32_t addr;  // address of the initrd
+	uint32_t size;  // size of the initrd
+	int32_t  argc;  // number of RCCE arguments
+	char**   argv;  // RCCE arguments
+} bootinfo_t;
+
+extern bootinfo_t* bootinfo;
+
+typedef struct {
+	uint8_t type;
+	uint8_t tag;
+	uint32_t length;
+} icc_header_t;
+
+#define ICC_TYPE_IP	(1 << 0)
+#define ICC_TYPE_SVM	(1 << 1)
+
+int icc_init(void);
+void check_icc(void);
+
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

arch/x86/include/asm/processor.h

@@ -39,19 +39,6 @@
 extern "C" {
 #endif
 
-#ifdef CONFIG_ROCKCREEK
-typedef struct {
-	uint32_t addr;	// address of the initrd
-	uint32_t size;	// size of the initrd
-	int32_t  argc;	// number of RCCE arguments
-	char**   argv;	// RCCE arguments
-} bootinfo_t;
-
-extern bootinfo_t* bootinfo;
-
-int scc_init(void);
-#endif
-
 /** @brief Read out time stamp counter
  *
  * The rdtsc asm command puts a 64 bit time stamp value

arch/x86/mm/page.c

@@ -33,6 +33,7 @@
 #ifdef CONFIG_ROCKCREEK
 #include <asm/RCCE_lib.h>
 #include <asm/SCC_API.h>
+#include <asm/icc.h>
 #endif
 
 /*

arch/x86/scc/Makefile

@@ -1,4 +1,4 @@
-C_source := scc_init.c SCC_API.c iRCCE_admin.c iRCCE_send.c iRCCE_isend.c iRCCE_irecv.c iRCCE_recv.c iRCCE_get.c iRCCE_put.c iRCCE_synch.c RCCE_malloc.c RCCE_shmalloc.c RCCE_debug.c RCCE_qsort.c RCCE_DCMflush.c RCCE_send.c RCCE_recv.c RCCE_flags.c RCCE_comm.c RCCE_put.c RCCE_get.c RCCE_synch.c RCCE_bcast.c RCCE_admin.c # RCCE_power_management.c
+C_source := icc.c SCC_API.c iRCCE_admin.c iRCCE_send.c iRCCE_isend.c iRCCE_irecv.c iRCCE_recv.c iRCCE_get.c iRCCE_put.c iRCCE_synch.c RCCE_malloc.c RCCE_shmalloc.c RCCE_debug.c RCCE_qsort.c RCCE_DCMflush.c RCCE_send.c RCCE_recv.c RCCE_flags.c RCCE_comm.c RCCE_put.c RCCE_get.c RCCE_synch.c RCCE_bcast.c RCCE_admin.c # RCCE_power_management.c
 ASM_source := 
 MODULE := arch_x86_scc
 

arch/x86/scc/icc.c

@@ -17,13 +17,14 @@
 #include <metalsvm/processor.h>
 #include <metalsvm/errno.h>
 #include <asm/io.h>
+#ifdef CONFIG_ROCKCREEK
 #include <asm/RCCE.h>
 #include <asm/iRCCE.h>
 #include <asm/SCC_API.h>
-
-#ifdef CONFIG_ROCKCREEK
+#include <asm/icc.h>
 
 bootinfo_t* bootinfo = (bootinfo_t*) SCC_BOOTINFO;
+static int num_ues, my_ue;
 
 /* PSE bit for Pentium+ equals MPE (message buffer enable) flag in RCK! So, use it to create _PAGE_MPB symbol... */
 #define _CR4_MPE 0x00000800
@@ -67,10 +68,9 @@ static int scc_clear(void)
 	return 0;
 }
 
-int scc_init(void)
+int icc_init(void)
 {
-	int num_ranks;
-	int i, my_rank;
+	int i;
 	uint64_t start, end, ticks, freq = 533;
 	uint32_t cr4, msg = 0;
 
@@ -109,9 +109,9 @@ int scc_init(void)
 	// enable additional outputs	
 	RCCE_debug_set(RCCE_DEBUG_ALL);
 
-	my_rank   = RCCE_ue();
-	num_ranks = RCCE_num_ues();
-	kprintf("Got rank %d of %d ranks\n", my_rank, num_ranks);
+	my_ue   = RCCE_ue();
+	num_ues = RCCE_num_ues();
+	kprintf("Got rank %d of %d ranks\n", my_ue, num_ues);
 
 	i = ReadConfigReg(CRB_OWN+GLCFG0);
 	kprintf("glcfg0 0x%x\n", i);
@@ -119,7 +119,7 @@ int scc_init(void)
 	RCCE_barrier(&RCCE_COMM_WORLD);
 
 	kputs("RCCE test...\t");
-	if (my_rank == 0)
+	if (my_ue == 0)
 		msg = 0x4711;
 	if (RCCE_bcast((char*) &msg, sizeof(msg), 0, RCCE_COMM_WORLD) == RCCE_SUCCESS)
 		kprintf("successfull! (0x%x)\n", msg);
@@ -131,4 +131,8 @@ int scc_init(void)
 	return 0;
 }
 
+void check_icc(void)
+{
+}
+
 #endif

fs/initrd.c

@@ -24,6 +24,9 @@
 #include <metalsvm/errno.h>
 #include <asm/multiboot.h>
 #include <asm/processor.h>
+#ifdef CONFIG_ROCKCREEK
+#include <asm/icc.h>
+#endif
 
 static vfs_node_t initrd_root;
 

include/metalsvm/tasks.h

@@ -32,6 +32,10 @@
 #include <metalsvm/stddef.h>
 #include <metalsvm/tasks_types.h>
 #include <asm/tasks.h>
+#include <asm/irqflags.h>
+#ifdef CONFIG_ROCKCREEK
+#include <asm/icc.h>
+#endif
 
 #ifdef __cplusplus
 extern "C" {
@@ -134,6 +138,17 @@ int sys_fork(void);
  */
 int sys_execve(const char* fname, char** argv, char** env);
 
+static inline void check_workqueues(void)
+{
+	uint32_t flags = irq_nested_disable();
+
+#ifdef CONFIG_ROCKCREEK
+	check_icc();
+#endif
+
+	irq_nested_enable(flags);
+}
+
 #ifdef __cplusplus
 }
 #endif

kernel/main.c

@@ -30,6 +30,9 @@
 #include <asm/irq.h>
 #include <asm/irqflags.h>
 #include <asm/kb.h>
+#ifdef CONFIG_ROCKCREEK
+#include <asm/icc.h>
+#endif
 
 extern int test_init(void);
 
@@ -90,7 +93,7 @@ int main(void)
 	multitasking_init();
 	mmu_init();
 #ifdef CONFIG_ROCKCREEK
-	scc_init();
+	icc_init();
 #endif
    	initrd_init();
 

kernel/syscall.c

@@ -70,6 +70,8 @@ int syscall_handler(uint32_t sys_nr, ...)
 	int ret = -EINVAL;
 	va_list vl;
 
+	check_workqueues();
+
 	va_start(vl, sys_nr);
 
 	switch(sys_nr) 

kernel/tasks.c

@@ -710,6 +710,8 @@ void scheduler(void)
 	unsigned int i;
 	unsigned int new_id;
 
+	check_workqueues();
+
 #if MAX_CORES > 1
 	spinlock_irqsave_lock(&table_lock);
 #endif

mm/memory.c

@@ -29,6 +29,9 @@
 #ifdef CONFIG_MULTIBOOT
 #include <asm/multiboot.h>
 #endif
+#ifdef CONFIG_ROCKCREEK
+#include <asm/icc.h>
+#endif
 
 /* 
  * 0 => free