diff --git a/arch/x86/kernel/irq.c b/arch/x86/kernel/irq.c
index 4844eb6e..a624fd5e 100644
--- a/arch/x86/kernel/irq.c
+++ b/arch/x86/kernel/irq.c
@@ -185,6 +185,9 @@ int irq_init(void)
  * acknowledge the interrupt at BOTH controllers, otherwise, you
  * only send an EOI command to the first controller. If you don't send
  * an EOI, you won't raise any more IRQs 
+ * 
+ * Note: If we enabled the APIC, we also disabled the PIC. Afterwards,
+ * we got no interrupts between 0 and 15.
  */
 void irq_handler(struct state *s)
 {
@@ -201,7 +204,7 @@ void irq_handler(struct state *s)
 		handler(s);
 
 	/* 
-	 * If the IDT entry that was invoked was greater than 48,
+	 * If the IDT entry that was invoked was greater-than-or-equal to 48,
 	 * then we use the APIC
 	 */
 	if (s->int_no >= 48) {
@@ -210,16 +213,16 @@ void irq_handler(struct state *s)
 	}
 
 	/* 
-	 * If the IDT entry that was invoked was greater than 40 
+	 * If the IDT entry that was invoked was greater-than-or-equal to 40 
 	 * and lower than 48 (meaning IRQ8 - 15), then we need to 
-	 * send an EOI to the slave controller (PIC)
+	 * send an EOI to the slave controller of the PIC
 	 */
 	if (s->int_no >= 40)
 		outportb(0xA0, 0x20);
 
 	/* 
-	 * In either case, we need to send an EOI to the master (PIC)
-	 * interrupt controller too 
+	 * In either case, we need to send an EOI to the master
+	 * interrupt controller of the PIC, too 
 	 */
 	outportb(0x20, 0x20);
 }