From 403c529e8ba9a3d9251fb662c7be67c6085ffb2f Mon Sep 17 00:00:00 2001
From: Steffen Vogel <steffen.vogel@rwth-aachen.de>
Date: Wed, 16 Oct 2013 17:42:59 +0200
Subject: [PATCH] fixed copy&paste bug and moved cpu initialization in
 cpu_init()

---
 arch/x86/kernel/apic.c      |  6 +++--
 arch/x86/kernel/entry64.asm | 45 ++++++++++---------------------------
 2 files changed, 16 insertions(+), 35 deletions(-)

diff --git a/arch/x86/kernel/apic.c b/arch/x86/kernel/apic.c
index 809130cc..2d8d6da2 100644
--- a/arch/x86/kernel/apic.c
+++ b/arch/x86/kernel/apic.c
@@ -387,12 +387,14 @@ void smp_start(uint32_t id)
 
 	kprintf("Application processor %d is entering its idle task\n", apic_cpu_id());
 
-	// initialize default cpu features
+#ifdef CONFIG_X86_32
+	// initialization for x86_64 is done in smp_entry()
 	cpu_init();
+#endif
 
 	// use the same gdt like the boot processors
 	gdt_flush();
-	
+
 	// install IDT
 	idt_install();
 
diff --git a/arch/x86/kernel/entry64.asm b/arch/x86/kernel/entry64.asm
index 144b9231..4351fef6 100644
--- a/arch/x86/kernel/entry64.asm
+++ b/arch/x86/kernel/entry64.asm
@@ -99,18 +99,8 @@ ALIGN 8
 %if MAX_CORES > 1
 global smp_entry
 smp_entry:
-; enable caching, disable paging and fpu emulation
-    and eax, 0x1ffffffb
-; ...and turn on FPU exceptions
-    or eax, 0x22
-    mov cr0, eax
-; clears the current pgd entry
-    xor eax, eax
-    mov cr3, eax
-; at this stage, we disable the SSE support
-    mov eax, cr4
-    and eax, 0xfffbf9ff
-    mov cr4, eax
+; initialize cpu features
+    call cpu_init
 
 ; initialize page table
     mov edi, boot_pml4
@@ -169,10 +159,7 @@ L3:
     pop ebp
     ret
 
-ALIGN 4
-stublet:
-    mov esp, startup_stack-4
-    push ebx ; save pointer to the multiboot structure
+cpu_init:
     mov eax, cr0
 ; enable caching, disable paging and fpu emulation
     and eax, 0x1ffffffb
@@ -186,6 +173,15 @@ stublet:
     mov eax, cr4
     and eax, 0xfffbf9ff
     mov cr4, eax
+    ret
+
+ALIGN 4
+stublet:
+    mov esp, startup_stack
+; save pointer to the multiboot structure
+    push ebx
+; initialize cpu features
+    call cpu_init
 ; do we have the instruction cpuid?
     pushfd
     pop eax
@@ -389,23 +385,6 @@ smp_start64:
     jmp $
 %endif
 
-global cpu_init
-cpu_init:
-;    mov eax, cr0
-; enable caching, disable paging and fpu emulation
-;    and eax, 0x1ffffffb
-; ...and turn on FPU exceptions
-;    or eax, 0x22
-;    mov cr0, eax
-; clears the current pgd entry
-;    xor eax, eax
-;    mov cr3, eax
-; at this stage, we disable the SSE support
-;    mov eax, cr4
-;    and eax, 0xfffbf9ff
-;    mov cr4, eax
-;    ret
-
 ; This will set up our new segment registers and is declared in 
 ; C as 'extern void gdt_flush();'
 global gdt_flush