From 6346f5459488496938a533aa26f8ead83490940f Mon Sep 17 00:00:00 2001 From: stefan Date: Wed, 24 Nov 2010 19:05:04 +0000 Subject: [PATCH] - redesign of the function cpuid to avoid unintentional overriding of registers git-svn-id: http://svn.lfbs.rwth-aachen.de/svn/scc/trunk/MetalSVM@268 315a16e6-25f9-4109-90ae-ca3045a26c18 --- arch/x86/include/asm/processor.h | 14 ++++++++++---- arch/x86/kernel/apic.c | 4 ++-- 2 files changed, 12 insertions(+), 6 deletions(-) diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h index e653e083..c4256220 100644 --- a/arch/x86/include/asm/processor.h +++ b/arch/x86/include/asm/processor.h @@ -66,10 +66,16 @@ inline static void rmb(void) { asm volatile("lfence" ::: "memory"); } inline static void wmb(void) { asm volatile("sfence" ::: "memory"); } #endif -inline static uint32_t cpuid(uint32_t code, uint32_t* feature) { - uint32_t ret; - asm volatile("cpuid" : "=a"(ret), "=d"(*feature) : "0"(code)); - return ret; +inline static void cpuid(uint32_t code, uint32_t* a, uint32_t* b, uint32_t* c, uint32_t* d) { + asm volatile ("cpuid" : "=a"(*a), "=b"(*b), "=c"(*c), "=d"(*d) : "0"(code)); +} + +inline static void flush_pipeline(void) { + uint32_t low = 0; + uint32_t high = 0; + uint32_t code = 0; + + asm volatile ("cpuid" : "=a"(low), "=d"(high) : "0"(code) : "%ebx", "%ecx"); } inline static uint64_t rdmsr(uint32_t msr) { diff --git a/arch/x86/kernel/apic.c b/arch/x86/kernel/apic.c index 273545d1..8501ffb1 100644 --- a/arch/x86/kernel/apic.c +++ b/arch/x86/kernel/apic.c @@ -110,7 +110,7 @@ int apic_calibration(void) static int apic_probe(void) { size_t addr; - uint32_t i, count; + uint32_t i, count, dummy; // searching MP signature in the reserved memory areas #ifdef CONFIG_MULTIBOOT @@ -181,7 +181,7 @@ found_mp: kprintf("Maximum LVT Entry: 0x%x\n", (i >> 16) & 0xFF); kprintf("APIC Version: 0x%x\n", i & 0xFF); - cpuid(0x1, &i); + cpuid(0x1, &i, &dummy, &dummy, &dummy); if (!(i & (1 << 5))) { kputs("Unable to use Machine-Specific Registers (MSR)\n"); goto out;