Merge branch 'master' into ohligs
This commit is contained in:
commit
6ee8ee2be5
11 changed files with 34 additions and 22 deletions
|
@ -88,7 +88,7 @@ inline static int32_t atomic_int32_test_and_set(atomic_int32_t* d, int32_t ret)
|
|||
inline static int32_t atomic_int32_add(atomic_int32_t *d, int32_t i)
|
||||
{
|
||||
int32_t res = i;
|
||||
asm volatile(LOCK "xaddl %0, %1" : "=r"(i) : "m"(d->counter), "0"(i) : "memory");
|
||||
asm volatile(LOCK "xaddl %0, %1" : "=r"(i) : "m"(d->counter), "0"(i) : "memory", "cc");
|
||||
return res+i;
|
||||
}
|
||||
|
||||
|
|
|
@ -98,7 +98,7 @@ inline static uint64_t rdtsc(void)
|
|||
* is used here
|
||||
*/
|
||||
inline static void flush_cache(void) {
|
||||
asm volatile ("wbinvd" : : : "memory");
|
||||
asm volatile ("wbinvd" ::: "memory");
|
||||
}
|
||||
|
||||
/** @brief Invalidate cache
|
||||
|
@ -107,7 +107,7 @@ inline static void flush_cache(void) {
|
|||
* is used here
|
||||
*/
|
||||
inline static void invalidate_cache(void) {
|
||||
asm volatile ("invd");
|
||||
asm volatile ("invd" ::: "memory");
|
||||
}
|
||||
|
||||
/** @brief Get return value from EAX
|
||||
|
@ -125,9 +125,9 @@ inline static int get_return_value(void) {
|
|||
|
||||
/* Force strict CPU ordering */
|
||||
#ifdef CONFIG_ROCKCREEK
|
||||
inline static void mb(void) { asm volatile ("lock; addl $0,0(%%esp)" ::: "memory"); }
|
||||
inline static void rmb(void) { asm volatile ("lock; addl $0,0(%%esp)" ::: "memory"); }
|
||||
inline static void wmb(void) { asm volatile ("lock; addl $0,0(%%esp)" ::: "memory"); }
|
||||
inline static void mb(void) { asm volatile ("lock; addl $0,0(%%esp)" ::: "memory", "cc"); }
|
||||
inline static void rmb(void) { asm volatile ("lock; addl $0,0(%%esp)" ::: "memory", "cc"); }
|
||||
inline static void wmb(void) { asm volatile ("lock; addl $0,0(%%esp)" ::: "memory", "cc"); }
|
||||
#else
|
||||
inline static void mb(void) { asm volatile("mfence" ::: "memory"); }
|
||||
inline static void rmb(void) { asm volatile("lfence" ::: "memory"); }
|
||||
|
@ -268,7 +268,7 @@ static inline void tlb_flush(void)
|
|||
static inline uint32_t read_eflags(void)
|
||||
{
|
||||
uint32_t result;
|
||||
asm volatile ("pushf; pop %%eax" : "=a"(result));
|
||||
asm volatile ("pushf; pop $0" : "=r"(result));
|
||||
return result;
|
||||
}
|
||||
|
||||
|
@ -283,7 +283,7 @@ static inline uint32_t last_set(uint32_t i)
|
|||
|
||||
if (!i)
|
||||
return 0;
|
||||
asm volatile ("bsr %1, %0" : "=r"(ret) : "r"(i) : "flags");
|
||||
asm volatile ("bsr %1, %0" : "=r"(ret) : "r"(i) : "cc");
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
|
|
@ -83,7 +83,7 @@ inline static void *memcpy(void *dest, const void *src, size_t count)
|
|||
"movl (%%edi), %%edx\n\t"
|
||||
"andl $31, %%ecx\n\t"
|
||||
"rep ; movsb\n\t":"=&a" (h), "=&D"(i), "=&S"(j), "=&b"(k), "=&c"(l), "=&d"(m)
|
||||
: "0"(count / 32), "1"(dest), "2"(src), "3"(count) : "memory");
|
||||
: "0"(count / 32), "1"(dest), "2"(src), "3"(count) : "memory","cc");
|
||||
|
||||
return dest;
|
||||
}
|
||||
|
@ -107,7 +107,7 @@ inline static void *memcpy(void* dest, const void *src, size_t count)
|
|||
"andl $3, %%ecx\n\t"
|
||||
"rep movsb\n\t"
|
||||
: "=&c"(i), "=&D"(j), "=&S"(k)
|
||||
: "0"(count/4), "g"(count), "1"(dest), "2"(src) : "memory");
|
||||
: "0"(count/4), "g"(count), "1"(dest), "2"(src) : "memory","cc");
|
||||
|
||||
return dest;
|
||||
}
|
||||
|
@ -134,7 +134,7 @@ inline static void *memset(void* dest, int val, size_t count)
|
|||
|
||||
asm volatile ("cld; rep stosb"
|
||||
: "=&c"(i), "=&D"(j)
|
||||
: "a"(val), "1"(dest), "0"(count) : "memory");
|
||||
: "a"(val), "1"(dest), "0"(count) : "memory","cc");
|
||||
|
||||
return dest;
|
||||
}
|
||||
|
@ -162,7 +162,7 @@ inline static size_t strlen(const char* str)
|
|||
asm volatile("not %%ecx; cld; repne scasb; not %%ecx; dec %%ecx"
|
||||
: "=&c"(len), "=&D"(i), "=&a"(j)
|
||||
: "2"(0), "1"(str), "0"(len)
|
||||
: "memory");
|
||||
: "memory","cc");
|
||||
|
||||
return len;
|
||||
}
|
||||
|
|
|
@ -86,7 +86,7 @@ static inline int jump_to_user_code(uint32_t ep, uint32_t stack)
|
|||
{
|
||||
asm volatile ("mov %0, %%ds; mov %0, %%fs; mov %0, %%gs; mov %0, %%es" :: "r"(0x23));
|
||||
asm volatile ("push $0x23; push %0; push $0x1B; push %1" :: "r"(stack), "r"(ep));
|
||||
asm volatile ("lret");
|
||||
asm volatile ("lret" ::: "cc");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -129,7 +129,9 @@ int timer_wait(unsigned int ticks)
|
|||
*/
|
||||
int timer_init(void)
|
||||
{
|
||||
#ifndef CONFIG_ROCKCREEK
|
||||
uint64_t start;
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Installs 'timer_handler' for the PIC and APIC timer,
|
||||
|
|
|
@ -764,7 +764,8 @@ int arch_paging_init(void)
|
|||
|
||||
#ifdef CONFIG_ROCKCREEK
|
||||
// map SCC's bootinfo
|
||||
map_region(SCC_BOOTINFO, SCC_BOOTINFO, 1, MAP_KERNEL_SPACE);
|
||||
viraddr = map_region(SCC_BOOTINFO, SCC_BOOTINFO, 1, MAP_KERNEL_SPACE);
|
||||
kprintf("Map SCC's bootinfos at 0x%x\n", viraddr);
|
||||
|
||||
// map SCC's configuration registers
|
||||
viraddr = map_region(CRB_X0_Y0, CRB_X0_Y0, (CRB_OWN-CRB_X0_Y0+16*1024*1024) >> PAGE_SHIFT, MAP_KERNEL_SPACE|MAP_NO_CACHE);
|
||||
|
|
|
@ -342,7 +342,7 @@ int RCCE_init(
|
|||
__FILE__,__LINE__,RCCE_SHM_BUFFER_offset ,RCCE_SHM_SIZE_MAX);
|
||||
#endif
|
||||
#else
|
||||
RCCE_shmalloc_init(map_region(RC_SHM_BUFFER_START(), RCCE_SHM_SIZE_MAX);
|
||||
RCCE_shmalloc_init(RC_SHM_BUFFER_START(), RCCE_SHM_SIZE_MAX);
|
||||
#endif
|
||||
|
||||
// initialize the (global) flag bookkeeping data structure
|
||||
|
|
|
@ -61,7 +61,7 @@ inline static void *memcpy_get(void *dest, const void *src, size_t count)
|
|||
"rep ; movsb\n\t":"=&a" (h), "=&D"(i), "=&S"(j), "=&b"(k),
|
||||
"=&c"(l), "=&d"(m)
|
||||
:"0"(count / 32), "1"(dest), "2"(src),
|
||||
"3"(count):"memory");
|
||||
"3"(count):"memory","cc");
|
||||
|
||||
return dest;
|
||||
}
|
||||
|
@ -84,7 +84,7 @@ inline static void *memcpy_put(void* dest, const void *src, size_t count)
|
|||
"andl $3, %%ecx\n\t"
|
||||
"rep movsb\n\t"
|
||||
: "=&c"(i), "=&D"(j), "=&S"(k)
|
||||
: "0"(count/4), "g"(count), "1"(dest), "2"(src) : "memory");
|
||||
: "0"(count/4), "g"(count), "1"(dest), "2"(src) : "memory","cc");
|
||||
|
||||
return dest;
|
||||
}
|
||||
|
@ -160,7 +160,7 @@ inline static void *memcpy_put(void *dest, const void *src, size_t count)
|
|||
"andl $3,%%ecx\n\t"
|
||||
"rep ; movsb\n\t":"=&c" (i), "=&D"(j), "=&S"(k), "=&a"(l)
|
||||
:"0"(count), "1"(dest), "2"(src)
|
||||
:"memory");
|
||||
:"memory","cc");
|
||||
|
||||
return dest;
|
||||
}
|
||||
|
|
|
@ -263,7 +263,7 @@ __inline int mmnif_device_schedule()
|
|||
bthread_create(&polling_thread,NULL,mmnif_poll,NULL);
|
||||
return NULL;
|
||||
#else
|
||||
create_kernel_task(&polling_thread,mmnif_poll,NULL);
|
||||
create_kernel_task(&polling_thread,mmnif_poll,NULL, NORMAL_PRIO);
|
||||
return NULL;
|
||||
#endif
|
||||
}
|
||||
|
|
|
@ -17,13 +17,14 @@
|
|||
* This file is part of MetalSVM.
|
||||
*/
|
||||
|
||||
#include <metalsvm/stdio.h>
|
||||
#include "util.h"
|
||||
|
||||
|
||||
__inline int isprint(char e)
|
||||
inline int isprint(unsigned char e)
|
||||
{
|
||||
if (e < 0x30 || e > 0x80)
|
||||
if ((e < 0x30) || (e > 0x80))
|
||||
return 0;
|
||||
return 1;
|
||||
}
|
||||
|
||||
// hex_dumb display network packets in a good way
|
||||
|
|
|
@ -92,12 +92,16 @@ inline static int spinlock_lock(spinlock_t* s) {
|
|||
return 0;
|
||||
}
|
||||
|
||||
#if 0
|
||||
ticket = atomic_int32_inc(&s->queue);
|
||||
while(atomic_int32_read(&s->dequeue) != ticket) {
|
||||
NOP1;
|
||||
}
|
||||
s->owner = curr_task->id;
|
||||
s->counter = 1;
|
||||
#else
|
||||
while( atomic_int32_test_and_set(&s->dequeue,0) );
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -114,7 +118,11 @@ inline static int spinlock_unlock(spinlock_t* s) {
|
|||
s->counter--;
|
||||
if (!s->counter) {
|
||||
s->owner = MAX_TASKS;
|
||||
#if 0
|
||||
atomic_int32_inc(&s->dequeue);
|
||||
#else
|
||||
atomic_int32_set(&s->dequeue,1);
|
||||
#endif
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
|
Loading…
Add table
Reference in a new issue