diff --git a/apps/tests.c b/apps/tests.c index f83b24c6..910457b2 100644 --- a/apps/tests.c +++ b/apps/tests.c @@ -114,6 +114,8 @@ static int mail_noise(void*arg) { return 0; } +/* N has to be multiple of UEs */ + //#define N 1024 //#define N 512 #define N 128 @@ -204,9 +206,9 @@ static int svm_test(void *arg) svm_flags |= SVM_L2; #endif - A[0] = (int*) svmmalloc(3*N*N*sizeof(int), svm_flags); + A[0] = (int*) svm_malloc(3*N*N*sizeof(int), svm_flags); - if (!my_ue) + if (!my_ue) memset((void*) A[0], 0x00, 3*N*N*sizeof(int)); // initialize matrices @@ -215,6 +217,7 @@ static int svm_test(void *arg) B[i] = A[0] + (i*N + N*N); C[i] = A[0] + (i*N + 2*N*N); } + if (!my_ue) { for(i=0; i> PAGE_SHIFT, MAP_KERNEL_SPACE|MAP_MPE); + viraddr = map_region(MPB_X0_Y0, MPB_X0_Y0, (MPB_OWN-MPB_X0_Y0+16*1024*1024) >> PAGE_SHIFT, MAP_KERNEL_SPACE|MAP_MPE); kprintf("Map message passing buffers at 0x%x\n", viraddr); // map the FPGA registers diff --git a/arch/x86/mm/svm.c b/arch/x86/mm/svm.c index 619704c0..fd68a719 100644 --- a/arch/x86/mm/svm.c +++ b/arch/x86/mm/svm.c @@ -209,9 +209,7 @@ int svm_access_request(size_t addr) return ret; } -#if 0 static atomic_int32_t size_counter = ATOMIC_INIT(0); -#endif void* svm_malloc(size_t size, uint32_t consistency) { @@ -432,6 +430,20 @@ void svm_flush(void) */ #ifdef SVM_WB + +void svm_invalidate(void) +{ + task_t* task = per_core(current_task); + + if(task->flags & TASK_L2) { + asm volatile ( ".byte 0x0f; .byte 0x0a;\n" ); // CL1FLUSHMB + } else { + /* no action needed svm_flush already invalidates cache */ + return; + } + +} + void svm_flush( size_t phyaddr ) { task_t* task = per_core(current_task); @@ -518,18 +530,19 @@ wrong_addr: } #endif -int svm_barrier(uint32_t type) +int svm_barrier(uint32_t flags) { int i; RCCE_COMM *comm = &RCCE_COMM_WORLD; static int index = 0; - if (type == SVM_LAZYRELEASE) { + if( flags & SVM_LAZYRELEASE ) { + kputs("svm barrier has to flush and invalidate!\n"); svm_flush(0); svm_invalidate(); } -#if 1 +#if 0 // Lubachevsky barrier with flags index = !index; if (incregs[AIREG1].counter > (comm->size - 2)) {