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fixed possible wrap-around in tlb_flush functions

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This commit is contained in:
Steffen Vogel 2013-11-20 12:04:55 +01:00
parent aa1730919e
commit af5fa15d8d
1 changed files with 2 additions and 2 deletions
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4
arch/x86/include/asm/processor.h
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@ -273,7 +273,7 @@ int ipi_tlb_flush(void);
/** @brief Flush a specific page entry in TLB /** @brief Flush a specific page entry in TLB
* @param addr The (virtual) address of the page to flush * @param addr The (virtual) address of the page to flush
*/ */
static inline void tlb_flush_one_page(uint32_t addr) static inline void tlb_flush_one_page(size_t addr)
{ {
asm volatile("invlpg (%0)" : : "r"(addr) : "memory"); asm volatile("invlpg (%0)" : : "r"(addr) : "memory");
#if MAX_CORES > 1 #if MAX_CORES > 1
@ -293,7 +293,7 @@ static inline void tlb_flush_one_page(uint32_t addr)
*/ */
static inline void tlb_flush(void) static inline void tlb_flush(void)
{ {
uint32_t val = read_cr3(); size_t val = read_cr3();
if (val) if (val)
write_cr3(val); write_cr3(val);