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increasing the readability

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This commit is contained in:
Stefan Lankes 2011-04-05 11:33:41 +02:00
parent b4900b5143
commit b46664b375
1 changed files with 6 additions and 10 deletions
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16
arch/x86/kernel/apic.c
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@ -76,8 +76,8 @@ static inline void lapic_write(uint32_t addr, uint32_t value)
* to avoid a pentium bug, we have to read a apic register
* before we write a value to this register
*/
//asm volatile ("cmpl (%0), %%eax; movl %1, (%0)" :: "r"(lapic+addr), "r"(value));
asm volatile ("movl (%%eax), %%edx; movl %%ebx, (%%eax)" :: "a"(lapic+addr), "b"(value) : "%edx");
asm volatile ("cmpl (%0), %%eax; movl %1, (%0)" :: "r"(lapic+addr), "r"(value));
//asm volatile ("movl (%%eax), %%edx; movl %%ebx, (%%eax)" :: "a"(lapic+addr), "b"(value) : "%edx");
//*((volatile uint32_t*) (lapic+addr)) = value;
}
@ -112,20 +112,16 @@ uint32_t apic_cpu_id(void)
static inline uint32_t apic_version(void)
{
if (lapic) {
uint32_t i = *((uint32_t*) (lapic+APIC_VERSION));
return i & 0xFF;
}
if (lapic)
return lapic_read(APIC_VERSION) & 0xFF;
return 0;
}
static inline uint32_t apic_lvt_entries(void)
{
if (lapic) {
uint32_t i = *((uint32_t*) (lapic+APIC_VERSION));
return (i >> 16) & 0xFF;
}
if (lapic)
return (lapic_read(APIC_VERSION) >> 16) & 0xFF;
return 0;
}