- add macros for cache flushing and memory barriers
git-svn-id: http://svn.lfbs.rwth-aachen.de/svn/scc/trunk/MetalSVM@145 315a16e6-25f9-4109-90ae-ca3045a26c18
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1 changed files with 15 additions and 1 deletions
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@ -32,13 +32,27 @@
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extern "C" {
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#endif
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static inline uint64_t rdtsc()
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static inline uint64_t rdtsc(void)
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{
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uint64_t x;
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asm volatile ("rdtsc" : "=A" (x));
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return x;
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}
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#define flush_cache() asm volatile ("wbinvd" : : : "memory")
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#define invalid_cache() asm volatile ("invd")
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/* Force strict CPU ordering */
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#ifdef CONFIG_ROCKCREEK
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#define mb() asm volatile ("lock; addl $0,0(%%esp)" ::: "memory")
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#define rmb() asm volatile ("lock; addl $0,0(%%esp)" ::: "memory")
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#define wmb() asm volatile ("lock; addl $0,0(%%esp)" ::: "memory")
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#else
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#define mb() asm volatile("mfence" ::: "memory")
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#define rmb() asm volatile("lfence" ::: "memory")
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#define wmb() asm volatile("sfence" ::: "memory")
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#endif
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#define get_return_value(ret) asm volatile ("movl %%eax, %0" : "=r"(ret))
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#define NOP1 asm volatile ("nop")
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