updated PMC driver
This commit is contained in:
parent
d358a78e56
commit
c1e52dc8c2
4 changed files with 219 additions and 53 deletions
106
apps/memory.c
106
apps/memory.c
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@ -333,62 +333,87 @@ int bench(void)
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// setup PMCs
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pmc_stop_all();
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pmc_config(0, PMC_EVT_PAGE_WALK_CLKS, PMC_EVTSEL_OS | PMC_EVTSEL_EN, 0, 0);
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pmc_config(1, PMC_EVT_PAGE_WALK_COUNT, PMC_EVTSEL_OS | PMC_EVTSEL_EN, 0, 0);
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pmc_gp_config(0, PMC_EVT_PAGE_WALK_CLKS, PMC_EVTSEL_OS | PMC_EVTSEL_EN, 0, 0);
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pmc_gp_config(1, PMC_EVT_PAGE_WALK_COUNT, PMC_EVTSEL_OS | PMC_EVTSEL_EN, 0, 0);
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// allocate space for results
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uint64_t *data = kmalloc(ITERATIONS * sizeof(uint64_t));
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if (!data)
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return -1;
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// clear caches
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tlb_flush();
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flush_cache();
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size_t phyaddr = get_page();
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size_t viraddr;
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size_t pages = 512*511;
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size_t virbase = 2*KERNEL_SPACE;
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kprintf("virbase %#llx KERNEL_SPACE %#llx\n", virbase, KERNEL_SPACE);
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for (viraddr = virbase; viraddr < virbase+pages*PAGE_SIZE; viraddr += PAGE_SIZE) {
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kprintf("map at %#llx\n", viraddr);
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size_t ret = map_region(viraddr, phyaddr, 1, MAP_KERNEL_SPACE);
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if (ret != viraddr) {
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kprintf("map failed at %#llx\n", viraddr);
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break;
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}
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}
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int i;
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for (i=0; i < ITERATIONS; i++) {
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pmc_write(0, 0);
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pmc_write(1, 0);
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tlb_flush();
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pmc_reset_all();
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pmc_start_all();
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#if 0
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int i = 100;
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while (i--) {
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tlb_flush();
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page_stats(0);
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for (viraddr = virbase; viraddr < virbase+pages*PAGE_SIZE; viraddr += PAGE_SIZE) {
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char * p = (char *) viraddr;
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(*p)++;
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}
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#else
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//flush_cache();
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//tlb_flush();
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page_stats(0);
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#endif
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pmc_stop_all();
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uint64_t clks = pmc_read(0);
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uint64_t count = pmc_read(1);
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uint64_t clks = pmc_gp_read(0);
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uint64_t count = pmc_gp_read(1);
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/*kprintf("Number of Page table walks: %lu\n", count);
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kprintf("Page table walks clock cycles: %lu\n", clks);
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kprintf("Cycles per table walk: %lu.%u\n", clks / count, (1000 * clks / count) % 1000 );*/
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data[i] = 1000000 * clks / count;
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kprintf("%llu\n", 1000000 * clks / count);
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}
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// dump results
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for (i=0; i<ITERATIONS; i++)
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kprintf("%u\t%lu\n", i, data[i]);
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return 0;
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}
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int smp(void* arg)
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{
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kprintf("Hello from Core %d\n", smp_id());
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page_dump(PG_XD | PG_GLOBAL | PG_USER | PG_RW);
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return 33;
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}
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/** @brief This is a simple procedure to test memory management subsystem */
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int memory(void* arg)
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{
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int ret;
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tid_t id;
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#if 0
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size_t t0, t1, t2, t3;
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size_t pages;
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for (pages = 1; pages < (1 << 25); pages++) {
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t0 = rdtsc();
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size_t ret = map_region((1 << 28), 0x1000, pages, MAP_KERNEL_SPACE);
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t1 = rdtsc();
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if (!ret)
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break;
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t2 = rdtsc();
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ret = unmap_region((1 << 28), pages);
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t3 = rdtsc();
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kprintf("%llu\t%llu\t%llu\n", pages, t1-t0, t3-t2);
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}
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kprintf("======== USER: malloc test...\n");
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char* argv[] = {"/bin/memtest", "25", "10"};
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ret = create_user_task(&id, argv[0], argv);
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test(!ret, "calling %s %s %s with id = %i, ret = %i", argv[0], argv[1], argv[2], id, ret);
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wait(&ret);
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test(!ret, "userspace task returned with code = %d", ret);
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return 0;
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kprintf("======== PAGING: test started...\n");
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paging();
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@ -398,16 +423,21 @@ int memory(void* arg)
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kprintf("======== MALLOC: test started...\n");
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malloc();
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kprintf("======== USER: test userspace...\n");
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char* argv[] = {"/bin/fork", NULL};
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ret = create_user_task(&id, argv[0], argv);
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test(!ret, "calling %s with id = %i, ret = %i", argv[0], id, ret);
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kprintf("======== USER: test fork...\n");
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char* argv2[] = {"/bin/fork", NULL};
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ret = create_user_task(&id, argv2[0], argv2);
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test(!ret, "calling %s with id = %i, ret = %i", argv2[0], id, ret);
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wait(&ret);
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test(!ret, "userspace task returned with code = %d", ret);
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#endif
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kprintf("======== BENCH: memory and TLB benchmark started...\n");
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bench();
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kprintf("======== SMP: test multicore...\n");
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ret = create_kernel_task_on_core(&id, smp, NULL, NORMAL_PRIO, 1);
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wait(&ret);
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test(!ret, "smp task returned with code = %d", ret);
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kprintf("======== All tests finished successfull...\n");
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return 0;
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@ -38,9 +38,12 @@
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#define IA32_PERFEVTSEL(i) (0x186 + i) // general purpose PMC configuration register
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#define IA32_PMC(i) (0x0C1 + i) // general purpose PMC counter register
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#define IA32_A_PMC(i) (0x4C1 + i) // general purpose alias PMC counter register for full width writes
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#define MSR_PERF_FIXED_CTR(i) (0x309 + i) // fixed function PMC counter register
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#define MSR_PERF_FIXED_CTR_CTRL 0x38D // fixed functiion PMC configuration register
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#define PMC_FIXED_OS (1 << 0)
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#define PMC_FIXED_USR (1 << 1)
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#define PMV_FIXED_PMI (1 << 3)
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/* For Intel Core 2 Duo the MSR_PERF_FIXED_CTRs are mapped as followed:
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* MSR_PERF_FIXED_CTR(0) => INST_RETIRED.ANY
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@ -89,6 +92,14 @@
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#define PMC_EVT_PAGE_WALK_COUNT 0x010C // Number of page-walks executed
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#define PMC_EVT_PAGE_WALK_CLKS 0x020C // Duration of page-walks in core cycles
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#define PMC_EVT_MEM_LOAD_RETIRED_L1D_MISS 0x01CB // Retired loads that miss the L1 data cache (precise event)
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#define PMC_EVT_MEM_LOAD_RETIRED_L1D_LINE_MISS 0x02CB // L1 data cache line missed by retired loads (precise event)
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#define PMC_EVT_MEM_LOAD_RETIRED_L2_MISS 0x04CB // Retired loads that miss the L2 cache (precise event)
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#define PMC_EVT_MEM_LOAD_RETIRED_L2_LINE_MISS 0x08CB // L2 cache line missed by retired loads (precise event)
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#define PMC_EVT_MEM_LOAD_RETIRED_DTLB_MISS 0x10CB // Retired loads that miss the DTLB (precise event)
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struct pmc {
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uint8_t id;
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@ -134,7 +145,17 @@ struct pmc_caps* pmc_init();
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* - 0 on success
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* - else failure (invalid counter or flags)
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*/
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int pmc_config(uint8_t i, uint16_t event, uint32_t flags, uint8_t umask, uint8_t cmask);
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int pmc_gp_config(uint8_t i, uint16_t event, uint32_t flags, uint8_t umask, uint8_t cmask);
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/** @brief Setups and stops the fixed function PMCs
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*
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* @param i The counter number to configure (positive for gp PMCs, negative for ff PMCs)
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* @param flags Flags for the MSR_PERF_FIXED_CTR_CTRL register
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* @return
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* - 0 on success
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* - else failure (invalid counter or flags)
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*/
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int pmc_ff_config(uint8_t i, uint8_t flags);
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/** @brief Start a single general purpose PMC
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*
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@ -143,7 +164,7 @@ int pmc_config(uint8_t i, uint16_t event, uint32_t flags, uint8_t umask, uint8_t
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* - 0 on success
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* - -EINVAL on invalid counter number
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*/
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inline int pmc_start(uint8_t i);
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inline int pmc_gp_start(uint8_t i);
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/** @brief Stop a single general purpose PMC
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*
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@ -152,11 +173,28 @@ inline int pmc_start(uint8_t i);
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* - 0 on success
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* - -EINVAL on invalid counter number
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*/
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inline int pmc_stop(uint8_t i);
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inline int pmc_gp_stop(uint8_t i);
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/** @brief Start a single fixed function PMC
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*
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* @param i The counter number
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* @return
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* - 0 on success
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* - -EINVAL on invalid counter number
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*/
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inline int pmc_ff_start(uint8_t i);
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/** @brief Stop a single fixed function PMC
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*
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* @param i The counter number
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* @return
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* - 0 on success
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* - -EINVAL on invalid counter number
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*/
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inline int pmc_ff_stop(uint8_t i);
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/** @brief Start all PMCs at the same time
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*
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* @param i The counter number
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* @return
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* - 0 on success
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* - -EINVAL on invalid counter number
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@ -165,19 +203,33 @@ inline int pmc_start_all();
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/** @brief Stop all PMCs at the same time
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*
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* @param i The counter number
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* @return
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* - 0 on success
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* - -EINVAL on invalid counter number
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*/
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inline int pmc_stop_all();
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/** @brief Reset all PMCs to zero
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*
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* @return
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* - 0 on success
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* - -EINVAL on invalid counter number
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*/
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inline int pmc_reset_all();
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/** @brief Read a single general purpose PMC
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*
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* @param i The counter number
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* @return The counter value (see struct pmc_caps.gp_width)
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*/
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inline uint64_t pmc_read(uint8_t i);
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inline uint64_t pmc_gp_read(uint8_t i);
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/** @brief Read a single fixed function PMC
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*
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* @param i The counter number
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* @return The counter value (see struct pmc_caps.gp_width)
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*/
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inline uint64_t pmc_ff_read(uint8_t i);
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/** @brief Write a single general purpose PMC value
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*
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@ -188,6 +240,13 @@ inline uint64_t pmc_read(uint8_t i);
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* @param i The counter number
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* @param val The counter value (see struct pmc_caps.gp_width)
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*/
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inline int pmc_write(uint8_t i, uint64_t val);
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inline int pmc_gp_write(uint8_t i, uint64_t val);
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/** @brief Write a single fixed function PMC value
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*
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* @param i The counter number
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* @param val The counter value (see struct pmc_caps.ff_width)
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*/
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inline int pmc_ff_write(uint8_t i, uint64_t val);
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#endif
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@ -23,6 +23,8 @@
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* @brief Simple interface to IA32 Performance Monitor Counters
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*
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* This implementation is in parts specific for Intel Core 2 Duo Processors!
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* General purpose PMCS => pmc_gp_*()
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* Fixed function PMCs => pmc_ff_*()
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*/
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#include <errno.h>
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@ -45,8 +47,8 @@ struct pmc_caps* pmc_init()
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caps.arch_events = (b >> 0) & 0x3f;
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// check if IA32_PERF_CAPABILITIES MSR is available
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cpuid(0x01, &a, &b, &c, &d);
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if (caps.version >= 2) {
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cpuid(0x01, &a, &b, &c, &d);
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if (c & (1 << 15 /* PDCM */))
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caps.msr = rdmsr(IA32_PERF_CAPABILITIES);
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}
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@ -55,7 +57,7 @@ struct pmc_caps* pmc_init()
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return ∩︀
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}
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int pmc_config(uint8_t i, uint16_t event, uint32_t flags, uint8_t umask, uint8_t cmask)
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int pmc_gp_config(uint8_t i, uint16_t event, uint32_t flags, uint8_t umask, uint8_t cmask)
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{
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if (BUILTIN_EXPECT(i > caps.gp_count, 0))
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return -EINVAL;
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@ -64,12 +66,28 @@ int pmc_config(uint8_t i, uint16_t event, uint32_t flags, uint8_t umask, uint8_t
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evtsel |= (cmask << PMC_EVTSEL_CMASK) | (umask << PMC_EVTSEL_UMASK);
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wrmsr(IA32_PERFEVTSEL(i), evtsel);
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wrmsr(IA32_PMC(i), 0);
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wrmsr(IA32_PMC(i), 0); // reset counter
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return 0;
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}
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inline int pmc_start(uint8_t i)
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int pmc_ff_config(uint8_t i, uint8_t flags)
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{
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if (BUILTIN_EXPECT(i > caps.ff_count, 0))
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return -EINVAL;
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uint64_t ctrl = rdmsr(MSR_PERF_FIXED_CTR_CTRL);
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ctrl &= ~(0x0f << i*4); // clear flags
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ctrl |= (flags & 0xf) << i*4;
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wrmsr(MSR_PERF_FIXED_CTR_CTRL, ctrl);
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return 0;
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}
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inline int pmc_gp_start(uint8_t i)
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{
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if (BUILTIN_EXPECT(i > caps.gp_count, 0))
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return -EINVAL;
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@ -79,7 +97,7 @@ inline int pmc_start(uint8_t i)
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return 0;
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}
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inline int pmc_stop(uint8_t i)
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inline int pmc_gp_stop(uint8_t i)
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{
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if (BUILTIN_EXPECT(i > caps.gp_count, 0))
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return -EINVAL;
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@ -89,6 +107,26 @@ inline int pmc_stop(uint8_t i)
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return 0;
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}
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inline int pmc_ff_start(uint8_t i)
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{
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if (BUILTIN_EXPECT(i > caps.ff_count, 0))
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return -EINVAL;
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// TODO
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return 0;
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}
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inline int pmc_ff_stop(uint8_t i)
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{
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if (BUILTIN_EXPECT(i > caps.ff_count, 0))
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return -EINVAL;
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// TODO
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return 0;
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}
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inline int pmc_start_all()
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{
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if (BUILTIN_EXPECT(caps.version < 2, 0))
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@ -109,7 +147,22 @@ inline int pmc_stop_all()
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return 0;
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}
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inline uint64_t pmc_read(uint8_t i)
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inline int pmc_reset_all()
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{
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if (BUILTIN_EXPECT(caps.version < 2, 0))
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return -EINVAL;
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int i;
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for (i = 0; i < caps.gp_count; i++)
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pmc_gp_write(i, 0);
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for (i = 0; i < caps.ff_count; i++)
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pmc_ff_write(i, 0);
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return 0;
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}
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inline uint64_t pmc_gp_read(uint8_t i)
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{
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if (BUILTIN_EXPECT(i > caps.gp_count, 0))
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return 0;
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@ -119,7 +172,17 @@ inline uint64_t pmc_read(uint8_t i)
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return 0;
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}
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inline int pmc_write(uint8_t i, uint64_t val)
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inline uint64_t pmc_ff_read(uint8_t i)
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{
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if (BUILTIN_EXPECT(i > caps.ff_count, 0))
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return 0;
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return rdmsr(MSR_PERF_FIXED_CTR(i));
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return 0;
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}
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inline int pmc_gp_write(uint8_t i, uint64_t val)
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{
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if (BUILTIN_EXPECT(i > caps.gp_count, 0))
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return -EINVAL;
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@ -131,3 +194,13 @@ inline int pmc_write(uint8_t i, uint64_t val)
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return 0;
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}
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inline int pmc_ff_write(uint8_t i, uint64_t val)
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{
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if (BUILTIN_EXPECT(i > caps.ff_count, 0))
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return -EINVAL;
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wrmsr(MSR_PERF_FIXED_CTR(i), val);
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return 0;
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}
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@ -17,6 +17,10 @@
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* This file is part of MetalSVM.
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*/
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||||
|
||||
/**
|
||||
* @author Steffen Vogel <steffen.vogel@rwth-aachen.de>
|
||||
*/
|
||||
|
||||
#include <metalsvm/malloc.h>
|
||||
#include <metalsvm/spinlock.h>
|
||||
#include <metalsvm/stdio.h>
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue